IRFS7430-7P Data Sheet (543 KB, EN)

StrongIRFET™
IRFS7430-7PPbF
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
PWM Inverterized topologies
Battery powered circuits
 Half-bridge and full-bridge topologies
 Electronic ballast applications
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
HEXFET® Power MOSFET
VDSS
40V
RDS(on) typ.
0.55m
0.75m
D
max
G
S
ID (Silicon Limited)
522A
ID (Package Limited)
240A
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant




G
Gate
Package Type
IRFS7430-7PPbF
D2Pak-7Pin
Standard Pack
Form
Quantity
Tube
50
Tape and Reel Left
800
4.0
Orderable Part Number
IRFS7430-7PPbF
IRFS7430TRL7PP
Limited By Package
500
3.0
2.0
TJ = 125°C
1.0
400
300
200
100
TJ = 25°C
0.0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
S
Source
600
ID = 100A
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m)
Base part number
D
Drain
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0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFS7430-7PPbF
Absolute Maximium Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics EAS (Thermally limited)
Single Pulse Avalanche Energy 
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
EAR
Repetitive Avalanche Energy 
Thermal Resistance Symbol
Parameter
Junction-to-Case 
RJC
Junction-to-Ambient 
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Max.
522
369
240
1200*
375
2.5
± 20
A
W
W/°C
V
-55 to + 175 °C 300
764 1454
mJ
See Fig 15, 16, 23a, 23b
A
mJ
Typ.
–––
–––
Min.
40
–––
–––
–––
2.2
–––
–––
–––
–––
–––
Units
Max.
0.4
40
Units
°C/W Typ. Max. Units
Conditions
––– –––
V
VGS = 0V, ID = 250µA
26
––– mV/°C Reference to 25°C, ID = 2mA 
0.55 0.75
VGS = 10V, ID = 100A 
m
0.93 –––
VGS = 6V, ID = 50A 
3.0
3.9
V
VDS = VGS, ID = 250µA
–––
1.0
VDS =40 V, VGS = 0V
µA
––– 150
VDS =40V,VGS = 0V,TJ =125°C
––– 100
VGS = 20V
nA
––– -100
VGS = -20V
2.2
–––

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A
by source bonding technology. Note that current limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 153µH, RG = 50, IAS = 100A, VGS =10V.
ISD  100A, di/dt  1403A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 54A, VGS =10V.
 When mounted on 1" square PCB (FR-4 or G-10 Material). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
*Pulse drain current is limited at 960A by source bonding technology.
2
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Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
176
–––
–––
–––
–––
–––
–––
Typ.
–––
305
84
96
209
28
79
td(off)
Turn-Off Delay Time
–––
161
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Output Capacitance (Time Related)
–––
93
––– 13975
––– 2140
––– 1438
Coss eff.(ER)
Max. Units
Conditions
–––
S VDS = 10V, ID =100A
460
ID = 100A
–––
VDS = 20V
nC –––
VGS = 10V
–––
–––
VDD = 20V
ID = 30A
–––
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
–––
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
pF VGS = 0V, VDS = 0V to 32V
See Fig.11
VGS = 0V, VDS = 0V to 32V
–––
2620
–––
–––
3306
–––
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
522
–––
–––
1200*
VSD
Diode Forward Voltage
–––
0.8
1.2
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
–––
–––
1.6
50
58
59
72
2.2
–––
–––
–––
–––
–––
–––
Coss eff.(TR)
Diode Characteristics Symbol
IS
ISM
3
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A
V
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
TJ = 25°C,IS = 100A,VGS = 0V 
V/ns TJ = 175°C,IS =100A,VDS = 40V
TJ = 25°C
VDD = 34V
ns
TJ = 125°C
IF = 100A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
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IRFS7430-7PPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
BOTTOM
100
4.5V
1
4.5V
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
10
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
TJ = 175°C
100
TJ = 25°C
10
1
VDS = 10V
60µs PULSE WIDTH
0.1
ID = 100A
VGS = 10V
1.6
1.2
0.8
0.4
2
3
4
5
6
7
8
-60
-20
Fig 5. Typical Transfer Characteristics
1000000
100
140
180
Fig 6. Normalized On-Resistance vs. Temperature
VGS, Gate-to-Source Voltage (V)
Coss = Cds + Cgd
Ciss
10000
60
14.0
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
100000
20
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
10
Fig 4. Typical Output Characteristics
1000
ID, Drain-to-Source Current(A)
1
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Coss
Crss
1000
ID = 100A
12.0
VDS = 32V
VDS = 20V
10.0
8.0
6.0
4.0
2.0
0.0
100
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
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0
50
100 150 200 250 300 350 400
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFS7430-7PPbF
10000
TJ = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1000
100µsec
100
DC
10
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.1
1.6
1
10
100
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
2.5
48
Id = 2.0mA
47
2.0
46
Energy (µJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
1msec
Limited by Package
45
44
1.5
1.0
43
42
0.5
41
0.0
40
-60
-20
20
60
100
140
-5
180
5
10 15 20 25 30 35 40 45
VDS, Drain-to-Source Voltage (V)
TJ , Temperature ( °C )
Fig 12. Typical Coss Stored Energy
Fig 11. Drain-to–Source Breakdown Voltage
RDS (on), Drain-to -Source On Resistance (m)
0
10.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
8.0
6.0
4.0
2.0
0.0
0
100
200
300
400
500
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse width
800
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
EAR , Avalanche Energy (mJ)
700
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
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IRFS7430-7PPbF
4.5
16
4.0
14
IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C
12
3.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
3.0
2.5
ID = 250µA
ID = 1.0mA
ID = 1.0A
2.0
10
8
6
4
1.5
2
1.0
0
-75
-25
25
75
125
175
225
0
200
TJ , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
14
700
12
IF = 100A
VR = 34V
600
IF = 60A
VR = 34V
10
TJ = 25°C
TJ = 125°C
500
TJ = 25°C
TJ = 125°C
QRR (nC)
IRRM (A)
400
8
6
400
300
200
4
100
2
0
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
450
IF = 100A
VR = 34V
400
TJ = 25°C
TJ = 125°C
QRR (nC)
350
300
250
200
150
100
50
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
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Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
0.01
I AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFS7430-7PPbF
D2Pak-7Pin Package Outline (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFS7430-7PPbF
D2Pak-7Pin Part Marking Information
D2Pak-7Pin Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFS7430-7PPbF
Qualification Information† Industrial
Qualification Level (per JEDEC JESD47F) ††
D2Pak-7Pin
Moisture Sensitivity Level
MSL1
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
11/6/2014
Comments


Updated EAS (L =1mH) = 1454mJ on page 2
Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 54A, VGS =10V”. on page 2
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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