LB11696V Motor Driver IC Application Note

LB11696V
Monolithic Digital IC
Brushless Motor Driver
Application Note
Direct PWM Drive, Quiet Pre-driver IC
Overview
The LB11696V is a direct PWM drive pre-driver IC designed for three-phase power brushless motors. A
motor driver circuit with the desired output power (voltage and current) can be implemented by adding
discrete transistors in the output circuits. Furthermore, the LB11696V provides a full complement of
protection circuits allowing it to easily implement high-reliability drive circuits. This device is optimal for
driving all types of large-scale motors such as those used in air conditioners and on-demand water heaters.
Function
 Three-phase bipolar drive
 Direct PWM drive (controlled either by control voltage or PWM variable duty pulse input)
 Built-in forward/reverse switching circuit
 Start/stop mode switching circuit (stop mode power saving function)
 Built-in input amplifier
 5V regulator output (VERG pin)
 Current limiter circuit (Supports 0.25V (typical) reference voltage sensing based high-precision detection)
 Under voltage protection circuit (The operating voltage can be set with a zener diode)
 Automatic recovery type constraint protection circuit with protection operating state discrimination output
(RD pin)
 Four types of Hall signal pulse output
 Supports thermistor based thermal protection of the output transistors
Pin Assignment
Package Dimensions
unit : mm (typ)
3191C
9.75
5.6
7.6
30
0.5
Top View
1
0.65
0.15
0.22
1.5 MAX
0.1
(1.3)
(0.33)
SANYO : SSOP30(275mil)
Caution: The package dimension is a reference value,
which is not a guaranteed value
Semiconductor Components Industries, LLC, 2013
December, 2013
1/39
LB11696V Application Note
Recommended Soldering Footprint
(Unit:mm)
Reference symbol
SSOP30(275mil)
eE
7.00
e
0.65
b3
0.32
l1
1.00
.
Block Diagram
RD
CSD
RD
CSD
OSC
TOC
EI-
-
EI+
+
PWM
PWM
OSC
LVSD
LVS
VREG
COMP
VREG
VCC
PWMIN
PWM
IN
CONTROL
LOGIC
UH
UL
PRE
DRIVER
HP
HP
LOGIC
HALL
LOGIC
VH
VL
WH
WL
VREF
S/S
S/S
F/R
F/R
N1
N1
N2
N2
HALL
HYS AMP
IN1+ IN1- IN2+ IN2- IN3+ IN3-
CURR
LIM
RF
RFGND
GND
2/39
LB11696V Application Note
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage
VCC max
VCC pin
18
V
Output current
IO max
UL, VL, WL, UH, VH, WH pins
30
mA
LVS pin applied voltage
LVS max
LVS pin
18
V
Allowable power dissipation
Pd max1
Independent IC
0.45
W
Pd max2
Mounted on a specified circuit board.*
1.05
W
Operating temperature
Topr
-20 to +100
C
Storage temperature
Tstg
-55 to +150
C
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage
under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may
be degraded.
Please
usdevice.
for the
further
details.
Stresses exceeding
Maximum Ratings
maycontact
damage the
Maximum
Ratings
are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta = 25C
Parameter
Symbol
Conditions
Supply voltage range 1-1
VCC1-1
Vcc pin
Supply voltage range1-2
VCC1-2
Vcc pin, when Vcc is shorted to VREG.
Output current
IO
UL, VL, WL, UH, VH, and WH pins
5V constant voltage output
IREG
Ratings
min
typ
Unit
max
8
17
V
4.5
5.5
V
25
mA
-30
mA
current
HP pin applied voltage
VHP
0
17
V
HP pin applied current
IHP
0
15
mA
RD pin applied voltage
VRD
0
17
V
RD pin applied current
IRD
0
15
mA
Electrical Characteristics at Ta  25C, VCC = 15V
Parameter
Symbol
Current drain 1
ICC1
Current drain 2
ICC2
Conditions
Ratings
min
typ
Stop mode
Unit
max
12
16
mA
2.5
4
mA
5.0
5.3
V
mV
5V Constant Voltage Output (VREG pin)
Output voltage
VREG
4.7
Line regulation
VREG1
VCC = 8 to 17V
40
100
Load regulation
VREG2
IO = -5 to -20mA
10
30
Temperature coefficient
VREG3
Design target value
Output voltage 1-1
VOUT1-1
Low level, IO = 400μA
0.2
0.5
V
Output voltage 1-2
VOUT1-2
Low level, IO = 10mA
0.9
1.2
V
Output voltage 2
VOUT2
High level, IO = -20mA
Output leakage current
IOleak
10
A
0
mV
mV/
Output Block
Vcc-1.1
Vcc-0.9
V
Hall Amplifier Block
Input bias current
IHB (HA)
Common-mode input voltage range 1
VICM1
When a Hall element device is used
-2
Common-mode input voltage range 2
VICM2
Single-sided input bias mode
Hall input sensitivity
VHIN
Sine wave,
A
-0.5
0.5
Vcc-2.0
V
0
Vcc
V
(when a Hall IC is used)
80
mVp-p
Hall element offset = 0V
Hysteresis
VIN (HA)
15
24
40
Input voltage Low  High
VSLH(HA)
5
12
20
mV
Input voltage High  Low
VSHL(HA)
-20
-12
-5
mV
mV
3/39
LB11696V Application Note
Continued on next page.
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
CTL Amplifier
Input offset voltage
VIO (CTL)
Input bias current
IB (CTL)
Common-mode input voltage range
VICM
High-level output voltage
VOH (CTL)
-10
ITOC = -0.2mA
Low-level output voltage
VOL (CTL)
ITOC = 0.2mA
Open-loop gain
G (CTL)
f(CTL) = 1kHz
10
mV
-1
1
A
0
VREG-1.7
V
VREG-1.2
VREG-0.8
0.8
45
V
1.05
51
V
dB
PWM Oscillator (PWM pin)
High level output voltage
VOH (PWM)
2.75
3.0
3.25
Low level output voltage
VOL (PWM)
1.2
1.35
1.5
V
External frequency
ICHG
CVPWM = 2.1V
-120
-90
-65
kHz
Oscillation frequency
f (PWM)
C = 2000pF
Amplitude
V (PWM)
1.4
1.6
1.9
Vp-p
2.75
3.0
3.25
V
1.2
1.35
1.5
V
2.68
2.82
2.96
V
1.23
1.29
1.34
V
3.02
3.18
3.34
V
1.37
1.44
1.50
V
0.2
0.5
V
10
A
22
V
kHz
TOC pin
Input voltage 1
VTOC1
Output duty : 100%
Input voltage 2
VTOC2
Output duty : 0%
Input voltage 1 low
VTOC1L
Design target value, when VREG = 4.7V,
Input voltage 2 low
VTOC2L
Design target value, when VREG = 4.7V,
100%
0%
Input voltage 1 high
VTOC1H
Design target value, when VREG =
5.3V, 100%
Input voltage 2 high
VTOC2H
Design target value, when VREG = 5.3V,
0%
HP Pin
Output saturation voltage
VHPL
IO = 10mA
Output leakage current
IHPleak
VO = 18V
CSD Oscillator Circuit (CSD pin)
High level output voltage
VOH (CSD)
2.7
3.0
3.3
V
Low level output voltage
VOL (CSD)
0.7
1.0
1.3
V
External capacitor charging current
ICHG1
VCSD = 2.0V
-3.15
-2.5
-1.85
A
External capacitor discharging
ICHG2
VCSD = 2.0V
0.1
0.14
0.18
A
RCSD
(Charge current)/(discharge current)
15
18
21
0.2
0.5
V
10
A
0.275
V
current
Charge/discharge current ratio
times
RD Pin
Low-level output voltage
VRDL
IO = 10mA
Output leakage current
IL(RD)
VO = 18V
Current Limiter Circuit (RF pin)
Limiter voltage
VRF
0.225
0.25
Under-voltage Protection Circuit (LVS pin)
Operation voltage
VSDL
3.5
3.7
3.9
V
Release voltage
VSDH
3.95
4.15
4.35
V
Hysteresis
VSD
0.3
0.45
0.6
V
50
kHz
PWMIN pin
Input frequency
f (PI)
High-level input voltage
VIH (PI)
2.0
VREG
V
V
Low-level input voltage
VIL (PI)
0
1.0
Input open voltage
VIO (PI)
VREG-0.5
VREG
V
Hysteresis
VIS (PI)
0.2
0.25
0.4
V
High-level input current
IIH (PI)
VPWMIN = VREG
-10
0
+10
A
Low-level input current
IIL (PI)
VPWMIN = 0V
-130
-90
A
Continued on next page.
4/39
LB11696V Application Note
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
S/S pin
High-level input voltage
VIH (SS)
2.0
VREG
V
Low-level input voltage
VIL (SS)
0
1.0
V
Hysteresis
VIS (SS)
0.2
0.25
0.4
V
High-level input current
IIH (SS)
VS/S = VREG
-10
0
+10
A
Low-level input current
IIL (SS)
VS/S = 0V
-10
-1
A
F/R Pin
High level input voltage
VIH (FR)
2.0
VREG
V
Low level input voltage
VIL (FR)
0
1.0
V
Input open voltage
VIO (FR)
VREG-0.5
VREG
V
Hysteresis
VIS (FR)
High-level input current
IIH (FR)
VF/R = VREG
Low-level input current
IIL (FR)
VF/R = 0V
0.2
0.25
0.4
V
-10
0
+10
A
-130
-90
A
N1 Pin
High level input voltage
VIH (N1)
2.0
VREG
V
Low level input voltage
VIL (N1)
0
1.0
V
Input open voltage
VIO (N1)
High-level input current
IIH (N1)
VN1 = VREG
VREG-0.5
Low-level input current
IIL (N1)
VN1 = 0V
-10
0
-130
-100
VREG
V
+10
A
A
N2 Pin
High level input voltage
VIH (N2)
2.0
VREG
V
Low level input voltage
VIL (N2)
0
1.0
V
Input open voltage
VIO (N2)
VREG-0.5
VREG
V
High-level input current
IIH (N2)
VN2 = VREG
Low-level input current
IIL (N2)
VN2 = 0V
-10
0
-130
-100
+10
A
A
5/39
VCC vs. ICC1
VCC vs. ICC2
Ta=+25℃
Ta=+25℃ , Stop mode
1.20E‐02
3.00E‐03
1.00E‐02
2.50E‐03
8.00E‐03
2.00E‐03
6.00E‐03
ICC1
4.00E‐03
ICC2 [A]
ICC1 [A]
LB11696V Application Note
1.50E‐03
2.00E‐03
5.00E‐04
0.00E+00
0.00E+00
0
5
10
15
ICC2
1.00E‐03
20
0
5
15
VCC [V]
VREG Line Regulation
VREG Load Regulation
Ta=+25℃
20
Ta=+25℃ , VCC=12V
6
6
5
5
4
4
3
VREG
2
VREG [V]
VREG [V]
10
VCC [V]
1
3
VREG
2
1
0
0
0
5
10
15
20
‐0.1
‐0.08
‐0.06
VCC [V]
‐0.04
‐0.02
0
IREG [A]
Ta vs. VREG
VCC=12V 5
VREG [V]
4.98
4.96
4.94
VREG
4.92
4.9
‐20
0
20
40
60
80
100
Ta [℃ ]
OUT Saturation High
OUT Saturation Low
Ta=+25℃ , VCC=12V
Ta=+25℃ , VCC=12V
1.2
1
1
0.8
0.8
0.6
VSATH
0.4
0.2
0
‐0.03
VOUT [V]
VOUT [V]
1.2
0.6
VSATL
0.4
0.2
0
‐0.025
‐0.02
‐0.015
IOUT [A]
‐0.01
‐0.005
0
0
0.005
0.01
0.015
0.02
0.025
0.03
IOUT [A]
6/39
LB11696V Application Note
Hall Input Bias Current
IN/OUT Hysteresis
Ta=+25℃ , VCC=12V
0.00E+00
12
‐2.00E‐08
10
‐4.00E‐08
IN‐
‐6.00E‐08
VOUT [V]
IIN [A]
Ta=+25℃ , VCC=12V
IN+
‐8.00E‐08
8
6
VOUT
4
2
‐1.00E‐07
0
1
2
3
4
0
‐0.05 ‐0.04 ‐0.03 ‐0.02 ‐0.01
5
0.01 0.02 0.03 0.04 0.05
Input bias current
ITOC vs. VTOC
Ta=+25℃ , VCC=12V, VEI+=2.5V
Ta=+25℃ , VCC=12V, VEI‐=GND, VEI+=2.5V
5.00E‐09
4.4
0.00E+00
4.35
‐5.00E‐09
4.3
‐1.00E‐08
4.25
‐1.50E‐08
‐2.00E‐08
IB(CTL)
4.2
4.15
‐2.50E‐08
4.1
‐3.00E‐08
4.05
‐3.50E‐08
0
0
DVIN [V]
VTOC [V]
IEI‐ [A]
VIN [V]
1
2
3
4
VOH(CTL)
4
‐0.001
5
‐0.0008
‐0.0006
VEI‐ [V]
‐0.0004
‐0.0002
0
ITOC [A]
ITOC vs. VTOC
Ta=+25℃ , VCC=12V, VEI‐=3.5V, VEI+=2.5V
0.9
VTOC [V]
0.85
0.8
0.75
VOL(CTL)
0.7
0.65
0.6
0.00E+00 2.00E‐07 4.00E‐07 6.00E‐07 8.00E‐07 1.00E‐06
ITOC [A]
VPWM vs. IPWM
Ta vs. fPWM
Ta=+25℃ , VCC=12V VCC=12V , CPWM=2200pF
22
2.00E‐03
21.5
1.00E‐03
5.00E‐04
IPWM
0.00E+00
fPWM [kHz]
IPWM [A]
1.50E‐03
21
20.5
fPWM
20
19.5
19
‐5.00E‐04
1
1.5
2
2.5
VPWM [V]
3
3.5
4
‐20
0
20
40
60
80
100
Ta [℃ ]
7/39
LB11696V Application Note
VCTL vs. Duty
Ta=+25℃ , VREG=4.7/5.0/5.3V
100
Duty [%]
80
60
4.7V
40
5.0V
5.3V
20
0
1
1.5
2
2.5
3
3.5
HP Saturation
HP Leak
Ta=+25℃ , VCC=12V
Ta=+25℃ , VCC=12V
4
6.00E‐09
3.5
5.00E‐09
3
4.00E‐09
2.5
3.00E‐09
2
1.5
VHP
IHP [A]
VHP [V]
VCTL [V]
1
2.00E‐09
1.00E‐09
IHP
‐1.00E‐23
0.5
‐1.00E‐09
0
‐2.00E‐09
0
0.005
0.01
0.015
0.02
0.025
0.03
0
5
IHP [A]
10
15
20
VHP [V]
VCSD vs. ICSD
Ta=+25℃ , VCC=12V
5.00E‐07
0.00E+00
ICSD [A]
‐5.00E‐07
‐1.00E‐06
‐1.50E‐06
ICSD
‐2.00E‐06
‐2.50E‐06
‐3.00E‐06
0
1
2
3
4
VCSD [V]
RD Saturation
RD Leak Current
Ta=+25℃ , VCC=12V
0.7
5.00E‐09
0.6
4.00E‐09
0.5
3.00E‐09
0.4
2.00E‐09
0.3
0.2
VRD
0.1
IRD [A]
VRD [V]
Ta=+25℃ , VCC=12V
1.00E‐09
‐1.00E‐23
IRD
‐1.00E‐09
6E‐16
‐2.00E‐09
‐0.1
‐3.00E‐09
0
0.005
0.01
IRD [A]
0.015
0.02
0
5
10
15
20
VRD [V]
8/39
LB11696V Application Note
9/39
LB11696V Application Note
Current limiter
Low Voltage Shutdown
Ta=+25℃ , VCC=12V
Ta=+25℃ , VCC=12V
10
10
8
8
6
VOUT
4
VOUT [V]
12
VOUT [V]
12
2
6
VOUT
4
2
0
0
0
0.1
0.2
0.3
0.4
3
3.5
4
VRF [V]
PWMIN Open Voltage
5
PWMIN Leak Current
Ta=+25℃
Ta=+25℃ , VCC=12V
2.80E‐04
6
2.30E‐04
5
1.80E‐04
4
3
VPWMIN
2
IPWMIN [A]
VPWMIN [V]
4.5
VLVS [V]
1.30E‐04
8.00E‐05
3.00E‐05
IPI
‐2.00E‐05
1
‐7.00E‐05
0
‐1.20E‐04
0
5
10
15
0
20
1
VCC [V]
2
3
4
5
6
VPWMIN [V]
PWMIN Hysteresis
Ta=+25℃ , VCC=12V
12
VOUT [V]
10
8
6
VOUT
4
2
0
0
0.5
1
1.5
2
2.5
3
VPWMIN [V]
SS Hysteresis
SS Input current
Ta=+25℃ , VCC=12V
Ta=+25℃ , VCC=12V
1.00E‐07
10
0.00E+00
8
‐1.00E‐07
ISS [A]
VOUT [V]
12
6
VOUT
4
2
‐2.00E‐07
ISS
‐3.00E‐07
‐4.00E‐07
0
‐5.00E‐07
0
0.5
1
1.5
VSS [V]
2
2.5
3
0
1
2
3
4
5
VSS [V]
10/39
FR Open Voltage
FR Hysteresis
Ta=+25℃
Ta=+25℃ , VCC=12V
6
12
5
10
4
8
3
VFR
2
VOUT [V]
VFR [V]
LB11696V Application Note
6
VOUT
4
2
1
0
0
0
5
10
15
0
20
0.5
1
1.5
2
2.5
3
VFR [V]
VCC [V]
FR Input current
Ta=+25℃ , VCC=12V
2.00E‐05
‐1.00E‐19
IFR [A]
‐2.00E‐05
‐4.00E‐05
‐6.00E‐05
IFR
‐8.00E‐05
‐1.00E‐04
‐1.20E‐04
0
1
2
3
4
5
VFR [V]
N1 Open Voltage
N1 Leak Current
Ta=+25℃ , VCC=12V
6
0.00E+00
5
‐2.00E‐05
‐4.00E‐05
4
3
VN1
2
VN1 [V]
VN1 [V]
Ta=+25℃
‐6.00E‐05
‐8.00E‐05
IN1
‐1.00E‐04
1
‐1.20E‐04
0
‐1.40E‐04
0
5
10
15
0
20
1
2
VCC [V]
N2 Open Voltage
4
5
N2 Leak Current
Ta=+25℃
Ta=+25℃ , VCC=12V
6
0.00E+00
5
‐2.00E‐05
‐4.00E‐05
4
3
VN2
2
1
IN2 [A]
VN2 [V]
3
VCC [V]
‐6.00E‐05
‐8.00E‐05
IN2
‐1.00E‐04
‐1.20E‐04
0
‐1.40E‐04
0
5
10
VCC [V]
15
20
0
1
2
3
4
5
VN2 [V]
11/39
LB11696V Application Note
• Three-Phase Logic Truth Table (IN = “H” indicates the state where IN+ > IN-)
F/R = “L”
F/R=“H”
Output
IN1
IN2
IN3
IN1
IN2
IN3
PWM
1
H
L
H
L
H
L
VH
UL
2
H
L
L
L
H
H
WH
UL
3
H
H
L
L
L
H
WH
VL
4
L
H
L
H
L
H
UH
VL
5
L
H
H
H
L
L
UH
WL
6
L
L
H
H
H
L
VH
WL
• S/S pin
Input state
State
High
Stop
Low
Start
• PWMIN pin
Input state
State
High or open
Output off
Low
Output on
If the PWM pin is not used, the input must be held at the low level.
• N1 and N2 pins
Input state
N1 pin
N2 pin
HP output
Low
Low
Low
High or open
Single Hall sensor period divided by 2
Single Hall sensor period
High or open
Low
Three Hall sensor synthesized period divided by 2
High or open
High or open
Three Hall sensor synthesized period
Since the S/S pin does not have an internal pull-up resistor, an external pull-up resistor or equivalent is
required to set the IC to the stop state. If either the S/S or PWMIN pins are not used, the unused pin input must
be set to the low-level voltage.
The HP output can be selected (by the N1 and N2 settings) to be one of the following four functions: the IN1
Hall input converted to a pulse output (one-Hall output), the one-Hall output divided by two, the three-phase
output synthesized from the Hall inputs (three-Hall synthesized output) or the three-Hall synthesized output
divided by two.
12/39
LB11696V Application Note
Application Circuit Example 1
Bipolar transistor drive (high side PWM) using 5V power supply
13/39
LB11696V Application Note
Application Circuit Example 2
MOS transistor drive (low side PWM) using 12V power supply
14/39
HP
S/S
F/R
F/R
PWM
IN
PWM
OSC
+
-
VREF
VREG S/S
HP
Thermistor
VREG
Variable duty
pulse input
PWMIN
PWM
EI+
EI-
TOC
N1
N1
N2
N2
COMP
RD
+
LVSD
Vcc
IN1+ IN1- IN2+ IN2- IN3+ IN3-
HALL
HYS AMP
HALL
LOGIC
CONTROL
LOGIC
CSD
OSC
CSD
HP
LOGIC
RD
RD
VREG
GND
CURR
LIM
PRE
DRIVER
VREG
RFGND
RF
WL
WH
VL
VH
UL
UH
VCC
VREG
LVS
+
12V
WOUT
VOUT
UOUT
+
VM
LB11696V Application Note
Application Circuit Example 3 (Hall element, FET)
NMOS transistor + PNP transistor drive (low side PWM) using 12V power supply with thermal protection
implemented using thermistor
15/39
LB11696V Application Note
Pin Functions
Pin No.
Pin Name
1
GND
2
RFGND
Pin function
Equivalent Circuit
Ground pin of the control circuit block.
Output current detection reference pin.
Connect the ground terminal of external
resistor RF to this pin.
3
RF
Output current detection pin.
Connect a resistor (Rf) with a small
value between this pin and RFGND.
This sets the maximum output current
IOUT to be 0.25V/Rf.
4
WH
Outputs (External transistor drive
6
VH
outputs)
8
UH
The duty control applies to the UH, VH,
5
WL
and WH pins.
7
VL
9
UL
VCC
50kΩ
10
11
12
13
14
15
IN1IN1+
Hall sensor signal input pins.
IN2IN2+
IN+ > IN-, and a low-level state is
IN3IN3+
If noise on the Hall sensor signal
4
6
8
5
7
9
A high-level state is recognized when
recognized under the reverse condition.
becomes a problem, insert capacitors
between the IN+ and IN- inputs.
16
EI+
Control amplifier inputs.
17
EI-
The PWMIN pin must be held at the low
level for control using this pin to
function.
Continued on next page.
16/39
LB11696V Application Note
Continued from preceding page.
Pin No.
18
Pin Name
TOC
Pin function
Equivalent Circuit
Control amplifier output pin.
When the TOC pin voltage rises, the IC
changes the UH, VH, and WH output
signal PWM duty to increase the torque
output.
19
PWM
Shared function pin: PWM oscillator
frequency setting and initial reset pulse
generation
Insert a capacitor between this pin and
ground.
A capacitor of 2000pF sets a frequency
of about 22kHz.
20
RD
Motor constraint detection output pin
This pin output is on when the motor is
VREG
turning and off when the constraint
protection circuit operates.
21
CSD
20
Constraint protection circuit operating
time setting insert a capacitor between
this pin and ground.
This pin must be connected to ground if
the constraint protection circuit is not
used.
22
S/S
Start/Stop input pin.
A low-level input sets the IC to start
mode, and a high-level input sets it to
stop mode.
Continued on next page.
17/39
LB11696V Application Note
Continued from preceding page.
Pin No.
23
Pin Name
PWMIN
Pin function
Equivalent Circuit
PWM pulse input pin.
A low-level input specifies the output
drive state, and a high-level or open
input specifies the output off state.
When this pin is used for control, the
TOC pin voltage must be set to a control
amplifier input that results in a 100%
duty.
24
F/R
F/R
Forward/reverse rotation setting pin.
A low-level specifies forward rotation
and a high-level specifies reverse
rotation. This pin is held high when
open.
25
HP
Hall signal output pin. (this is an
open-collector output)
VREG
One of four output types is selected by
the N1 and N2 pin settings.
26
N1
25
Hall signal output (HP signal) type
selector pin.
Continued on next page.
18/39
LB11696V Application Note
Continued from preceding page.
Pin No.
27
Pin Name
N2
Pin function
Equivalent Circuit
Hall signal output (HP signal) type
selector pin.
28
LVS
Under-voltage protection voltage
detection pin.
If 5V or higher supply voltage is to be
detected, set the detection voltage by
inserting an appropriate zener diode in
series.
29
VREG
Stabilized power supply output (5V
output) pin
VCC
Insert a capacitor (about 0.1µF)
between this pin and ground for power
stabilization.
29
30
VCC
Power supply pin.
Insert a capacitor between this pin and
ground to prevent the influence of noise,
etc.
19/39
LB11696V Application Note
Hall Sensor Signal Input / Output Timing Chart
(IN = “H” indicates the state in which IN+ is greater than IN-.)
20/39
LB11696V Application Note
LB11696V Functional Description
1. Output Drive Circuit
The LB11696V adopts direct PWM drive to minimize power loss in the output. The output transistor are
always saturated when on, and motor drive power is adjusted by changing the on duty of the output. The
output PWM switching is performed on the UH, VH, and WH output. Since the UL to WL and UH to WH
outputs have the same output form, applications can select either low side PWM or high side PWM drive by
changing the way the external output transistors are connected. Since the reverse recovery time of the
diodes connected to the non-PWM side of the outputs is a problem, these devices must be selected with care.
(This is because through currents will flow at the instant the PWM side transistors turn on if diodes with a
short reverse recovery time are not used.)
2. Current Limiter Circuit
The current limiter circuit limits the output current peak value to a level
Determined by the equation I = VFR / Rf (VFR = 0.25V typical, Rf:
current detection resistor). This circuit suppresses the output current by
reducing the output on duty.
High-precision detection can be implemented by connecting the lines
from the RF and RFGND pins close to the two terminal of the current
detection resistor Rf.
The current limiter circuit includes an internal filter circuit to prevent
incorrect current limiter circuit operation due to detecting the output diode
reverse recovery current due to PWM operation. Although there should be no problems with the internal filter
circuit in normal applications, applications should add an external filter circuit (such as an RC low-pass filter)
if incorrect operation occurs (if the diode recovery current flows for longer than 1µs).
3. Power Saving Circuit
This IC goes to a low-power mode (power saving state) when set to the
stop state with the S/S pin. In the power saving state, the bias currents in
most of the circuits are cut off. However, the 5V regulator output
(VREG) is still provided in the power saving state. If it is also necessary
to cut the Hall device bias current, this function can be provided by an
application that, for example, connects the Hall devices to 5V through
PNP transistors.
4. Notes on PWM Frequency
The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.
fPWM  1/(22500 X C)
If a 2000pF capacitor is used, the circuit will oscillate at about 22kHz. If the PWM frequency is too low,
switching noise will be audible from the motor, and if is too high, the output power loss will increase. Thus a
frequency in the range 15k to 50kHz must be used. The capacitor’s ground terminal must be placed as close
as possible to the IC’s ground pin to minimize the influence of output noise and other noise sources.
5. Control Methods
The output duty can be controlled by either of the following methods
*Control based on comparing the TOC pin voltage to the PWM oscillator waveform
The low side output transistor duty is determined according to the result of comparing the TOC pin voltage to
the PWM oscillator waveform. When the TOC pin voltage is 1.35V or lower, the duty will be 0%, and when it
is 3.0V or higher, the duty will be 100%.
Since the TOC pin is the output of the control amplifier (CTL), a control voltage cannot be directly input to the
TOC pin. Normally, the control amplifier is used as a full feedback amplifier (with the EI- pin connected to the
TOC pin) and a DC voltage is input to EI+ pin (the EI+ pin voltage will become equal to the TOC pin voltage).
When the EI+ pin voltage becomes higher, the output duty increases. Since the motor will be driven when
the EI+ pin in the open state, a pull-down resistor must be connected to the EI+ pin if the motor should not
operate when EI+ is open.
When TOC pin voltage control is used, a low-level input must be applied to the PWMIN pin or that pin
connected to ground.
21/39
LB11696V Application Note
* Pulse Control Using the PWMIN Pin
A pulse signal can be input to the PWMIN pin, and the output can be controlled based on the duty of that
signal. Note that the output is on when a low level is input to the
PWMIN pin, and off when a high level is input. When the PWMIN
pin is open it goes to the high level and the output is turned off.
If inverted input logic is required, this can be implemented with an
external transistor (npn).
When controlling motor operation from the PWMIN pin, the EI- pin
must be connected to ground, and the EI+ pin must be connected
to the TOC pin.
Note that since the PWM oscillator is also used as the clock for
internal circuits, a capacitor (about 2000pF) must be connected
to the PWM pin even if the PWMIN pin is used for motor control.
6. Hall Input Signals
A signal input with an amplitude in excess of the hysteresis (80mV maximum) is required for the Hall inputs.
Considering the possibility of noise and phase displacement, an even larger amplitude is desirable.
If disruptions to the output waveforms (during phase switching) or to the HP output (Hall signal output) occur
due to noise, this must be prevented by inserting capacitors across the inputs. The constraint protection
circuit uses the Hall inputs to discriminate the motor constraint state. Although the circuit is designed to
tolerate a certain amount of noise, care is required when using the constraint protection circuit.
If all three phases of the Hall input signal system go to the same input state, the outputs are all set to the off
state (the UL, VL, WL, UH, VH, and WH outputs all go to the low level).
If the outputs from a Hall IC are used, fixing one side of the inputs (either the + or – side) at a voltage within
the common-mode input voltage range allows the other input side to be used as an input over the 0V to VCC
range.
7. Under-voltage Protection Circuit
The under-voltage protection circuit turns one side of the outputs (UH, VH, and WH) off when the LVS pin
voltage falls below the minimum operation voltage (see the Electrical Characteristics). To prevent this circuit
from repeatedly turning the outputs on and off in the vicinity of the protection
operating voltage, this circuit is designed with hysteresis. Thus the output will
not recover until the operating voltage rises 0.45V (typical).
The protection operating voltage detection level is set up for 5V systems.
The detected voltage level can be increased by shifting the detection level.
The LVS influx current during detection is about 75µA. To increase the diode
current to stabilize the zener diode voltage rise, insert a resistor between the
LVS pin and ground.
If the LVS pin is left open, the internal pull-down resistor will result in the IC seeing a ground level input, and
the output will be turned off. Therefore, a voltage in excess of the LVS circuit clear voltage (about 4.35V)
must be applied to the LVS pin if the application does not use the under-voltage protection circuit. The
maximum rating for the LVS pin applied voltage is 18V.
8. Constraint Protection Circuit
When the motor is physically constrained (held stopped), the CSD pin external capacitor is charged (to
about 3.0V) by a constant current of about 2.5A and is then discharged (to about 1.0V) by a constant
current of about 0.14A.
This process is repeated, generating a saw-tooth waveform. The constraint protection circuit turns motor
drive on and off repeatedly based on this saw-tooth waveform. (The UH, VH, and WH side outputs are
turned on and off.) Motor drive is on during the period the CSD pin external capacitor is being charged from
about 1.0V to about 3.0V, and motor drive is off during the period the CSD pin external capacitor is being
discharged from about 3.0V to about 1.0V.
The IC and the motor are protected by this repeated drive on/off operation when the motor is physically
constrained.
The motor drive on and off times are determined by the value of the connected capacitor C (in µF).
TCSD1 (drive on period)  0.8  C (seconds)
TCSD2 (drive off period)  14.3  C (seconds)
22/39
LB11696V Application Note
When a 0.47F capacitor is connected externally to the CSD pin, this iterated operation will have a drive on
period of about 0.38 seconds and a drive off period of about 6.7 seconds.
While the motor is turning, the discharge pulse signal (generated once for each Hall input period) that is
created by combining the Hall inputs internally in the IC discharges the CSD pin external capacitor. Since the
CSD pin voltage does not rise, the constraint protection circuit does not operate.
When the motor is physically constrained, the Hall inputs do not change and the discharge pulses are not
generated.
As a result, the CSD pin external capacitor is charged by a constant current of 2.5A to about 3.0V, at which
point the constraint protection circuit operates. When the constraint on the motor is released, the constraint
protection function is released.
Connect the CSD pin to ground if the constraint protection circuit is not used.
9. Forward/Reverse Direction Switching
This IC is designed so that through currents (due to the output transistor off delay time when switching) do
not flow in the output when switching directions when the motor is turning. However, if the direction is
switched when the motor is turning, current levels in excess of the current limiter value may flow in the output
transistors due to the motor coil resistance and the motor back EMF state when switching. Therefore,
designers must consider selecting external output transistors that are not destroyed by those current levels
or only switching directions after the speed has fallen below a certain speed.
10. Handling Different Power Supply Types
When this IC is operated from an externally supplied 5V power supply (4.5 to 5.5V), short the VCC pin to the
VREG pin and connect them to the external power supply.
When this IC is operated from an externally supplied 12V power supply (8 to 17 V), connect the VCC pin to
the power supply. (The VREG pin will generate a 5V level to function as the control circuit power supply.)
11. Power Supply Stabilization
Since this IC uses a switching drive technique, the power supply line level can be disturbed easily. Therefore
capacitors with adequate capacitance to stabilize the power supply line must be inserted between VCC and
ground.
If diodes are inserted in the power supply lines to prevent destruction if the power supply is connected with
reverse polarity, the power supply lines are even more easily disrupted, and even larger capacitors are
required.
If the power supply is turned on and off by a switch, and if there is a significant distance between that switch
and the stabilization capacitor, the supply voltage can be disrupted significantly by the line inductance and
surge current into the capacitor. As a result, the withstand voltage of the device may be exceeded. In
application such as this, the surge current must be suppressed and the voltage rise prevented by not using
ceramic capacitors with a low series impedance, and by using electrolytic capacitors instead.
12. VREG Stabilization
To stabilize the VREG voltage, which is the control circuit power supply, a 0.1F or larger capacitor must be
inserted between the VREG pin and ground. The ground side of this capacitor must connected to the IC
ground pin with a line that is as short as possible.
23/39
LB11696V Application Note
Evaluation Board Manual
*This board is designed for Hall element input.
*To use Hall IC input to this board: Please check the application board circuit for Hall IC input.
Wire Connection View of Application board
Hall element input
Components side
Wire Connection View of Application board
Motor connection socket
S/S Switch
F/R Switch
LB11696V
Connection Image…
Image of the motor and application board connection.
Motor
Motor connection socket
Socket pin assignment for motor connection
HUP
HUN
HVP
HVN
HWP
HWN
VH-
14
13
12
11
10
9
8
Top View
1
2
WOUT
NC
3
VOUT
4
5
6
7
NC
UOUT
NC
VH+
Motorconnectionsocket(forHallelementinput)
UOUT, VOUT, WOUT
:Motor driver output
VH+, VH-
:Hall element Bias
HUP, HVP, HWP
:Hall element signal input +
HUN , HVN, HWN
:Hall element signal input -
24/39
LB11696V Application Note
Oscilloscope
CURRENT PROBE
AMPLIFIER1
PROBE
INPUT
OUTPUT
UOUT Current
UOUT
HP
VOUT
WOUT
Power supply
VM=24V
Power supply
Motor
Vcc=12V
Power supply
CTL (EI+)
Test Procedure:
1. Connect the test setup as shown above.
2. Connect CTL power supply (0V to VREG) between EI+ and GND. First, set to 0V.
3. Connect IC power supply (8V to 17V) between VCC and GND. First, set to 12V.
4. Connect motor power supply between VM and GND. *Initially, please set a lower voltage than the rated
voltage of the VM for safety. (*Maximum voltage of capacitor C17 is 100V. Please use the ones that are
sufficient to withstand voltage VM.)
For example, in the case of VM=24Vtyp, please start from VM = 12V (approx.).
5. Please increase EI+ voltage to 3.0V.
25/39
LB11696V Application Note

Initial check
Confirm that the motor rotates smoothly and in the correct direction.
Check the some waveforms.
Check the UOUT, VOUT, WOUT, RD and HP voltage waveform, and the output current waveform of
UOUT by the oscilloscope.
ex) Waveforms can vary depend on usage motors.
VCC=12V, VM=24V, F/R=L
CH1:V-OUT, CH3=HP, CH4=V-OUT current
EI+=2.0V
CH1:V-OUT, CH3=HP, CH4=V-OUT current
EI+=3.0V
The case of Hall Element Input:
Evaluation Board Circuit Diagram (Hall Element Input) (Page27)
Please change the connection of Hall Sensor from VH+ and VH-.
The case of Hall IC Input:
Please refer to Evaluation Board Circuit Diagram (Hall IC Input) (Page32)


Speed control check
You can control rotation of the motor by changing the voltage of “EI+”(16PIN).
EI+ input voltage ranges from 0 to VREG. Depends on voltage, a mode is switched into 2 types of modes: ,
Stop Mode and Drive Mode.
(Drive Mode: 1.0V≤VCTL≤3.0V (TYP))
Please refer to development specification for the details of each mode.
 Stop Mode (0V<CTL<1.0)
Motor rotation stop.
 Drive Mode (1.0V<CTL<3.0V)
Output PWM DUTY is controllable from 0% to 100%.
Forward/Reverse rotation check
“F/R” (24PIN) includes switch (SW) to select between VREG/GND.
You can switch between forward/reverse.
*Please do not use the switch while the motor is in rotation.

Lock detection check (Motor-Lock-mode)
Check the Lock detection behavior. (Lock)
At each VCC, stop the Motor manually by force.
After about 6.7 seconds, the motor will start rotation automatically.

Start/Stop check
“S/S” (22PIN) includes switch (SW) to select between VREG/GND.
You can switch between Start/Stop mode.
“H”:Stop Mode (2.0V<S/S)
“L”:Start Mode (S/S<1.0V)
Note: This board is for evaluations. We do not guarantee the movement with the real product. When you
perform a product design using the part fixed number of this board, please evaluate it enough.
26/39
LB11696V Application Note
*Other Settings
1. Motor lock protection circuit
Time is configured according to capacity of the capacitor (C9) connected to “CSD”(21PIN).
C=0.47μF (CSD pin)
Drive on period setting time≈0.38s
Drive on period setting time (s) ≈0.8×C (μF)
Drive off period setting time≈6.7s
Drive off period setting time (s) ≈14.3×C (μF)
* Connect CSD pin to GND when lock protection is not used.
2. Current limit is adjustable with resistors (R12, R13, R14, R15) connected between “RF”(3PIN) and RFGND.
This circuit limits peak current according to the current which is obtained as follows: I=VRF/Rf
(VRF=0.25Vtyp, Rf: current detection resistance).
Setting value of the peripheral parts is 2.0A.
3. PWM frequency is 20kHz. (C8=2200pF)
*Make sure to use parts with good temperature characteristics.
27/39
LB11696V Application Note
Evaluation Board Circuit Diagram
(Hall element input)
Motor connection socket
28/39
LB11696V Application Note
Bill of Materials for LB11696V Evaluation Board
Designator
Quantity
U1
1
Q1
1
Q2
1
Q3
1
T1
1
T2
1
T3
1
Description
Motor
Pre-Driver
WL:NPN Tr.
for inverted
logic
VL:NPN Tr.
for inverted
logic
UL:NPN Tr.
for inverted
logic
W:Nch FET
for low side
driver
V:Nch FET
for low side
driver
U:Nch FET
for low side
driver
(Hall element input)
Value
Tolerance
Footprint
Manufacturer
Manufacturer Part
Number
Substitution
Allowed
Lead
Free
-
-
SSOP30
(275mil)
ON
Semiconductor
LB11696V
No
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
T4
1
T5
1
T6
1
W:Pch FET
for high side
driver
V:Pch FET
for high side
driver
U:Pch FET
for high side
driver
SW(S/S)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
SW(F/R)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
TP1-TP10
10
Test points
Motor
connection
socket
-
-
MAC8
ST-1-3
yes
yes
YAMAICHI
IC-91-1403-G4
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
-
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD102J
yes
yes
RK73B1JTTD331J
yes
yes
RK73B1JTTD331J
yes
yes
yes
yes
yes
yes
yes
yes
RK73B1JTTD221J
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
yes
yes
yes
yes
yes
yes
1
Socket
R6
R7
R8
R9
R10
R11
R12-15
1
1
1
1
1
1
4
R16-18
3
R19-21
3
R22-24
R25-27
J3
J4
J5
C4
C5
C6
3
3
RD(pull up)
S/S(pull up)
HP(pull up)
1k
(0.1W)
±5％
±5％
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
2012
(0805Inch)
820
(0.33W)
±5％
1k
(0.33W)
Nch FET
Gate resistor
220
(0.1W)
Jumper
0
(0.1W)
RF (filter)
Hall bias
VREG
Hall bias
GND
RF
NPN Tr.
Emitter
resistor
Pch FET
Gate to
Source
330
(0.1W)
330
(0.1W)
0.51
(0.25W)
±5％
±5％
±5％
KOA
KOA
KOA
KOA
KOA
KOA
ROHM
MCR10EZHZJLR51
3216
(1206Inch)
ROHM
ESR18EZPJ821
±5％
3216
(1206Inch)
ROHM
±5％
1608
(0603Inch)
KOA
±5％
1608
(0603Inch)
KOA
KOA
ESR18EZPJ102
EI+ Jumper
0
(0.1W)
±5％
1
EI-(to TOC)
0
(0.1W)
±5％
1608
(0603Inch)
1608
(0603Inch)
1
LVS(to
VREG)
0
(0.1W)
±5％
1608
(0603Inch)
KOA
IN3+/ -
4700pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
IN2+/ -
4700pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
IN1+/ -
4700pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
1
1
1
1
KOA
Continued on next page.
29/39
LB11696V Application Note
Continued from preceding page.
C7
C8
C9
C10
C12
C13
C14-16
C17
C18
1
EI+ Bypass Capacitor
0.1uF
/25V
1
PWM
2200pF
/50V
CSD
0.47uF
/25V
±10％
1
VREG Bypass capacitor
0.1uF
/25V
±10％
1
VCC Bypass
Capacitor
10uF
/25V
±10％
RF (filter)
1000pF
/50V
1
Pch FET Gate to Source
1000pF
/50V
1
VM Bypass Capacitor
47uF
/100V
VM Bypass Capacitor
0.1uF
/25V
1
1
1
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM188B11E104K
MURATA
GRM1882C1H222J
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM188B31E474KA
MURATA
GRM188B11E104K
3216
(1206Inch)
MURATA
GRM31CB31E106KA
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
PANASONIC
ECA2AHG470
MURATA
GRM188B11E104K
±10％
±5％
±20％
±10％
1608
(0603Inch)
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
30/39
LB11696V Application Note
The points for attention in design applications

VM, and each OUT, where large current flows should be laid out as fat and short as possible.

VM and each OUT of high voltage line should be separated at least 3.2 mm or more from other patterns.

VM bypass capacitor should be mounted as near as possible to Source pin of SFT1342.

VCC bypass capacitor should be mounted as near as possible to VCC pin of LB11696V.

VREG bypass capacitor should be mounted as near as possible to VREG pin.

Do not exceed the absolute maximum ratings under no circumstance.

"PGND" is the ground of the power system. "GND" is a small signal ground. They need to be laid out
without any common impedance.

The impedance of the island of GND needs to be as low as possible by making through-holes, for example.

We recommend that the GND lines to connect a stabilization capacitor of VCC and to VM bypass capacitor
are laid out independently and single-point-grounded at VM bypass capacitor

VREG should be used in the IC as reference voltage. Capacitor should be connected between VREG pin
and GND to stabilize VREG.

VREG can be used as reference voltage for CTL(EI+) voltage setting. Therefore CTL(EI+) can be
connected to VREG after having been devided with resistors.
VREG can not be recommended to use for peripheral circuits because their output voltage are not so high

in precision.
F/R pin should be connected to 50kΩ pull-up in the chip. If the pin is open, the IC receives signals as H. But

it may detect the signal falsely when the pin is affected by noise. When the pin is input H, it is
recommended to switch to VREG pin.
S/S pin is open. (High impedance) Therefore, when the pin is input H, it is recommended to switch to

VREG. When the pin is input L, it is recommended to switch to ground.

For CSD pin, make sure to connect this pin to GND when you do not use protection circuit.

N1 & N2 pin should be connected to 50kΩ pull-up in the chip. If the pin is open, the IC receives signals as
H. But it may detect the signal falsely when the pin is affected by noise. When the pin is input H, it is
recommended to switch to VREG pin.
31/39
LB11696V Application Note
Evaluation Board PCB Design
70.2mm
70.2mm
85.2mm
(Top side/ Pattern)
(Back side/ Pattern)
(Top side/ Resist & Silk)
(Back side/ Resist & Silk)
Allowable power disspation Pdmax -W
2.0
Specified circuit board :
70.2 x 85.2 x 1.6 mm3 Two layer glass epoxy board 1.25
1.0
0.50
0.0
-20
0
20
40
60
80
100
120
Ambient temperature, Ｔａ -℃
Pdmax - Ta
32/39
LB11696V Application Note
Application Circuit Example
Evaluation Board Circuit Diagram
(Hall IC Input)
Motor connection socket
Note : The Hall IC to be used must be of open collector or open drain type (no internal pull-up resistor connected to the output).
33/39
LB11696V Application Note
Application Circuit Example
Bill of Materials for LB11696V Evaluation Board
Designator
Quantity
U1
1
Q1
1
Q2
1
Q3
1
T1
1
T2
1
T3
1
Description
Motor
Pre-Driver
WL:NPN Tr.
for inverted
logic
VL:NPN Tr.
for inverted
logic
UL:NPN Tr.
for inverted
logic
W:Nch FET
for low side
driver
V:Nch FET
for low side
driver
U:Nch FET
for low side
driver
(Hall IC Input)
Value
Tolerance
Footprint
Manufacturer
Manufacturer Part
Number
Substitution
Allowed
Lead
Free
-
-
SSOP30
(275mil)
ON
Semiconductor
LB11696V
No
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
T4
1
T5
1
T6
1
W:Pch FET
for high side
driver
V:Pch FET
for high side
driver
U:Pch FET
for high side
driver
SW(S/S)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
SW(F/R)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
TP1-TP10
10
Test points
Motor
connection
socket
Hall out(pull
up)
Hall out(pull
up)
Hall out(pull
up)
-
-
MAC8
ST-1-3
yes
yes
YAMAICHI
IC-91-1403-G4
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
-
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD102J
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
yes
yes
yes
yes
yes
yes
RK73B1JTTD221J
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
1
Socket
R1
1
R2
1
R3
1
R4
R5
R6
R7
R8
R9
R10
R11
R12-15
1
1
1
1
1
1
1
1
4
R16-18
3
R19-21
3
R22-24
R25-27
J1
Input bias
Input bias
RD(pull up)
S/S(pull up)
HP(pull up)
RF (filter)
Hall bias
VREG
Hall bias
GND
RF
NPN Tr.
Emitter
resistor
Pch FET
Gate to
Source
1k
(0.1W)
±5％
±5％
±5％
±5％
±5％
±5％
±5％
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
KOA
KOA
KOA
KOA
KOA
KOA
KOA
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
2012
(0805Inch)
820
(0.33W)
±5％
3216
(1206Inch)
ROHM
1k
(0.33W)
±5％
3216
(1206Inch)
ROHM
±5％
1608
(0603Inch)
KOA
KOA
KOA
0
(0.1W)
0
(0.1W)
0.51
(0.25W)
±5％
±5％
±5％
Nch FET
Gate resistor
220
(0.1W)
3
Jumper
0
(0.1W)
±5％
1608
(0603Inch)
1
IN2- bias
(Jumper)
0
(0.1W)
±5％
1608
(0603Inch)
3
KOA
KOA
KOA
KOA
ROHM
MCR10EZHZJLR51
ESR18EZPJ821
ESR18EZPJ102
yes
Continued on next page.
34/39
LB11696V Application Note
Continued from preceding page.
J2
J3
J4
J5
C1
C2
C3
C7
C8
C9
C10
C12
C13
C14-16
C17
C18
IN3- bias (Jumper)
0
(0.1W)
EI+ Jumper
0
(0.1W)
EI-(to TOC)
0
(0.1W)
±5％
1
LVS(to VREG)
0
(0.1W)
±5％
1
IN1+
4700pF
/50V
IN2+
4700pF
/50V
1
IN3+
4700pF
/50V
1
EI+ Bypass Capacitor
0.1uF
/25V
1
PWM
2200pF
/50V
CSD
0.47uF
/25V
±10％
1
VREG Bypass capacitor
0.1uF
/25V
±10％
1
VCC Bypass
Capacitor
10uF
/25V
RF (filter)
1000pF
/50V
3
Pch FET Gate to Source
1000pF
/50V
1
VM Bypass Capacitor
47uF
/100V
VM Bypass Capacitor
0.1uF
/25V
1
1
1
1
1
1
1
±5％
1608
(0603Inch)
KOA
1608
(0603Inch)
1608
(0603Inch)
KOA
KOA
±5％
1608
(0603Inch)
1608
(0603Inch)
±5％
KOA
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
MURATA
GRM188B11H472K
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM188B11E104K
MURATA
GRM1882C1H222J
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM188B31E474KA
MURATA
GRM188B11E104K
3216
(1206Inch)
MURATA
GRM31CB31E106KA
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
PANASONIC
ECA2AHG470
MURATA
GRM188B11E104K
±10％
±5％
±10％
±20％
±10％
1608
(0603Inch)
35/39
LB11696V Application Note
Evaluation Board Full Circuit Diagram
Motor connection socket
36/39
LB11696V Application Note
Application Circuit Example
Bill of Materials for LB11696V Evaluation Board
Designator
Quantity
U1
1
Q1
1
Q2
1
Q3
1
T1
1
T2
1
T3
1
Description
Motor
Pre-Driver
WL:NPN Tr.
for inverted
logic
VL:NPN Tr.
for inverted
logic
UL:NPN Tr.
for inverted
logic
W:Nch FET
for low side
driver
V:Nch FET
for low side
driver
U:Nch FET
for low side
driver
(All parts)
Value
Tolerance
Footprint
Manufacturer
Manufacturer Part
Number
Substitution
Allowed
Lead
Free
-
-
SSOP30
(275mil)
ON
Semiconductor
LB11696V
No
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
CPA
ON
Semiconductor
2SC2812N
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1446
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
-
-
TP-FA
ON
Semiconductor
SFT1342
yes
yes
T4
1
T5
1
T6
1
W:Pch FET
for high side
driver
V:Pch FET
for high side
driver
U:Pch FET
for high side
driver
SW(S/S)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
SW(F/R)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
SW(N1)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
SW(N2)
1
Switch
-
-
MIYAMA
MS-611A-A01
yes
yes
TP1-TP25
25
-
-
MAC8
ST-1-3
yes
yes
ZD1
1
Test points
Zener diode
for Low
Voltage
Shutdown
Motor
connection
socket
Hall out(pull
up)
Hall out(pull
up)
Hall out(pull
up)
5.1V
-
yes
yes
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
10k
(0.1W)
-
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD103J
yes
yes
RK73B1JTTD102J
yes
yes
RK73B1JTTD331J
yes
yes
RK73B1JTTD331J
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
1
Socket
R1
1
R2
1
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12-15
1
1
1
1
1
1
1
1
1
4
R16-18
3
R19-21
3
R22-24
3
Input bias
Input bias
RD(pull up)
S/S(pull up)
HP(pull up)
RF (filter)
Hall bias
VREG
Hall bias
GND
RF
NPN Tr.
Emitter
resistor
Pch FET
Gate to
Source
Nch FET
Gate resistor
SMA
ON
Semiconductor
YAMAICHI
1k
(0.1W)
±5％
±5％
±5％
±5％
±5％
±5％
±5％
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
KOA
KOA
KOA
KOA
KOA
KOA
KOA
KOA
±5％
1608
(0603Inch)
1608
(0603Inch)
1608
(0603Inch)
2012
(0805Inch)
820
(0.33W)
±5％
3216
(1206Inch)
ROHM
1k
(0.33W)
±5％
3216
(1206Inch)
ROHM
±5％
1608
(0603Inch)
KOA
330
(0.1W)
330
(0.1W)
0.51
(0.25W)
220
(0.1W)
±5％
±5％
±5％
KOA
KOA
KOA
1SMA5918BT3G
IC-91-1403-G4
ROHM
MCR10EZHZJLR51
ESR18EZPJ821
ESR18EZPJ102
RK73B1JTTD221J
Continued on next page.
37/39
LB11696V Application Note
Continued from preceding page.
R25-27
J1
J2
J3
J4
J5
J6
J7
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C12
C13
C14-16
C17
C18
C19
C20
C21
C22
C23
C24
3
Jumper
0
(0.1W)
±5％
1608
(0603Inch)
KOA
1608
(0603Inch)
1608
(0603Inch)
KOA
KOA
IN2- bias (Jumper)
0
(0.1W)
IN3- bias (Jumper)
0
(0.1W)
±5％
1
EI+ Jumper
0
(0.1W)
±5％
1
EI-(to TOC)
0
(0.1W)
±5％
1608
(0603Inch)
1608
(0603Inch)
LVS(to VREG)
0
(0.1W)
±5％
1608
(0603Inch)
KOA
1
N1(to GND)
0
(0.1W)
±5％
1608
(0603Inch)
KOA
1
N2(to GND)
0
(0.1W)
KOA
1
IN1+
4700pF
/50V
±5％
1608
(0603Inch)
1608
(0603Inch)
IN2+
4700pF
/50V
IN3+
4700pF
/50V
IN3+/ -
4700pF
/50V
1
1
1
±5％
±5％
KOA
KOA
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
RK73B1J 0ΩJ
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
MURATA
GRM188B11H472K
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
IN2+/ -
4700pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
IN1+/ -
4700pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM188B11H472K
EI+ Bypass Capacitor
0.1uF
/25V
MURATA
GRM188B11E104K
PWM
2200pF
/50V
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM1882C1H222J
1
CSD
0.47uF
/25V
±10％
MURATA
GRM188B31E474KA
1
VREG Bypass capacitor
0.1uF
/25V
±10％
1608
(0603Inch)
1608
(0603Inch)
MURATA
GRM188B11E104K
1
VCC Bypass
Capacitor
10uF
/25V
±10％
3216
(1206Inch)
MURATA
GRM31CB31E106KA
1
RF (filter)
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Pch FET Gate to Source
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
VM Bypass Capacitor
47uF
/100V
±20％
PANASONIC
ECA2AHG470
VM Bypass Capacitor
0.1uF
/25V
±10％
1608
(0603Inch)
MURATA
GRM188B11E104K
Nch FET Gate to Source
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Pch FET Gate to Drain
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Nch FET Gate to Source
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Pch FET Gate to Drain
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Nch FET Gate to Source
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
Pch FET Gate to Drain
1000pF
/50V
±5％
1608
(0603Inch)
MURATA
GRM1882C1H102J
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
±10％
±5％
-
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LB11696V Application Note
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any
such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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