TDA18274 Hybrid (analog and digital) silicon tuner for terrestrial and cable TV reception Rev. 1 — 11 February 2013 Product short data sheet 1. General description The TDA18274 is a high performance silicon tuner designed for terrestrial and cable TV reception for both analog and digital signals. The TDA18274 supports all analog and digital TV standards and delivers a Low IF (LIF) signal to a demodulator for analog TV and/or a channel demodulator for digital TV. The TDA18274 facilitates TV design by: • • • • Allowing on-board integration Drastically reducing the tuner Bill Of Material (BOM) Providing flexibility in system solution development Allowing straightforward and cost effective multi-tuner applications optimization 2. Features and benefits Single 3.3 V supply voltage Worldwide multistandard terrestrial and cable capabilities Alignment free RoHS compliant I2C-bus interface compatible with 3.3 V microcontrollers Crystal oscillator output buffer as well as Slave Tuner Output (STO) for multiple tuner applications Fully integrated oscillators Fully integrated RF selectivity (no need for RF tracking filters coils) (TDA18274HD only) 2 programmable General-Purpose Outputs (GPO) 1.7 MHz, 6 MHz, 7 MHz, 8 MHz and 10 MHz channel bandwidths LIF channel center frequency output ranging from 0.8 MHz to 7.5 MHz Fully integrated IF selectivity; eliminating the need for external SAW filters Large flexibility in the IF filtering stage to ease the matching with various demodulators circuits Single-ended RF input, no need for external balun Up to 1 GHz RF input capability Excellent return loss compatible with cable requirements Power Level Detector (PLD) embedded Integrated gain control Self-AGC synchronization mode (VSync) for analog reception TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception Very fast tuning time Strong immunity to LTE interferers in the digital dividend bandwidth Strong immunity to WLAN interferers 3. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit - 1002 MHz LNA Zi = 1 and RF < 870 MHz 4.0 4.6 dB LNA Zi = 1 and 870 MHz < RF < 1 GHz 5.4 6 dB fRF RF frequency full range of RF input 42 NFtun tuner noise figure 75 impedance source; maximum gain - jit phase jitter integrated from 250 Hz to 4 MHz - 0.4 0.6 degree image image rejection worst case, measured at 4 MHz IF frequency and for image levels above 60 dBV 57.5 63 - dB CSO composite worst interferer over RF second-order distortion frequency with respect to wanted carrier [1] - 60 50 dBc CTB composite triple beat worst interferer over RF frequency with respect to wanted carrier for frequency 550 MHz [1] - -65 60 dBc worst interferer over RF frequency with respect to wanted carrier for frequency > 550 MHz [1] - - 55 dBc 120 - - dBV ICP1dB [1] 1 dB input compression point at the tuner input and minimum gain Test scenario: 129 channels each 75 dBV. 4. Ordering information Table 2. Ordering information Type number Package Name Description Version plastic thermal enhanced very thin quad flat package; no leads; 40 terminals; body 6 6 0.85 mm SOT618-6 TDA18274HD/C1 HLQFN48R plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 7 7 1.15 mm SOT995-2 TDA18274HN/C1 HVQFN40 TDA18274_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. All rights reserved. 2 of 8 TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception 5. Block diagram to a second TDA18274 CAPRFAGC STO LNA/RF splitter RF tracking filter H3H5 and wireless filter IR mixer IF filters IF amplifier IFP RFIN SURGE AND CB TRAP FILTER IFN VIFAGC RF AGC CAPSMOOTH LO DIVIDER XTALINSEL clock input buffer GAIN MANAGEMENT VSYNC SCL POWER LEVEL DETECTOR I2C-bus SDA INTERFACE XTALP Xtal oscillator LC-VCO VCO REGULATOR ∆∑ PLL XTALN XTOUT1 AS TEMPERATURE SENSOR IRQ l/O clock output buffer XTOUT2 CP VTUNE GPO2 CAPREGVCO GPO1/RFAGC_SENSE PLL loop filter Fig 1. aaa-002350 Block diagram 6. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit 0.3 +3.6 V 0.3 VCC + 0.3 V VCC supply voltage VI input voltage 0.3 +3.6 V Tstg storage temperature 40 +150 C Tj junction temperature - 150 Tamb ambient temperature 20 VESD electrostatic discharge voltage VCC < 3.3 V VCC > 3.3 V C [1] C EIA/JESD22-A114 (HBM) 2 +2 kV EIA/JESD22-C101-C (FCDM) class III[2] 750 - V GPO pins: GPO1/RFAGC_SENSE and GPO2 VCC supply voltage 0 V < Vpu < 5.5 V; Rpu > 390 0.3 +5.5 V ICC supply current corresponding GPO ON 20 0 mA TDA18274_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. All rights reserved. 3 of 8 TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception [1] The maximum allowed ambient temperature Tamb(max) depends on the assembly conditions of the package and especially on the design of the Printed-Circuit Board (PCB) and die connection. The application mounting must be done in such a way that the maximum junction temperature is never exceeded. The junction temperature can be obtained by reading the temperature sensor bit via I2C-bus. The junction temperature: Tj = Tamb + Tj-c. where Tj-c = power Rth. [2] Class III: 500 V to 1000 V. 7. Abbreviations Table 4. TDA18274_SDS Product short data sheet Abbreviations Acronym Description AGC Automatic Gain Control BOM Bill Of Material FCDM Field-induced Charged-Device Model GPO General Purpose Outputs H3H5 Harmonic 3 and Harmonic 5 HBM Human Body Model IF Intermediate Frequency I/O Input/Output LC-VCO Inductors and Capacitors - Voltage Controlled Oscillator LIF Low IF LNA Low-Noise Amplifier LO Local Oscillator LTE Long-Term Evolution LTO Loop-Through Output PLD Power Level Detector PLL Phase-Locked Loop RF Radio Frequency RoHS Restriction of Hazardous Substances SAW Surface Acoustic Wave STB Set-Top Box STO Slave Tuner Output VCO Voltage Controlled Oscillator Xtal Crystal WLAN Wireless Local Area Network All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. All rights reserved. 4 of 8 TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception 8. Revision history Table 5. Revision history Document ID Release date Data sheet status Change notice Supersedes TDA18274_SDS v.1 20130211 Product short data sheet - - TDA18274_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. All rights reserved. 5 of 8 TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. 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Licenses ICs with DVB-T or DVB-T2 functionality Use of this product in any manner that complies with the DVB-T or the DVB-T2 standard may require licenses under applicable patents of the DVB-T respectively the DVB-T2 patent portfolio, which license is available from Sisvel S.p.A., Via Sestriere 100, 10060 None (TO), Italy, and under applicable patents of other parties. 9.5 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus — logo is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] TDA18274_SDS Product short data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2013 © NXP B.V. 2013. All rights reserved. 7 of 8 TDA18274 NXP Semiconductors Hybrid silicon tuner for terrestrial and cable TV reception 11. Contents 1 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 9.5 10 11 General description . . . . . . . . . . . . . . . . . . . . . . Features and benefits . . . . . . . . . . . . . . . . . . . . Quick reference data . . . . . . . . . . . . . . . . . . . . . Ordering information . . . . . . . . . . . . . . . . . . . . . Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . . . Legal information. . . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information. . . . . . . . . . . . . . . . . . . . . . Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 2 2 3 3 4 5 6 6 6 6 7 7 7 8 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 11 February 2013 Document identifier: TDA18274_SDS