Freescale Semiconductor Technical Data Document Number: AFT18HW355S Rev. 1, 1/2013 RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET This 63 watt asymmetrical Doherty RF power LDMOS transistor is designed for cellular base station applications requiring very wide instantaneous bandwidth capability covering the frequency range of 1805 to 1880 MHz. Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Volts, IDQA = 1100 mA, VGSB = 1.45 Vdc, Pout = 63 Watts Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Frequency Gps (dB) D (%) Output PAR (dB) ACPR (dBc) IRL (dB) 1805 MHz 14.8 48.1 7.3 --27.2 --13 1840 MHz 15.3 48.9 7.4 --27.7 --12 1880 MHz 15.2 48.3 7.5 --29.2 --9 AFT18HW355SR6 1805--1880 MHz, 63 W AVG., 28 V Features Advanced High Performance In--Package Doherty Designed for Wide Instantaneous Bandwidth Applications Greater Negative Gate--Source Voltage Range for Improved Class C Operation Designed for Digital Predistortion Error Correction Systems In Tape and Reel. R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel. For R5 Tape and Reel option, see p. 15. NI--1230S--4 Carrier 1 RFoutA/VDSA RFinA/VGSA 3 (1) 2 RFoutB/VDSB RFinB/VGSB 4 Peaking (Top View) Figure 1. Pin Connections 1. Pin connections 1 and 2 are DC coupled and RF independent. Freescale Semiconductor, Inc., 2013. All rights reserved. RF Device Data Freescale Semiconductor, Inc. AFT18HW355SR6 1 Table 1. Maximum Ratings Symbol Value Unit Drain--Source Voltage Rating VDSS --0.5, +65 Vdc Gate--Source Voltage VGS --6.0, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg --65 to +150 C Case Operating Temperature Range TC --40 to +125 C TJ --40 to +225 C CW 259 0.64 W W/C Operating Junction Temperature Range (1,2) CW Operation @ TC = 25C Derate above 25C Table 2. Thermal Characteristics Characteristic Symbol Thermal Resistance, Junction to Case Case Temperature 77C, 63 W CW, 28 Vdc, IDQA = 1100 mA, VGSB = 1.45 Vdc, 1840 MHz Case Temperature 106C, 225 W CW(4), 28 Vdc, IDQA = 1100 mA, VGSB = 1.45 Vdc, 1840 MHz RJC Value (2,3) Unit C/W 0.47 0.30 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 2 Machine Model (per EIA/JESD22--A115) B Charge Device Model (per JESD22--C101) IV Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 5 Adc Gate--Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (VDS = 10 Vdc, ID = 146 Adc) VGS(th) 1.6 2.1 2.6 Vdc Gate Quiescent Voltage (VDD = 28 Vdc, IDA = 1100 mAdc, Measured in Functional Test) VGS(Q) 2.4 2.9 3.4 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 1.5 Adc) VDS(on) 0.1 0.2 0.3 Vdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 291 Adc) VGS(th) 1.6 2.1 2.6 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 2.9 Adc) VDS(on) 0.1 0.2 0.3 Vdc Characteristic Off Characteristics (5) On Characteristics -- Side A (5) (Carrier) On Characteristics -- Side B (5) (Peaking) 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1955. 4. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. 5. Each side of device measured separately. (continued) AFT18HW355SR6 2 RF Device Data Freescale Semiconductor, Inc. Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Functional Tests (1,2,3) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 1100 mA, VGSB = 1.45 Vdc, Pout = 63 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 14.2 15.2 17.0 dB Drain Efficiency D 45.0 48.3 — % Output Peak--to--Average Ratio @ 0.01% Probability on CCDF Adjacent Channel Power Ratio Input Return Loss PAR 7.1 7.5 — dB ACPR — --29.2 --26.0 dBc IRL — --9 --8 dB Load Mismatch (In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 1100 mA, VGSB = 1.45 Vdc, f1 = 1795 MHz, f2 = 1895 MHz, 2--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Carriers. PAR = 9.9 dB @ 0.01% Probability on CCDF. VSWR 10:1 at 32 Vdc, 252 W W--CDMA Output Power No Device Degradation Typical Performances (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 1100 mA, VGSB = 1.45 Vdc, 1805--1880 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 350 (4,5) — W Pout @ 3 dB Compression Point (6) P3dB — 400 — W — 22 — VBWres — 150 — MHz Gain Flatness in 75 MHz Bandwidth @ Pout = 63 W Avg. GF — 0.63 — dB Gain Variation over Temperature (--30C to +85C) G — 0.01 — dB/C P1dB — 0.013 — dB/C AM/PM (Maximum value measured at the P3dB compression point across the 1805--1880 MHz frequency range) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Output Power Variation over Temperature (--30C to +85C) (5) 1. 2. 3. 4. 5. 6. Part internally matched both on input and output. VDDA and VDDB must be tied together and powered by a single DC power supply. Measurement made with device in an asymmetrical Doherty configuration. Calculated from load pull P3dB measurements. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 3 C15 C13 VGGA C5 C11 VDDA R1 C9 AFT18HW355S Rev. 3 C3 C1 C7 CUT OUT AREA C R3 C2 C4 C8 P C10 R2 VGGB VDDB C12 C6 C14 C16 Note 1: VDDA and VDDB must be tied together and powered by a single DC power supply. Figure 2. AFT18HW355SR6 Test Circuit Component Layout Table 5. AFT18HW355SR6 Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2, C3, C4, C7, C9, C10 18 pF Chip Capacitors GQM2195C2A180JB12D Murata C5, C6 2.2 F Chip Capacitors C1206C225K4RAC Kemet C8 8.2 pF Chip Capacitor ATC100B8R2CT500XT ATC C11, C12 2.2 F Chip Capacitors C1825C225K5RAC Kemet C13, C14 22 F Chip Capacitors C5750Y5V1H226Z TDK C15, C16 470 F, 63 V Electrolytic Capacitors MCGPR63V477M13X26--RH Multicomp R1, R2 2.2 , 1/4 W Chip Resistors CRCW12062R20JNEA Vishay R3 50 , 10 W Chip Resistor 81A7031--50--5F Florida RF Labs PCB 0.020, r = 3.5 RO4350B Rogers AFT18HW355SR6 4 RF Device Data Freescale Semiconductor, Inc. D 15.5 15 Gps 14.5 14 ACPR 48 47 46 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF --27 --4 --28 --6 --29 13.5 PARC 13 --30 12.5 --31 IRL 12 1760 1780 1800 1820 1840 1860 1880 1900 --8 --10 --12 --32 1920 --14 --2.2 --2.4 --2.6 --2.8 --3 PARC (dB) Gps, POWER GAIN (dB) 16 49 VDD = 28 Vdc, Pout = 63 W (Avg.) IDQA = 1100 mA, VGSB = 1.45 Vdc Single--Carrier W--CDMA IRL, INPUT RETURN LOSS (dB) 50 16.5 ACPR (dBc) 17 D, DRAIN EFFICIENCY (%) TYPICAL CHARACTERISTICS --3.2 f, FREQUENCY (MHz) IMD, INTERMODULATION DISTORTION (dBc) Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 63 Watts Avg. --20 IM3--U --30 IM3--L IM5--L --40 IM5--U --50 IM7--U IM7--L VDD = 28 Vdc, Pout = 53 W (PEP), IDQA = 1100 mA VGSB = 1.45 Vdc, Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 1840 MHz --60 --70 1 10 100 200 TWO--TONE SPACING (MHz) 16.5 1 16 15.5 15 14.5 14 0 D --1 dB = 15 W --15 50 --20 40 ACPR --1 30 PARC --2 dB = 42 W Gps --2 20 --3 dB = 71 W VDD = 28 Vdc, IDQA = 1100 mA VGSB = 1.45 Vdc, f = 1840 MHz Single--Carrier W--CDMA 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF --3 --4 60 10 25 40 55 70 --25 --30 ACPR (dBc) 2 D DRAIN EFFICIENCY (%) 17 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 4. Intermodulation Distortion Products versus Two--Tone Spacing --35 10 --40 0 --45 85 Pout, OUTPUT POWER (WATTS) Figure 5. Output Peak--to--Average Ratio Compression (PARC) versus Output Power AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 5 TYPICAL CHARACTERISTICS 1840 MHz 16 1805 MHz 15 1840 MHz 13 1880 MHz 12 ACPR 1880 MHz 1805 MHz Gps 1880 MHz --10 50 --20 40 30 20 1840 MHz 1805 MHz 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 1 60 10 100 10 0 300 --30 --40 --50 ACPR (dBc) Gps, POWER GAIN (dB) 17 14 D VDD = 28 Vdc, IDQA = 1100 mA VGSB = 1.45 Vdc, Single--Carrier W--CDMA D, DRAIN EFFICIENCY (%) 18 --60 --70 Pout, OUTPUT POWER (WATTS) AVG. Figure 6. Single--Carrier W--CDMA Power Gain, Drain Efficiency and ACPR versus Output Power 19 GAIN (dB) 17 15 VDD = 28 Vdc Pin = 0 dBm IDQA = 1100 mA VGSB = 1.45 Vdc 10 5 Gain 15 0 13 --5 IRL 11 9 1700 IRL (dB) 21 --10 1750 1800 1850 1900 1950 2000 2050 --15 2100 f, FREQUENCY (MHz) Figure 7. Broadband Frequency Response AFT18HW355SR6 6 RF Device Data Freescale Semiconductor, Inc. VDD = 28 Vdc, IDQA = 1100 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power (1) P1dB P3dB Max Linear Gain (dB) (dBm) (W) D (%) AM/PM () (dBm) (W) D (%) AM/PM () f (MHz) Zsource () Zin () 1805 1.14 - j4.15 1.12 + j4.37 1.21 - j4.03 18.3 51.8 151 58.1 9.2 52.7 186 60.0 15 1840 1.14 - j4.41 1.32 + j4.55 1.24 - j4.24 18.4 51.6 145 57.4 9.1 52.6 182 59.4 16 1880 1.54 - j4.56 1.61 + j4.79 1.23 - j4.39 18.2 51.7 148 56.6 9.2 52.6 182 58.3 15 Zload () (1) Load impedance for optimum P1dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload Figure 8. Carrier Side Load Pull Performance — Maximum P1dB Tuning VDD = 28 Vdc, IDQA = 1100 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Max Linear Gain (dB) (dBm) 1805 1.14 - j4.15 1.08 + j4.44 2.56 - j3.08 21.1 1840 1.14 - j4.41 1.25 + j4.64 2.54 - j2.75 1880 1.54 - j4.56 1.53 + j4.87 2.30 - j3.10 P3dB (W) D (%) AM/PM () (dBm) (W) D (%) AM/PM () 49.9 98 69.8 15 50.6 115 71.8 24 21.6 49.3 85 68.9 16 50.6 115 71.2 26 21.3 49.6 91 68.1 16 50.6 115 70.1 26 (1) Load impedance for optimum P1dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload Figure 9. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 7 VDD = 28 Vdc, VGSB = 1.7 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power (1) P1dB P3dB Max Linear Gain (dB) (dBm) (W) D (%) AM/PM () (dBm) (W) D (%) AM/PM () f (MHz) Zsource () Zin () 1805 0.88 - j3.59 0.97 + j3.83 1.35 - j4.28 15.1 54.8 302 57.0 29 54.9 309 64.7 39 1840 1.07 - j3.87 1.25 + j4.16 1.37 - j4.53 15.0 54.7 295 55.3 29 55.2 331 61.4 38 1880 1.66 - j4.15 1.80 + j4.58 1.56 - j4.77 15.1 54.6 288 55.6 28 55.3 339 58.8 36 Zload () (1) Load impedance for optimum P1dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload Figure 10. Peaking Side Load Pull Performance — Maximum P1dB Tuning VDD = 28 Vdc, VGSB = 1.7 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Max Linear Gain (dB) (dBm) 1805 0.88 - j3.59 0.86 + j3.78 2.24 - j2.33 16.7 1840 1.07 - j3.87 1.10 + j4.10 2.05 - j2.42 1880 1.66 - j4.15 1.59 + j4.49 2.08 - j2.52 P3dB (W) D (%) AM/PM () (dBm) (W) D (%) AM/PM () 52.4 174 72.4 36 53.2 209 72.0 45 16.8 52.3 170 71.6 37 53.2 209 71.0 46 16.6 52.1 162 70.4 36 53.1 204 70.0 44 (1) Load impedance for optimum P1dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload Figure 11. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning AFT18HW355SR6 8 RF Device Data Freescale Semiconductor, Inc. P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz --1.5 --1.5 --2 --2 47.5 48 E --3 --3.5 --4 P --4.5 51.5 51 --5 50 --6 49 0.5 E --3 --4 64 62 60 58 56 54 52 P --4.5 1 1.5 --5.5 48 49.5 2 2.5 3 3.5 --6 4 0.5 1 1.5 REAL () 2 3 2.5 3.5 4 REAL () Figure 12. P1dB Load Pull Output Power Contours (dBm) Figure 13. P1dB Load Pull Efficiency Contours (%) --1.5 --1.5 --2 --2 --2.5 --2.5 19 18 --3 17 --3.5 E 18.5 21 17.5 IMAGINARY () IMAGINARY () 66 --3.5 --5 50.5 --5.5 68 --2.5 IMAGINARY () IMAGINARY () 48.5 49 47.5 --2.5 20.5 --4 P --4.5 20 --5 --22 --3 --14 --18 E --12 --16 --3.5 --10 --4 P --4.5 --8 --5 19.5 --5.5 --20 --5.5 --6 --6 --6 0.5 1 1.5 2 2.5 3 3.5 4 0.5 1 REAL () 1.5 2 2.5 3 3.5 4 REAL () Figure 14. P1dB Load Pull Gain Contours (dB) NOTE: Figure 15. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Power Gain Drain Efficiency Linearity Output Power AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 9 P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz --1.5 --1.5 48.5 --2 49 50 50.5 --3 49.5 E --3.5 --4 P --4.5 52.5 --5 52 51.5 --5.5 --6 1 0.5 E --3.5 --4 66 64 62 60 58 56 54 P --4.5 --5.5 1.5 --6 2 2.5 3 3.5 4 0.5 1 1.5 2 3 2.5 3.5 4 REAL () REAL () Figure 16. P3dB Load Pull Output Power Contours (dBm) Figure 17. P3dB Load Pull Efficiency Contours (%) --1.5 --1.5 --2 --2 --2.5 --2.5 17 16 --3 --3.5 19 E 16.5 15 15.5 --4 18.5 P --4.5 IMAGINARY () IMAGINARY () --3 --5 51 50.5 66 70 --2.5 IMAGINARY () IMAGINARY () --2.5 68 --2 18 --5 --3 --28 --26 --24 E --22 --3.5 --20 --4 --18 P --4.5 --16 --5 17.5 --5.5 --30 --32 --5.5 --6 --6 0.5 1 1.5 2 2.5 3 3.5 4 0.5 1 1.5 2 2.5 3 3.5 REAL () REAL () Figure 18. P3dB Load Pull Gain Contours (dB) Figure 19. P3dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency 4 Power Gain Drain Efficiency Linearity Output Power AFT18HW355SR6 10 RF Device Data Freescale Semiconductor, Inc. P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz --1 --1 50.5 E --3 --4 P --5 --6 54.5 70 --3 66 E --7 1 1.5 62 60 P 58 56 54 --5 --6 52.5 53.5 53 64 --4 54 52.5 52 0.5 68 --2 IMAGINARY () IMAGINARY () --2 51 51.5 52 52.5 --7 2 2.5 3 3.5 4 4.5 5 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 REAL () REAL () Figure 20. P1dB Load Pull Output Power Contours (dBm) Figure 21. P1dB Load Pull Efficiency Contours (%) --1 --1 --2 IMAGINARY () IMAGINARY () --3 --2 15 E 15.5 --4 P --5 14.5 12 13 12.5 11.5 --6 14 --40 --36 --3 E --38 --34 --32 --30 --4 P --5 --26 --28 --6 13.5 --24 --7 --7 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.5 1 1.5 2.5 3 3.5 4 4.5 5 REAL () REAL () Figure 22. P1dB Load Pull Gain Contours (dB) NOTE: Power Gain Drain Efficiency 2 Figure 23. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Linearity Output Power AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 11 P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz --1 --1 52 52.5 E --3 53 --4 P 53.5 54 --5 54.5 55 --6 62 E --3 60 70 --4 P 58 56 54 --5 --6 --7 58 64 66 68 --2 IMAGINARY () IMAGINARY () 51.5 51 --2 --7 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 REAL () REAL () Figure 24. P3dB Load Pull Output Power Contours (dBm) Figure 25. P3dB Load Pull Efficiency Contours (%) --1 --1 --2 13 E --3 IMAGINARY () IMAGINARY () --2 13.5 --4 P --5 --6 12.5 11 10.5 10 12 --50 --3 --46 --4 E --48 --36 --34 --44 --42 P --40 --5 --38 --6 11.5 --7 --7 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 REAL () REAL () Figure 26. P3dB Load Pull Gain Contours (dB) NOTE: Figure 27. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Power Gain Drain Efficiency Linearity Output Power AFT18HW355SR6 12 RF Device Data Freescale Semiconductor, Inc. PACKAGE DIMENSIONS AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 13 AFT18HW355SR6 14 RF Device Data Freescale Semiconductor, Inc. PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following documents, software and tools to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model .s2p File Development Tools Printed Circuit Boards For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software & Tools tab on the part’s Product Summary page to download the respective tool. R5 TAPE AND REEL OPTION The R5 tape and reel option for AFT18HW355S part will be available for 2 years after release of AFT18HW355S. Freescale Semiconductor, Inc. reserves the right to limit the quantities that will be delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased this device in the R5 tape and reel option will be offered AFT18HW355S in the R6 tape and reel option. REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 0 Jan. 2013 Initial Release of Data Sheet 1 Jan. 2013 Typical Performance frequency table: updated values to show statistical broadband performance, p. 1 Maximum Ratings table: added CW operation showing 25C maximum CW rating limitation, p. 2 Functional Tests table: updated typical values to reflect 1880 MHz typical performance values from p. 1 Typical Performance frequency table, changed Power Gain minimum value from 42.0% to 45.0%, p. 3 Load Mismatch table: updated VSWR output power rating to a higher 2--carrier W--CDMA value, p. 3 Typical Performance table: added footnote 5 to align with data in table, p. 3 Fig. 10, Peaking Side Load Pull Performance — Maximum P1dB Tuning: corrected VGSB from 1.45 Vdc to 1.7 Vdc, p. 8 Fig. 11, Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning: corrected VGSB from 1.45 Vdc to 1.7 Vdc, p. 8 AFT18HW355SR6 RF Device Data Freescale Semiconductor, Inc. 15 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale, the Freescale logo, AltiVec, C--5, CodeTest, CodeWarrior, ColdFire, C--Ware, Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony, and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, SMARTMOS, TurboLink, Vybrid, and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. E 2013 Freescale Semiconductor, Inc. AFT18HW355SR6 Document Number: AFT18HW355S Rev. 1, 1/2013 16 RF Device Data Freescale Semiconductor, Inc.