Data Sheet

Freescale Semiconductor
Technical Data
Document Number: AFT18P350--4S2L
Rev. 0, 4/2013
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 63 watt symmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications covering the frequency range of
1805 to 1880 MHz.
AFT18P350--4S2LR6
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Volts,
IDQA = 1000 mA, VGSB = 1.2 Vdc, Pout = 63 Watts Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
1805 MHz
16.1
44.5
7.7
--29.8
1840 MHz
16.1
44.3
7.7
--31.6
1880 MHz
15.8
44.1
7.6
--33.0
1805--1880 MHz, 63 W AVG., 28 V
Features
 Production Tested in a Symmetrical Doherty Configuration
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
 In Tape and Reel. R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel.
NI--1230--4LS2L
6 VBWA (1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB (1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with the VDD current supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2013. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
AFT18P350--4S2LR6
1
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain--Source Voltage
VDSS
--0.5, +65
Vdc
Gate--Source Voltage
VGS
--6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
--65 to +150
C
Case Operating Temperature Range
TC
--40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
--40 to +225
C
CW
374
3.2
W
W/C
CW Operation @ TC = 25C
Derate above 25C
Table 2. Thermal Characteristics
Characteristic
Symbol
Value (2,3)
Unit
Thermal Resistance, Junction to Case
Case Temperature 75C, 63 W W--CDMA, 28 Vdc, IDQA = 1000 mA, VGSB = 1.2 Vdc, 1805 MHz
RJC
0.39
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage (4)
(VDS = 10 Vdc, ID = 240 Adc)
VGS(th)
1.5
1.9
2.5
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 1000 mAdc, Measured in Functional Test)
VGS(Q)
2.3
2.7
3.3
Vdc
Drain--Source On--Voltage (4)
(VGS = 10 Vdc, ID = 2.75 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics
(4)
On Characteristics
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select
Documentation/Application Notes -- AN1955.
4. Each side of device measured separately.
(continued)
AFT18P350--4S2LR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4 . Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2)
Functional Tests
(In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 1000 mA, VGSB = 1.2 Vdc,
Pout = 63 W Avg., f = 1805 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
15.0
16.1
18.0
dB
Drain Efficiency
D
41.0
44.5
—
%
PAR
7.2
7.7
—
dB
ACPR
—
--29.8
--27.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQA = 1000 mA, f = 1840 MHz
VSWR 10:1 at 32 Vdc, 414 W CW (3) Output Power
(3 dB Input Overdrive from 316 W CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 1000 mA, VGSB = 1.2 Vdc,
1805--1880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
316
—
W
Pout @ 3 dB Compression Point (4)
P3dB
—
394
—
W

—
31
—

VBWres
—
90
—
MHz
Gain Flatness in 75 MHz Bandwidth @ Pout = 63 W Avg.
GF
—
0.4
—
dB
Gain Variation over Temperature
(--30C to +85C)
G
—
0.01
—
dB/C
P1dB
—
0.005
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 1805--1880 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(--30C to +85C) (3)
1.
2.
3.
4.
Part internally matched both on input and output.
Measurements made with device in a symmetrical Doherty configuration.
Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
AFT18P350--4S2LR6
RF Device Data
Freescale Semiconductor, Inc.
3
VDDA
+
VGGA
R4
--
C16
C11
C1
C2
C13
R2
AFT18P350--4S2L
Rev. 4
C15
C
C9
Z1
R1
CUT OUT AREA
C5* C7
C6*
C10
C8
C4
C3
C19
C21*
C23
C20
P
C22*
C17
R3
C14
C12
-VGGB
C18
VDDB
+
R5
*C5, C6, C21 and C22 are mounted vertically.
Figure 2. AFT18P350--4S2LR6 Test Circuit Component Layout
Table 5. AFT18P350--4S2LR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C3
10 F, 50 V Chip Capacitors
GRM31CR61H106KA12L
Murata
C2, C4, C5, C6, C13, C14,
C21, C22
12 pF Chip Capacitors
ATC100B120JT500XT
ATC
C7, C8, C9, C10
0.3 pF Chip Capacitors
ATC100B0R3BT500XT
ATC
C11, C12, C15, C17
10 F, 100 V Chip Capacitors
C5750X7S2A106M
TDK
C16, C18
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
C19
0.5 pF Chip Capacitor
ATC100B0R5BT500XT
ATC
C20
0.6 pF Chip Capacitor
ATC100B0R6BT500XT
ATC
C23
0.4 pF Chip Capacitor
ATC100B0R4BT500XT
ATC
R1
50 , 10 W Chip Resistor
CW12010T0050GBK
ATC
R2, R3
2.7 , 1/4 W Chip Resistors
CRCW12062R70FNEA
Vishay
R4, R5
1.8 k, 1/4 W Chip Resistors
CRCW12061K80FKEA
Vishay
Z1
1700-2000 MHz Band 90, 3 dB Hybrid Coupler
X3C19P1-03S
Anaren
PCB
0.020, r = 3.50
RO4350B
Rogers
AFT18P350--4S2LR6
4
RF Device Data
Freescale Semiconductor, Inc.
46
45
16.4
44
D
16.2
16
43
Gps
15.8
PARC
--26
--2
--28
--2.2
15.6
--30
15.4
--32
3.84 MHz Channel Bandwidth
15.2 Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
15
1760 1780 1800 1820 1840
ACPR
1860
1880
--34
--2.4
--2.6
--2.8
--36
1920
1900
PARC (dB)
16.6
Gps, POWER GAIN (dB)
47
VDD = 28 Vdc, Pout = 63 W (Avg.), IDQA = 1000 mA
VGSB = 1.2 Vdc, Single--Carrier W--CDMA
16.8
ACPR (dBc)
17
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
--3
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 63 Watts Avg.
--10
VDD = 28 Vdc, Pout = 84 W (PEP), IDQA = 1000 mA
VGSB = 1.2 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 1840 MHz
--20
--30
IM3--U
--40
IM5--L
IM5--U
--50
--60
IM3--L
IM7--L
IM7--U
1
10
200
100
TWO--TONE SPACING (MHz)
16.2
0
16.1
16
15.9
15.8
15.7
VDD = 28 Vdc, IDQA = 1000 mA
VGSB = 1.2 Vdc, f = 1840 MHz
--1 dB = 38 W
D
ACPR
--1
Gps
PARC
--3
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
25
40
55
70
50
--28
30
20
--3 dB = 84 W
--4
--5
--26
40
--2 dB = 59 W
--2
60
85
--30
--32
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
16.3
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
--34
10
--36
0
--38
100
Pout, OUTPUT POWER (WATTS)
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
AFT18P350--4S2LR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
Gps, POWER GAIN (dB)
17
16.5
16
30
1840 MHz
15.5
15
1880 MHz
1805 MHz
20
1880 MHz
1840 MHz
D
Gps
1805 MHz
14.5
1
10
100
10
0
200
0
--10
--20
--30
--40
ACPR (dBc)
60
VDD = 28 Vdc, IDQA = 1000 mA
1805 MHz
VGSB = 1.2 Vdc, Single--Carrier W--CDMA
50
3.84 MHz Channel Bandwidth, Input
1880 MHz
Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
1840 MHz
40
ACPR
D, DRAIN EFFICIENCY (%)
17.5
--50
--60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
24
20
GAIN (dB)
16
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 1000 mA
VGSB = 1.2 Vdc
Gain
12
8
4
0
1500
1600
1700
1800
1900
2000
2100
2200
2300
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
AFT18P350--4S2LR6
6
RF Device Data
Freescale Semiconductor, Inc.
VDD = 28 Vdc, IDQA = 1276 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1800
1.66 - j4.48
1.68 + j4.49
1.39 - j3.55
17.5
53.6
227
54.5
-11
1840
2.33 - j4.85
2.36 + j5.08
1.47 - j3.87
17.6
53.5
225
53.7
-11
1880
3.53 - j5.49
3.63 + j5.63
1.55 - j4.21
17.6
53.6
229
55.3
-11
Max Output Power
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.38 - j3.74
15.3
54.4
276
56.8
-16
2.35 + j5.32
1.46 - j4.07
15.3
54.4
272
55.5
-16
3.75 + j6.00
1.57 - j4.37
15.4
54.4
277
57.3
-17
f
(MHz)
Zsource
()
Zin
()
1800
1.66 - j4.48
1.62 + j4.65
1840
2.33 - j4.85
1880
3.53 - j5.49
Zload
()
(2)
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 8. Single Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 1276 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.13 - j2.02
20.4
51.4
139
65.6
-17
2.56 + j5.32
2.91 - j2.41
20.2
51.6
146
64.2
-16
3.98 + j5.87
2.61 - j2.54
20.1
51.7
148
65.6
-16
f
(MHz)
Zsource
()
Zin
()
1800
1.66 - j4.48
1.77 + j4.81
1840
2.33 - j4.85
1880
3.53 - j5.49
Zload
()
(1)
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
()
Zin
()
1800
1.66 - j4.48
1.73 + j4.80
1840
2.33 - j4.85
2.53 + j5.48
1880
3.53 - j5.49
4.06 + j6.19
Zload
()
(2)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.06 - j2.93
17.8
52.8
190
67.3
-21
2.88 - j2.69
17.9
52.6
183
66.6
-23
2.55 - j2.65
18.0
52.5
180
67.8
-24
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Figure 9. Single Side Load Pull Performance — Maximum Drain Efficiency Tuning
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
AFT18P350--4S2LR6
RF Device Data
Freescale Semiconductor, Inc.
7
0
0
--1
--1
49.5
--2
IMAGINARY ()
IMAGINARY ()
P1dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
50
E
--3
53 52.5
P
--4
52
51.5
51
50.5
--2
64
E
--3
62
60
P
--4
56
58
54
--5
--5
--6
--6
0
2
1
3
4
5
0
6
50
48
2
1
3
4
52
48
5
6
REAL ()
REAL ()
Figure 10. P1dB Load Pull Output Power Contours (dBm)
Figure 11. P1dB Load Pull Efficiency Contours (%)
0
--1
--1
21
20.5
--2
E
20
--3
19.5
P
--4
IMAGINARY ()
IMAGINARY ()
0
21.5
19
18.5
--5
17.5
--24
--26
--20
--22
--18
--16
--14
--2
E
--3
--12
P
--4
--5
--10
18
--6
--6
0
1
2
3
4
5
6
0
1
2
3
4
5
REAL ()
REAL ()
Figure 12. P1dB Load Pull Gain Contours (dB)
Figure 13. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Power Gain
Drain Efficiency
Linearity
Output Power
AFT18P350--4S2LR6
8
RF Device Data
Freescale Semiconductor, Inc.
P3dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
0
0
50
--1
--1
51
E
--3
IMAGINARY ()
IMAGINARY ()
50.5
--2
51.5
--4
P
54 53.5
52.5
53
--2
--6
--6
2
3
4
5
60
58
56
50
0
6
62
64
P
52
--5
1
66
--4
--5
0
E
--3
2
1
54
52
3
50
4
5
6
REAL ()
REAL ()
Figure 14. P3dB Load Pull Output Power Contours (dBm)
Figure 15. P3dB Load Pull Efficiency Contours (%)
0
--2
19
--1
18.5
--2
E
--3
18
17.5
--4
P
17
16.5
--5
15.5
--30
--32
IMAGINARY ()
--1
IMAGINARY ()
0
19.5
--28 --26
--24
--22
E
--3
--4
--20
--18
P
--16
--5
16
--6
--6
0
1
2
3
4
5
6
0
1
2
3
4
5
REAL ()
REAL ()
Figure 16. P3dB Load Pull Gain Contours (dB)
Figure 17. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
6
Power Gain
Drain Efficiency
Linearity
Output Power
AFT18P350--4S2LR6
RF Device Data
Freescale Semiconductor, Inc.
9
PACKAGE DIMENSIONS
AFT18P350--4S2LR6
10
RF Device Data
Freescale Semiconductor, Inc.
AFT18P350--4S2LR6
RF Device Data
Freescale Semiconductor, Inc.
11
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following documents, software and tools to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the
Software & Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Apr. 2013
Description
 Initial Release of Data Sheet
AFT18P350--4S2LR6
12
RF Device Data
Freescale Semiconductor, Inc.
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E 2013 Freescale Semiconductor, Inc.
AFT18P350--4S2LR6
Document
Number:
RF Device
DataAFT18P350--4S2L
Rev.
0, 4/2013Semiconductor, Inc.
Freescale
13