Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T26H300--24S
Rev. 0, 9/2015
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 60 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications covering the frequency range of 2496
to 2690 MHz.
2600 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 800 mA, VGSB = 0.8 Vdc, Pout = 60 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
2496 MHz
14.5
42.5
7.9
–30.7
2590 MHz
15.0
43.4
7.9
–32.2
2690 MHz
14.9
43.3
7.8
–33.5
A2T26H300--24SR6
2496–2690 MHz, 60 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
ACPR
(dBc)
Features
NI--1230S--4L2L
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
6 VBWA(1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T26H300--24SR6
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
(1,2)
TJ
–40 to +225
C
Characteristic
Symbol
Value (2,3)
Unit
RJC
0.29
C/W
Operating Junction Temperature Range
Table 2. Thermal Characteristics
Thermal Resistance, Junction to Case
Case Temperature 79C, 60 W Avg., W--CDMA, 28 Vdc, IDQA = 800 mA,
VGSB = 0.8 Vdc, 2590 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 160 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 800 mAdc, Measured in Functional Test)
VGSA(Q)
1.4
1.8
2.2
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.6 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 240 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics
(4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.freescale.com/rf/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
Each side of device measured separately.
(continued)
A2T26H300--24SR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests (1,2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 800 mA, VGSB = 0.8 Vdc, Pout = 60 W Avg.,
f = 2496 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
13.4
14.5
16.4
dB
Drain Efficiency
D
37.5
42.5
—
%
PAR
7.5
7.9
—
dB
ACPR
—
–30.7
–29.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (2) (In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 800 mA, VGSB = 0.8 Vdc, f = 2590 MHz, 100 sec(on),
10% Duty Cycle
VSWR 10:1 at 32 Vdc, 355 W Pulsed CW Output Power
(3 dB Input Overdrive from 229 W Pulsed CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 800 mA, VGSB = 0.8 Vdc,
2496–2690 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
209
—
W
(3)
P3dB
—
363
—
W
AM/PM
(Maximum value measured at the P3dB compression point across
the 2496–2690 MHz frequency range)

—
–26.7
—

VBWres
—
100
—
MHz
Gain Flatness in 194 MHz Bandwidth @ Pout = 60 W Avg.
GF
—
0.95
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.011
—
dB/C
P1dB
—
0.005
—
dB/C
Pout @ 3 dB Compression Point
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 5. Ordering Information
Device
A2T26H300--24SR6
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
NI--1230S--4L2L
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
3
VDDA
VGGA
C17
C9
C2
C1
C10
R2
D67508
C3
Z1
C5
A2T26H300--24S
Rev. 2
C8
C7
C4
C6
C
P
CUT OUT AREA
R1
C11
C12
C13
R3
C14
C16
C15
C18
VDDB
VGGB
Figure 2. A2T26H300--24SR6 Test Circuit Component Layout
Table 6. A2T26H300--24SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C7, C9, C10, C14, C16
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C4, C6, C8, C11, C13,
C15
5.1 pF Chip Capacitors
ATC100B5R1CT500XT
ATC
C3
0.4 pF Chip Capacitor
ATC100B0R4CT500XT
ATC
C5
1.0 pF Chip Capacitor
ATC100B1R0CT500XT
ATC
C12
3.0 pF Chip Capacitor
ATC100B3R0CT500XT
ATC
C17, C18
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26
Multicomp
R1
50 , 4 W Termination
CW12010T0050GBK
ATC
R2, R3
2.7 , 1/4 W Chip Resistors
CRCW12062R7FKEA
Vishay
Z1
2300–2700 MHz Band, 90, 2 dB Hybrid Coupler
X3C25P1-02S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D67508
MTL
A2T26H300--24SR6
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS
44
43
D
14.8
42
Gps
14.7
14.6
ACPR
14.5
–31
–1.8
–33
PARC
14.3
2510
–1.6
–32
14.4
14.2
2480
–30
2540
–34
2570 2600 2630
f, FREQUENCY (MHz)
2660
2690
–35
2720
–2
–2.2
–2.4
PARC (dB)
14.9
45
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 28 Vdc, Pout = 60 W (Avg.), IDQA = 800 mA, VGSB = 0.8 Vdc
15.1 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth, Input
15 Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
D, DRAIN
EFFICIENCY (%)
46
15.2
–2.6
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio
Compression (PARC) Broadband Performance @ Pout = 60 Watts Avg.
–10
VDD = 28 Vdc, Pout = 30 W (PEP), IDQA = 800 mA
VGSB = 0.8 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2590 MHz
–20
–30
IM3--U
–40
IM5--L
–50
IM5--U
IM7--L
–60
–70
IM3--L
IM7--U
1
10
300
100
TWO--TONE SPACING (MHz)
16
0
15.5
15
14.5
14
13.5
VDD = 28 Vdc, IDQA = 800 mA, VGSB = 0.8 Vdc
f = 2590 MHz, Single--Carrier W--CDMA
ACPR
D
–1
–2
–1 dB = 35.6 W
–2 dB = 56.5 W
–4
–5
20
Gps
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
40
–25
50
–30
45
40
–3 dB = 80.9 W
–3
55
60
80
Pout, OUTPUT POWER (WATTS)
35
–35
–40
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
16.5
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
–45
30
–50
25
120
–55
PARC
100
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
Gps, POWER GAIN (dB)
16
D
15
ACPR
2590 MHz
14
2690 MHz
60
0
50
–10
40
30
2496 MHz
2590 MHz
2690 MHz
2496 MHz
13
12
11
1
2690 MHz Gps
2590 MHz
2496 MHz
10
Pout, OUTPUT POWER (WATTS) AVG.
100
20
10
0
200
–20
–30
–40
ACPR (dBc)
VDD = 28 Vdc, IDQA = 800 mA, VGSB = 0.8 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel
Bandwidth, Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
D, DRAIN EFFICIENCY (%)
17
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
16
Gain
GAIN (dB)
14
12
10
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 800 mA
VGSB = 0.8 Vdc
8
6
2300
2400
2500
2600 2700 2800
f, FREQUENCY (MHz)
2900
3000
3100
Figure 7. Broadband Frequency Response
A2T26H300--24SR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 789 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
5.30 – j11.5
5.55 + j11.0
2.11 – j4.78
16.4
52.3
171
56.1
–12
2590
10.3 – j13.6
9.67 + j12.0
2.07 – j4.80
16.8
52.3
171
55.7
–13
2690
20.7 – j5.59
17.0 + j6.10
2.00 – j5.08
17.2
52.2
166
54.3
–14
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
5.30 – j11.5
5.42 + j11.9
1.97 – j4.97
14.1
53.1
204
56.5
–17
2590
10.3 – j13.6
10.2 + j13.7
1.97 – j5.09
14.5
53.0
201
55.3
–18
2690
20.7 – j5.59
20.0 + j6.30
1.95 – j5.29
14.9
52.9
194
54.1
–19
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQA = 789 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
5.30 – j11.5
5.44 + j11.6
4.68 – j3.61
18.8
50.7
117
65.9
–19
2590
10.3 – j13.6
9.41 + j12.8
3.87 – j2.92
19.3
50.6
114
65.0
–21
2690
20.7 – j5.59
17.1 + j7.04
3.14 – j3.24
19.5
50.7
117
63.3
–22
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
4.60 – j3.58
16.8
51.3
135
65.8
–26
9.55 + j14.3
3.53 – j3.29
17.0
51.6
143
64.5
–28
19.9 + j7.66
3.01 – j3.40
17.3
51.4
139
62.8
–29
f
(MHz)
Zsource
()
Zin
()
2496
5.30 – j11.5
5.11 + j12.3
2590
10.3 – j13.6
2690
20.7 – j5.59
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 0.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
2496
6.65 – j13.4
4.31 + j12.3
2590
14.5 – j14.0
9.13 + j14.9
2690
23.6 – j0.90
21.6 + j7.82
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.32 – j4.52
12.8
54.4
273
53.0
–26
1.29 – j4.66
12.9
54.3
272
52.4
–25
1.36 – j5.13
13.0
54.4
275
53.3
–27
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
6.65 – j13.4
4.39 + j12.9
1.27 – j4.62
10.6
54.9
310
53.7
–32
2590
14.5 – j14.0
10.0 + j15.9
1.29 – j4.80
10.8
54.9
309
52.7
–31
2690
23.6 – j0.90
24.0 + j5.56
1.38 – j5.30
10.9
55.0
313
53.7
–33
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 0.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
6.65 – j13.4
3.94 + j12.4
3.26 – j4.65
14.0
52.8
193
62.9
–35
2590
14.5 – j14.0
8.38 + j15.3
3.43 – j3.91
14.1
52.5
179
63.0
–36
2690
23.6 – j0.90
22.0 + j9.77
2.60 – j4.07
14.1
53.1
205
63.9
–36
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.87 – j4.85
11.9
53.6
229
61.9
–41
9.48 + j16.2
3.01 – j4.32
12.0
53.5
224
61.7
–41
24.7 + j7.38
2.60 – j4.22
12.1
53.7
235
62.8
–43
f
(MHz)
Zsource
()
Zin
()
2496
6.65 – j13.4
4.14 + j12.9
2590
14.5 – j14.0
2690
23.6 – j0.90
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T26H300--24SR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2590 MHz
0
0
–1
–1
58
50
–6
50
50.5
–4
52
P
–5
51.5
64
3
4
REAL ()
5
6
–6
7
–1
–1
–3
18.5
IMAGINARY ()
20
19.5
–2
19
E
18
16.5
–4
P
–5
–6
1
2
4
REAL ()
5
6
7
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
60
56
52 54
1
2
56
58
54
3
4
REAL ()
6
5
7
–26
–28
–24
–2
–22
E
–3
–4
–6
–20
–18
–16
P
–5
3
62
P
Figure 9. P1dB Load Pull Efficiency Contours (%)
0
17.5
E
–4
0
17
48
–3
51
Figure 8. P1dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
–2
–5
2
1
49
49.5
E
–3
IMAGINARY ()
IMAGINARY ()
48.5
–2
–12
1
2
–14
3
4
REAL ()
5
6
7
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2590 MHz
–1
–1.5
–1.5
50
49
–2
50.5
–2.5
–3
E
–3.5
51
–4
52.5
–4.5
–5
P
51.5
–3
–5.5
–6
–6
1.5
2
2.5
3
3.5
4
REAL ()
4.5
5
6
5.5
64
62
P
50
1
1.5
60
54
2
58
56
2.5
3
56
3.5
4
REAL ()
4.5
5
5.5
6
Figure 13. P3dB Load Pull Efficiency Contours (%)
–1
–1
–1.5
–1.5
18
–2
–2
–3
17.5
E
–3.5
IMAGINARY ()
–2.5
–4
–4.5
14
–5
16
P
–5.5
–6
E
–4
–5.5
1
48
–3.5
–5
Figure 12. P3dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
–2.5
–4.5
52
53
52
–2
IMAGINARY ()
IMAGINARY ()
–1
49.5
14.5
1
1.5
2
15
2.5
3
3.5
REAL ()
4.5
5
5.5
–28
E
–26
–4
–24
–22
P
–20
–5.5
6
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–3
–3.5
–5
16.5
4
–30
–4.5
17
15.5
–32
–2.5
–6
–18
1
1.5
2
2.5
3
3.5
4
REAL ()
4.5
5
5.5
6
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H300--24SR6
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2590 MHz
–2
–2
50.5 51
–2.5
51.5
52
–3.5
P
–5
–6
52.5
54
–5.5
50.5
51
E
–4
53.5
4
REAL ()
5
7
6
–2.5
–2.5
–3
–3
IMAGINARY ()
IMAGINARY ()
–2
E
–4
14
P
–5
60
54
52
50
56
54
2
1
58
13.5
13
12
1
13
2
3
4
REAL ()
5
6
7
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
5
6
7
–3.5
E
–4
–6
–40
–38
–4.5
P
–36
–24
–5.5
12.5
4
REAL ()
3
–5
–5.5
–6
P
Figure 17. P1dB Load Pull Efficiency Contours (%)
–2
–3.5
56
62
–4.5
–6
Figure 16. P1dB Load Pull Output Power Contours (dBm)
–4.5
E
–4
–5.5
3
2
–3.5
–5
53
1
46
–3
IMAGINARY ()
IMAGINARY ()
–3
–4.5
48
–2.5
–32
–28
–30
–26
1
2
–34
3
4
REAL ()
5
6
7
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2590 MHz
–2
–2
51
IMAGINARY ()
–3
–3.5
54.5
51.5
53
53.5
54
51
E
–4.5
P
–5
–6
–6
3
4
REAL ()
5
6
7
Figure 20. P3dB Load Pull Output Power Contours (dBm)
54
52
P
52
46
50
54
50
2
1
3
4
REAL ()
5
6
7
Figure 21. P3dB Load Pull Efficiency Contours (%)
–2
–2
–2.5
–2.5
–3
–3
12
–3.5
IMAGINARY ()
IMAGINARY ()
56
E
–4.5
–5.5
–4
E
–4.5
11.5
P
–5
10.5
–5.5
–6
60
–4
–5.5
2
52
58
–3.5
–5
1
48
–3
52
52.5
–4
46
–2.5
IMAGINARY ()
–2.5
11
3
4
REAL ()
5
E
–4.5
P
–5.5
11
2
–4
–5
10
1
–3.5
6
7
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
–6
1
–30
–34
–38
–28
–32
–36
2
3
–44
–40
–42
4
REAL ()
5
6
7
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H300--24SR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T26H300--24SR6
14
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Sept. 2015
Description
 Initial Release of Data Sheet
A2T26H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
15
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A2T26H300--24SR6
Document Number: A2T26H300--24S
Rev. 0, 9/2015
16
RF Device Data
Freescale Semiconductor, Inc.