Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T21H360--24S
Rev. 0, 1/2015
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 63 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications covering the frequency range of 2110 to
2170 MHz.
A2T21H360--24SR6
2100 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 500 mA, VGSB = 0.5 Vdc, Pout = 63 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
2110 MHz
16.2
51.6
7.9
–28.5
2140 MHz
16.2
51.8
7.9
–28.8
2170 MHz
16.1
50.9
7.9
–29.5
2110–2170 MHz, 63 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
Features
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
 In Tape and Reel. R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel.
NI--1230S--4L2L
6 VBWA(1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with the VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T21H360--24SR6
1
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain--Source Voltage
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
–40 to +225
C
CW
278
1.2
W
W/C
CW Operation @ TC = 25C
Derate above 25C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 73C, 63 W Avg., W--CDMA, 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc,
2140 MHz
Symbol
Value (2,3)
Unit
RJC
0.33
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 140 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 500 mAdc, Measured in Functional Test)
VGSA(Q)
1.4
1.9
2.2
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 240 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics -- Side A (4)
On Characteristics -- Side B (4)
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select
Documentation/Application Notes -- AN1955.
4. Each side of device measured separately.
(continued)
A2T21H360--24SR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2)
Functional Tests
(In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc,
Pout = 63 W Avg., f = 2140 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
15.6
16.2
18.6
dB
Drain Efficiency
D
49.2
51.8
—
%
PAR
7.2
7.9
—
dB
ACPR
—
–28.8
–27.2
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch
(2) (In
Freescale Doherty Test Fixture, 50 ohm system) IDQA = 500 mA, VGSB = 0.5 Vdc, f = 2140 MHz
VSWR 10:1 at 28 Vdc, 288 W Pulse Output Power
(3 dB Input Overdrive from 363 W Pulse Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc,
2110–2170 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
301(3)
—
W
Pout @ 3 dB Compression Point (4)
P3dB
—
400
—
W

—
–27
—

VBWres
—
100
—
MHz
Gain Flatness in 60 MHz Bandwidth @ Pout = 63 W Avg.
GF
—
0.2
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.012
—
dB/C
P1dB
—
0.002
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 2110–2170 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C) (3)
1.
2.
3.
4.
Part internally matched both on input and output.
Measurements made with device in an asymmetrical Doherty configuration.
Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
3
VGGA
C1
VDDA
R2
C19
C2
C10
R4
D61817
C3
C
P
R1
C7 C6
AFT21H360--4WS
Rev. 3
C8
R5
C9
C14
CUT OUT AREA
C4
C5
Z1
C12
C13
C15
C16
C11
C18
C17
C20
VDDB
R3
VGGB
Figure 2. A2T21H360--24SR6 Test Circuit Component Layout
Table 5. A2T21H360--24SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C9, C10, C11, C12, C18
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C8, C13, C17
9.1 pF Chip Capacitors
ATC100B9R1CT500XT
ATC
C3, C5, C15
9.1 pF Chip Capacitors
ATC600F9R1BT250XT
ATC
C4
0.5 pF Chip Capacitor
ATC600F0R5BT250XT
ATC
C6
0.8 pF Chip Capacitor
ATC600F0R8BT250XT
ATC
C7
1.1 pF Chip Capacitor
ATC600F1R1BT250XT
ATC
C14
4.7 pF Chip Capacitor
ATC600F4R7BT250XT
ATC
C16
0.2 pF Chip Capacitor
ATC600F0R2BT250XT
ATC
C19, C20
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
R1
50 , 20 W Chip Resistor
C20A5024
Anaren
R2, R3
5.6 K, 1/4 W Chip Resistors
CRCW12065K60FKEA
Vishay
R4, R5
6.2 , 1/4 W Chip Resistors
CRCW12066R20FKEA
Vishay
Z1
2000–2300 MHz Band, 90, 5 dB Directional Coupler
X3C21P1-05S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D61817
MTL
A2T21H360--24SR6
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 2110–2170 MHz
16.6
16.4
51
D
16.2
50
49
Gps
16
15.8
ACPR
15.6
–1.7
–30
–1.8
–31
PARC
15.4
–29
ACPR (dBc)
VDD = 28 Vdc, Pout = 63 W (Avg.)
IDQA = 500 mA, VGSB = 0.5 Vdc
–32
15.2 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
15
2060 2080 2100 2120 2140 2160 2180 2200
f, FREQUENCY (MHz)
–33
–1.9
–2
–2.1
PARC (dB)
52
16.8
Gps, POWER GAIN (dB)
D, DRAIN
EFFICIENCY (%)
53
17
–2.2
–34
2220
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 63 Watts Avg.
0
VDD = 28 Vdc, Pout = 12 W (PEP), IDQA = 500 mA
VGSB = 0.5 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2140 MHz
–15
IM3--U
–30
IM3--L
IM5--L
–45
IM5--U
IM7--L
–60
IM7--U
–75
1
300
100
10
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
16.5
16
15.5
15
0
–1
VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc
f = 2140 MHz, Single--Carrier W--CDMA
–1 dB = 30 W
–2
ACPR
–3 dB = 87.5 W
–3
–5
20
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
40
60
–24
55
–26
50
–2 dB = 63 W
–4
D
45
40
PARC
60
80
Pout, OUTPUT POWER (WATTS)
–28
–30
ACPR (dBc)
17
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
17.5
1
D DRAIN EFFICIENCY (%)
18
–32
35
–34
30
140
–36
Gps
100
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2170 MHz
Gps, POWER GAIN (dB)
18
D
Gps
2170 MHz
16
0
50
–10
40
2140 MHz
14
12
2110 MHz
2110 MHz
2140 MHz
2170 MHz
1
2110 MHz
30
2170 MHz
ACPR
10
8
60
2140 MHz
20
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
10
0
400
10
100
Pout, OUTPUT POWER (WATTS) AVG.
–20
–30
–40
ACPR (dBc)
VDD = 28 Vdc, IDQA = 500 mA, VGSB = 0.5 Vdc
Single--Carrier W--CDMA
D, DRAIN EFFICIENCY (%)
20
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
16
Gain
GAIN (dB)
14
12
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 500 mA
VGSB = 0.5 Vdc
10
8
6
1800
1880
1960
2040 2120 2200
f, FREQUENCY (MHz)
2280
2360
2440
Figure 7. Broadband Frequency Response
A2T21H360--24SR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 6. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 774 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
3.58 – j6.92
3.34 + j6.51
2.02 – j4.19
19.3
51.9
155
58.6
–14
2140
4.43 – j7.58
4.13 + j7.07
2.06 – j4.27
19.3
51.9
154
58.2
–15
2170
5.91 – j8.34
5.51 + j7.60
2.07 – j4.36
19.3
51.8
153
57.2
–15
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
3.58 – j6.92
3.35 + j6.99
1.95 – j4.52
16.9
52.7
184
58.7
–19
2140
4.43 – j7.58
4.25 + j7.68
2.04 – j4.59
17.0
52.6
183
58.3
–20
2170
5.91 – j8.34
5.85 + j8.37
2.03 – j4.68
17.0
52.6
181
57.4
–19
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 7. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQA = 774 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.99 – j2.11
22.1
49.7
93
69.3
–22
4.27 + j7.51
3.90 – j2.21
22.0
49.7
93
68.0
–21
5.82 + j7.92
4.04 – j2.22
22.0
49.5
88
66.1
–20
f
(MHz)
Zsource
()
Zin
()
2110
3.58 – j6.92
3.40 + j6.96
2140
4.43 – j7.58
2170
5.91 – j8.34
Zload
()
(1)
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
2110
3.58 – j6.92
3.29 + j7.28
3.58 – j2.55
19.7
50.9
122
69.6
–29
2140
4.43 – j7.58
4.19 + j8.05
3.34 – j2.43
19.7
50.7
119
67.6
–29
2170
5.91 – j8.34
5.96 + j8.77
3.33 – j2.55
19.7
50.8
119
66.4
–28
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 8. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 0.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
2.40 – j5.79
2.25 + j5.71
1.80 – j4.30
14.8
54.8
300
53.8
–26
2140
2.86 – j6.24
2.71 + j6.24
1.91 – j4.27
15.2
54.8
300
54.5
–27
2170
3.85 – j6.73
3.68 + j6.78
1.96 – j4.34
15.4
54.8
302
54.3
–28
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
2.40 – j5.79
2.33 + j6.08
1.77 – j4.50
12.6
55.5
353
55.2
–33
2140
2.86 – j6.24
2.94 + j6.66
1.89 – j4.66
12.9
55.4
350
54.6
–34
2170
3.85 – j6.73
4.09 + j7.25
1.95 – j4.72
13.1
55.5
351
54.6
–35
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 0.8 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
4.14 – j3.31
16.4
53.3
215
64.5
–33
2.41 + j6.35
3.90 – j2.93
16.7
53.4
218
64.4
–34
3.27 + j6.92
3.73 – j2.68
16.9
53.3
214
64.1
–35
f
(MHz)
Zsource
()
Zin
()
2110
2.40 – j5.79
1.97 + j5.83
2140
2.86 – j6.24
2170
3.85 – j6.73
Zload
()
(1)
Max Drain Efficiency
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
2110
2.40 – j5.79
2.14 + j6.14
4.07 – j3.91
14.1
54.1
258
64.2
–40
2140
2.86 – j6.24
2.65 + j6.74
3.90 – j3.32
14.6
54.1
257
64.4
–43
2170
3.85 – j6.73
3.74 + j7.38
3.57 – j3.27
14.7
54.3
267
64.0
–43
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H360--24SR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2140 MHz
0
0
–1
48
–2
IMAGINARY ()
IMAGINARY ()
–1
E
49
–3
51
51.5
–4
50.5
50
48.5
49.5
P
–5
–6
60
–2
E
–3
66
–4
P
50
1
2
3
4
REAL ()
0
6
5
–6
7
60
52
1
2
3
–1
22.5
IMAGINARY ()
22
–3
21.5
P
19
1
2
–2
19.5
3
20
4
REAL ()
52
6
5
7
–18
–3
–16
–4
P
–14
–5
20.5
5
–20
–22
–24
E
21
–5
–26
–28
E
–4
4
REAL ()
54
0
23
–2
58
56
Figure 9. P1dB Load Pull Efficiency Contours (%)
–1
IMAGINARY ()
62
–5
Figure 8. P1dB Load Pull Output Power Contours (dBm)
–6
64
6
7
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–6
–12
1
2
3
4
REAL ()
5
6
7
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2140 MHz
0
0
48.5
–1
–2
E
50
–3
51.5
–4
P 52.5
–5
–6
IMAGINARY ()
IMAGINARY ()
–1
49
49.5
2
3
6
5
7
58
52
1
56
54
2
3
4
REAL ()
54
6
5
7
Figure 13. P3dB Load Pull Efficiency Contours (%)
0
0
–1
–1
20.5
–2
IMAGINARY ()
IMAGINARY ()
60
62
–6
Figure 12. P3dB Load Pull Output Power Contours (dBm)
20
E
–3
19.5
–4
–5
16.5 17
1
2
–32
–2
17.5
3
4
REAL ()
5
–3
–22
–4
–20
–5
6
7
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–26
–24
P
18.5
18
–28
–30
E
19
P
–6
64
–4
–5
4
REAL ()
66
–3
P
51
1
E
50.5
51
52
–2
–6
–18
1
2
3
4
REAL ()
5
6
7
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--24SR6
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RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2140 MHz
0
0
51
–1
58
51
–1
–2
–4
P
54
54.5
52
52.5
E
–3
IMAGINARY ()
IMAGINARY ()
51.5
–2
–5
–6
–6
2
3
4
REAL ()
P
53
53.5
6
5
7
Figure 16. P1dB Load Pull Output Power Contours (dBm)
64
62
–4
–5
1
E
–3
54
50 52
48
1
60
2
3
56
58
56
4
REAL ()
6
5
7
Figure 17. P1dB Load Pull Efficiency Contours (%)
0
0
–1
–1
17
–2
–4
14
–5
–6
16.5
E
–3
13
1
13.5
P
IMAGINARY ()
IMAGINARY ()
–42
16
14.5
2
3
4
REAL ()
–38
E
–3
–36
–4
P
–34
–5
15.5
15
–40
–2
–30
–28
5
6
7
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
–6
1
2
3
4
REAL ()
–32
5
6
7
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2140 MHz
0
0
51.5
51.5
52
–1
50
–1
48
53
53.5
–3
IMAGINARY ()
IMAGINARY ()
52.5
–2
E
–4
–5
2
1
–3
3
4
REAL ()
6
5
–6
7
0
–1
–1
IMAGINARY ()
15
–2
14.5
–3
E
–4
–5
–6
11
1
11.5
14
P
P
58
3
4
REAL ()
5
6
7
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
2
1
3
4
REAL ()
56
6
5
–2
7
–48
–46
–3
E
–44
–4
–6
–34
1
–42
–40
P
–5
13.5
12.5 13
2
64
Figure 21. P3dB Load Pull Efficiency Contours (%)
0
12
E
–4
54.5
Figure 20. P3dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
62
–5
55
–6
60
–2
54
P
56
58
52 54
2
–36
3
–38
4
REAL ()
5
6
7
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H360--24SR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T21H360--24SR6
14
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to
Software & Tools on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Jan. 2015
Description
 Initial Release of Data Sheet
A2T21H360--24SR6
RF Device Data
Freescale Semiconductor, Inc.
15
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A2T21H360--24SR6
Document Number: A2T21H360--24S
Rev. 0, 1/2015
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RF Device Data
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