SC195F 3.5MHz, 500mA Synchronous Step Down DC-DC Regulator POWER MANAGEMENT Features Description Input Voltage — 2.9V to 5.5V Output Voltage — 0.8V to 3.3V Output current capability — 500mA Efficiency up to 94% 15 Programmable output voltages Fast transient response Oscillator frequency — 3.5MHz 100% duty cycle capability Quiescent current — 4.8 mA typ Shutdown Current — 0.1µA typ Internal soft-start Over-voltage protection Current limit and short circuit protection Over-temperature protection Input under-voltage lockout Floating control pin protection MLPQ-UT8 1.5 x 1.5 x 0.6 (mm) package Pb free, halogen free, and RoHS/WEEE compliant Applications Smart phones and cellular phones MP3/Personal media players Personal navigation devices Digital cameras Single Li-ion cell or 3 NiMH/NiCd cell devices Devices with 3.3V or 5V internal power rails The SC195F is a high efficiency, 500mA step down regulator designed to operate with an input voltage range of 2.9V to 5.5 V. The input voltage range makes it ideal for battery operated applications with space limitations. The SC195F operates at a fixed 3.5MHz switching frequency in normal PWM (Pulse-Width Modulation) mode. The SC195F also includes fifteen programmable output voltage settings that can be selected using the four control pins, eliminating the need for external feedback resistors. The output voltage can be fixed to a single setting or dynamically switched between different levels. Pulling all four control pins low disables the output. The SC195F provides several protection features to safeguard the device under stressed conditions. These include short circuit protection, over-temperature protection, input under-voltage lockout, and soft-start to control in-rush current. These features, coupled with the small 1.5 x 1.5 x 0.6 (mm) package make the SC195F a versatile device ideal for step-down regulation in products needing high efficiency and a small PCB footprint. Typical Application Circuit VIN 2.9V to 5.5V SC195F IN CIN 4.7µF LX VOUT 0.8V to 3.3V OUT CTL3 Control Logic Lines LX 1.0µH CTL2 CTL1 COUT 10µF GND CTL0 Rev 2.0 © 2016 Semtech Corporation 1 SC195F Pin Configuration Ordering Information CTL3 8 CTL2 1 7 IN 6 LX 5 GND TOP VIEW CTL1 2 CTL0 3 4 Device Package SC195FULTRT(1)(2) MLPQ-UT8 1.5 x 1.5 SC195FEVB Evaluation Board Notes: (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Lead-free packaging only. Device is WEEE and RoHS compliant and halogen-free. OUT MLPQ-UT8; 1.5 x 1.5, 8 LEAD θJA = 116°C/W Table 1 – Output Voltage Settings Marking Information 5F=SC195F yw=Date Code CTL3 CTL2 CTL1 CTL0 Vout 0 0 0 0 Off 0 0 0 1 0.80 0 0 1 0 1.00 0 0 1 1 1.20 0 1 0 0 1.40 0 1 0 1 1.50 0 1 1 0 1.60 0 1 1 1 1.80 1 0 0 0 2.30 1 0 0 1 2.35 1 0 1 0 2.00 1 0 1 1 2.40 1 1 0 0 2.45 1 1 0 1 2.80 1 1 1 0 3.00 1 1 1 1 3.30 2 SC195F Absolute Maximum Ratings Recommended Operating Conditions IN (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 Input Voltage Range (V). . . . . . . . . . . . . . . . . . . . . +2.9 to +5.5 LX Voltage (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0 to VIN +0.5 Other Pins (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VIN + 0.3 Output Short Circuit to GND. . . . . . . . . . . . . . . . . Continuous ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Thermal Information Thermal Resistance, Junction to Ambient(2) (°C/W). . . . . 116 Junction Temperature Range (°C). . . . . . . . . . . . -40 to +150 Storage Temperature Range (°C). . . . . . . . . . . . . -65 to +150 Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114. (2) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB per JESD51 standards. Electrical Characteristics Unless otherwise specified: VIN= 3.6V, CIN= 4.7µF, COUT=10µF, LX=1µH, VOUT=2.0V, TJ(MAX)=125°C, TA= -40 to +85 °C. Typical values are TA=+25 °C Parameter Output Voltage Range Symbol Condition VOUT Min Typ Max Units 0.8 3.3 (1) V -2.0 2.0 % Output Voltage Tolerance VOUT_TOL IOUT = 200mA Line Regulation ΔVLINEREG 2.9 ≤ VIN ≤ 5.5V, IOUT = 200mA 0.3 %/V Load Regulation ΔVLOADREG 200mA ≤ IOUT ≤ 500mA -1 %/A Output Current Capability IOUT 500 Current Limit Threshold ILIMIT 800 Foldback Current Limit IFB_LIM Under-Voltage Lockout VUVLO ILOAD > ILIMIT mA 1300 150 Rising VIN mA mA 2.9 V Hysteresis 200 mV mA Quiescent Current IQ IOUT = 0mA 4.8 Shutdown Current ISD VCTL 0-3= 0V 0.1 1.0 µA LX Leakage Current ILX Into LX pin 0.1 1.0 µA High Side Switch Resistance(2) RDSON_P IOUT= 100mA 250 Low Side Switch Resistance(3) RDSON_N IOUT= 100mA 350 Switching Frequency fSW mΩ 2.8 3.5 4.2 MHz 3 SC195F Electrical Characteristics (continued) Parameter Symbol Condition Soft-Start tSS Thermal Shutdown TOT Thermal Shutdown Hysteresis Min Typ Max Units VOUT = 90% of final value (4) 350 500 µs Rising temperature 160 °C 20 °C THYST Logic Inputs - CTL0, CTL1, CTL2, and CTL3 Input High Voltage VIH 1.6 Input Low Voltage VIL Input High Current IIH VCTL 0-3= VIN Input Low Current IIL VCTL 0-3= GND V 0.4 V -2.0 5.0 µA -2.0 2.0 µA Notes (1) Maximum output voltage is limited to VIN if the input is less than 3.3V. (2) Measured from IN to LX. (3) Measured from LX to GND. (4) Soft start time depends on the load and output capacitance, see Soft Start section. 4 SC195F Typical Characteristics CIN = 4.7µF, COUT = 10µF, LX = 1µH, TA = 25°C unless otherwise noted. 94 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 Regulation vs. IOUT Vin=5V Vin=5V VID=0.8V 3.5 Vin=5V VID=0.8V VID=1V VID=1V 3 VID=1.2V VID=1.2V VID=1.4V VID=1.5V VID=1.6V VID=1.8V VID=2V VID=2.3V VID=2.35V VID=2.4V VID=1.4V Vout Voltage (V) Efficiency Efficiency vs. IOUT Vin=5V VID=1.5V 2.5 VID=1.6V VID=1.8V 2 VID=2V VID=2.3V VID=2.35V 1.5 VID=2.4V VID=2.45V VID=2.45V 1 VID=2.8V VID=2.8V VID=3V VID=3V VID=3.3V 0 0.1 0.2 0.3 Load Current (A) 0.4 VID=3.3V 0.5 0 0.5 Vin=4.2V 3.5 VID=0.8V 0.4 0.5 VID=0.8V VID=1V VID=1V 3 VID=1.2V VID=1.2V VID=1.4V VID=1.6V VID=1.8V VID=2V VID=2.3V VID=2.35V VID=1.4V Vout Voltage (V) VID=1.5V Efficiency Efficiency VID=2.4V VID=2.45V VID=1.5V 2.5 VID=1.6V VID=1.8V 2 VID=2V VID=2.3V VID=2.35V 1.5 VID=2.4V VID=2.45V 1 VID=2.8V VID=2.8V VID=3V VID=3V VID=3.3V 00 0.1 0.1 0.2 0.3 0.2 0.3 Load Current (A) 0.4 0.4 VID=3.3V 0.5 0 0.5 0.5 0.1 0.2 0.3 Load Current (A) 0.4 0.5 Regulation vs. IOUT Vin=3.6V Vin=3.6V 3.5 VID=0.8V Vin=3.6V VID=0.8V VID=1V VID=1V 3 VID=1.2V VID=1.2V VID=1.4V VID=1.5V VID=1.6V VID=1.8V VID=2V VID=2.3V VID=2.35V VID=2.4V VID=1.4V Vout Voltage (V) Efficiency 0.3 Load Current (A) Vin=4.2V Efficiency vs. IOUT Vin=3.6V 98 96 94 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 58 56 54 52 50 0.2 Regulation vs. IOUT Vin=4.2V Efficiency vs. IOUT Vin=4.2V 94 94 92 92 90 90 88 88 86 86 84 84 82 82 80 80 78 78 76 76 74 74 72 72 70 70 68 68 66 66 64 64 62 62 60 60 58 58 56 56 54 54 52 52 50 50 0.1 VID=1.5V 2.5 VID=1.6V VID=1.8V 2 VID=2V VID=2.3V VID=2.35V 1.5 VID=2.4V VID=2.45V VID=2.8V VID=2.45V 1 VID=2.8V VID=3V VID=3.3V 0 0.1 0.2 0.3 Load Current (A) 0.4 0.5 VID=3V VID=3.3V 0.5 0 0.1 0.2 0.3 Load Current (A) 0.4 0.5 5 SC195F Typical Characteristics (continued) Line Regulation (VOUT =1.8V) 1.86 Frequency vs. Temperature IOUT = 200mA 4 3.8 Frequency (MHz) 1.84 VOUT (V) 1.82 -40°C 1.80 25°C 85°C 1.8V 3.3V 3.6 2.8V 3.4 3.2 1.78 1.76 1V 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 3 -40 -20 Light Load Soft-start 0 20 40 Temperature (°C) 60 80 100 Heavy Load Soft-start ILOAD = 500mA ILOAD = 10mA IIN (200mA/div) IIN (200mA/div) Vout (1.0V/div) VOUT (1.0V/div) ILX (500mA/div) ILX (500mA/div) Time (40μs/div) Time (40μs/div) Heavy Load Switching — VOUT = 3.3V Heavy Load Switching — VOUT = 2.8V VOUT (50mV/div) VOUT (50mV/div) VLX (2V/div) VLX (2V/div) ILX (200mA/div) ILX (200mA/div) Time (200ns/div) Time (200ns/div) 6 SC195F Typical Characteristics (continued) Heavy Load Switching — VOUT = 1.8V Heavy Load Switching — VOUT = 1.0V VOUT (50mV/div) VOUT (50mV/div) VLX (2.0V/div) VLX (2V/div) ILX (200mA/div) ILX (200mA/div) Time (200ns/div) Time (200ns/div) Load Transient Response — 200 to 500mA VID Transient Response — PWM 1.2V to 1.8V transition VOUT (100mV/div) VOUT (500mV/div) ILX (200mA/div) ILX (500mA/div) ILOAD (500mA/div) VCTL2 (2.0V/div) Time (20μs/div) Time (20μs/div) Line Transient Response — PWM Shutdown Transient Response 3.5V to 4.0V transition on VIN VOUT (2V/div) VOUT (100mV/div) ILX (200mA/div) ILX (200mA/div) VCTL3-0 (2V/div) VIN 500mV/div) Time (20μs/div) Time (20μs/div) 7 SC195F Pin Descriptions Pin Pin Name Pin Function 1 CTL2 Control bit 2 — see Table 1, page 2, for decoding. This pin has a weak pull-down resistor (> 1MΩ) in place at reset that is removed when CTL2 is pulled above the logic high threshold. 2 CTL1 Control bit 1 — see Table 1, page 2, for decoding. This pin has a weak pull-down resistor (> 1MΩ) in place at reset that is removed when CTL1 is pulled above the logic high threshold. 3 CTL0 Control bit 0 — see Table 1, page 2, for decoding. This pin has a weak pull-down resistor (> 1MΩ) in place at reset that is removed when CTL0 is pulled above the logic high threshold. 4 OUT Output voltage sense pin — output voltage regulation point (connection node of inductor and output capacitor). 5 GND Ground reference and power ground for the SC195F. 6 LX Switching output — connect an inductor between this pin and the load to filter the pulsed output current. 7 IN Input power supply pin — connect a bypass capacitor from this pin to GND. 8 CTL3 Control bit 3 — see Table 1, page 2, for decoding. This pin has a weak pull-down resistor (> 1MΩ) in place at reset that is removed when CTL3 is pulled above the logic high threshold. 8 SC195F Block Diagram Plimit Amp 8 IN 7 LX 6 GND Current Amp OSC & Slope Generator Control Logic PWM Comp 500mV Ref Error Amp CTL3 4 CTL2 3 CTL1 2 CTL0 1 OUT 5 PSAVE Comp Nlimit Amp Voltage Select 9 SC195F Applications Information General Description The SC195F is a synchronous step-down Pulse Width Modulated (PWM) DC-DC regulator utilizing a 3.5MHz fixed-frequency voltage mode architecture. The device is designed to operate in fixed-frequency PWM mode at all load conditions. The device requires only two capacitors and a single inductor to be implemented in most systems. The switching frequency has been chosen to minimize the size of the inductor and capacitors while maintaining high efficiency. The output voltage is programmable, eliminating the need for external programming resistors. Loop compensation is also internal, eliminating the need for external components to control stability. Programmable Output Voltage The SC195F has 15 fixed output voltage levels which can be individually selected by programming the CTL control pins (CTL3-0 — see Table 1 on page 2 for settings). The device is disabled whenever all four CTL pins are pulled low and enabled whenever at least one of the CTL pins is pulled high. This configuration eliminates the need for a dedicated enable pin. Each CTL pin is internally pulled down via 1MΩ if VIN is below 1.5V or if the voltage on the control pin is below the input high voltage. This ensures that the output is disabled when power is applied if there are no inputs to the CTL pins. Each weak pull-down is disabled whenever its pin is pulled high and remains disabled until all CTL pins are pulled low. The output voltage can be set using different approaches. If a static output voltage is required, the CTL pins can be tied to either IN or GND to set the desired voltage whenever power is applied at IN. If enable control is required, each CTL pin can be tied to either GND or to a microprocessor I/O line to create the desired control code whenever the control signal is forced high. This approach is equivalent to using the CTL pins collectively as a single enable pin. A third option is to connect each of the four CTL pins to individual microprocessor I/O lines. Any of the 15 output voltages can be programmed using this approach. If only two output voltages are needed, the CTL pins can be combined in a way that will reduce the number of I/O lines to 1, 2, or 3, depending on the control code for each desired voltage. Other CTL pins could be hard wired to GND or IN. This option allows dynamic voltage adjustment for systems that reduce the supply voltage at low power state. Note that applying all zeros to the CTL pins when changing the output voltages will temporarily disable the device, so it is important to avoid this combination when dynamically changing levels. Adjustable Output Voltage Selection If an output voltage other than one of the 15 programmable settings is needed, an external resistor divider network can be added to the SC195F to adjust the output voltage setting. This network scales the output based on the resistor ratio and the programmed output setting. The resistor values can be determined using the equation VOUT ª R RFB2 º VSET u « FB1 » ILEAK u RFB1 ¬ RFB2 ¼ where VOUT is the desired output voltage, VSET is the voltage setting selected by the CTL pins, R FB1 is the resistor between the output capacitor and the OUT pin, RFB2 is the resistor between the OUT pin and ground, and ILEAK is the leakage current into the OUT pin during normal operation. The current into the OUT pin is typically 1µA, so the last term of the equation can be neglected if the current through RFB2 is much larger than 1µA. Selecting a resistor value of 10kΩ or lower will simplify the design. If ILEAK is neglected and RFB2 is fixed, RFB1 can be determined using the equation RFB1 RFB2 u VOUT VSET VSET Inserting resistance in the feedback loop will adversely affect the system’s transient performance if feed-forward capacitance is not included in the circuit. The circuit in Figure 1 illustrates how the resistor divider and feed-forward capacitor can be added to the SC195F schematic. The value of feed-forward capacitance needed can be determined using the equation CFF 4 u 10 6 u VSET VOUT 0.5 RFB1 VOUT VSET VSET 0.5 2 10 SC195F Applications Information (continued) SC195F VIN IN LX CIN OUT CTL3 CTL2 Enable CTL1 LX VOUT CFF RFB1 COUT RFB2 GND CTL0 Figure 1 — Application Circuit with External Resistors To simplify the design, it is recommended to program the output setting to 1.0V, use resistor values smaller than 10kΩ, and include a feed-forward capacitance calculated with the equation above. If the output voltage is set to 1.0V, the previous equation reduces to CFF 8 u 10 6 u VOUT 0.52 RFB1 VOUT 1 Example: An output voltage of 1.3V is desired, but this is not a programmable option. What external component values for Figure 1 are needed? Solution: To keep the circuit simple, set RFB2 to 10kΩ so current into the OUT pin can be neglected and set the CTL3-0 pins to 0010 (1.0V setting). The necessary component values for this situation are VOUT VSET VSET RFB1 RFB 2 u CFF 8 u 10 6 u 3k: VOUT 0.52 RFB1 VOUT 1 5.69nF PWM and 100% Duty Cycle Operation In order to start up from pre-charged output voltage, SC195F does not allow inductor current to go negative in soft start stage, refer to the soft start waveforms in the Typical Characteristics page. When the output voltage exceeds 90% of the set point, determined by the CTLx combinations, the device will enter fixed 3.5MHz PWM mode operation. An internal synchronous NMOS rectifier turns on complementary to the top PMOSFET. The duty cycle (percentage of time PMOS is active) increases as VIN decreases to maintain output voltage regulation. As the input voltage approaches the programmed output voltage, the duty cycle approaches 100% (PMOS always on) and the device enters a passthrough mode until the input voltage increases or the load decreases enough to allow PWM switching to resume. Protection Features The SC195F provides the following protection features: •• •• •• •• •• Current Limited Soft-Start Operation Over-Voltage Protection Current Limit Thermal Shutdown Input Voltage Under-Voltage Lockout Soft-Start with Current Limit The soft-start sequence is activated after a CTL code transition from an all zeros code to a non-zero code enables the start up process. From the beginning of a start-up process, the internal reference start-up takes typically 50μs, then PMOS current limit is stepped through four levels: 25%, 40%, 60%, and 100%. Each step is maintained for typically 75μs. A complete 4 steps start-up period could take 350μs. Before VOUT reaches 90%, the inductor current is not allowed to go negative. The inductor current is confined between different current limit levels, 25%, 40%, 60%, or 100% to zero. As VOUT reaches 90% of the target value, the device will transition into a fixed 3.5MHz operation allowing inductor current in both directions. Due to current limit operation, if the load is heavy or the output capacitor is large, the soft start process may experience all 4 current limit steps before reaching 90% target voltage. This will make the soft start time long. If the load is light and output capacitor is small, the device may only need the first current limit step, reaching 90% of target, and transition into PWM operation. This makes the soft start time shorter. 11 SC195F Applications Information (continued) Over-Voltage Protection Over-voltage protection ensures the output voltage does not rise to a level that could damage its load. When VOUT exceeds the regulation voltage by 15%, the PWM drive is disabled. Switching does not resume until VOUT has fallen below the regulation voltage by 2%. Current Limit The SC195F switching stage is protected by a current limit function. If the output load exceeds the PMOS current limit for 32 consecutive switching cycles, the device enters fold-back current limit mode and the output current is limited to approximately 150mA. Under these conditions, the output voltage will be the product of IFB-LIM and the load resistance. The load must fall below IFB-LIM for the device to exit fold-back current limit mode. This function makes the device capable of sustaining an indefinite short circuit on its output under fault conditions. Thermal Shutdown The SC195F has a thermal shutdown feature to protect the device if the junction temperature exceeds 160°C. During thermal shutdown, the PMOS and NMOS switches are both disabled, tri-stating the LX output. When the junction temperature drops by the hysteresis value (20°C), the device goes through the soft-start process and resumes normal operation. Input Voltage Under-Voltage Lockout Under-Voltage Lockout (UVLO) activates when the input power supply voltage drops below the UVLO threshold. This prevents the device from entering an ambiguous state in which regulation cannot be maintained. Hysteresis of approximately 200mV is included to prevent chattering near the threshold. External Components Inductor Selection The SC195F is designed to operate with a suggested 1µH inductor between the LX pin and the OUT pin. The SC195F converter has internal loop compensation. The compensation is designed to work with a specific single-pole output filter corner frequency defined by the equation I& S / u &287 where L = 1μH and COUT = 10μF. When selecting output filter components, the LC product should not vary over a wide range. Selection of smaller inductor and capacitor values will move the corner frequency, potentially impacting system stability. It is also important to consider the change in inductance with DC bias current when choosing an inductor. The inductor saturation current is specified as the current at which the inductance drops a specific percentage from the nominal value (approximately 30%). Except for shortcircuit or other fault conditions, the peak current must always be less than the saturation current specified by the manufacturer. The peak current is the maximum load current plus one half of the inductor ripple current at the maximum input voltage. Load and/or line transients can cause the peak current to exceed this level for short durations. Maintaining the peak current below the inductor saturation specification keeps the inductor ripple current and the output voltage ripple at acceptable levels. Manufacturers often provide graphs of actual inductance and saturation characteristics versus applied inductor current. The saturation characteristics of the inductor can vary significantly with core temperature. Core and ambient temperatures should be considered when examining the core saturation characteristics. When the inductor value has been determined, the DC resistance (DCR) must be examined. Efficiency can be optimized by lowering the inductor’s DCR as much as possible. Low DCR in an inductor requires either more surface area for the increased wire diameter or fewer turns to reduce the length of the copper winding. Fewer turns requires an inductor core with a larger cross-sectional area in order to maintain the same saturation characteristics. The inductor size must always be considered when examining the inductor DCR to determine the best compromise between DCR and component area on a PCB. Note that the ripple component of the inductor is a small percent- 12 SC195F Applications Information (continued) age of the DC load. AC losses in the inductor core and winding do not contribute significantly to the total losses. Magnetic fields associated with the output inductor can interfere with nearby circuitry. This can be minimized by the use of low-noise shielded inductors which use the minimum gap possible to limit the distance that magnetic fields can radiate from the inductor. Shielded inductors, however, typically have a higher DCR and are, therefore, less efficient than a similar sized non-shielded inductor. Final inductor selection depends on various design considerations such as efficiency, EMI, size, and cost. Table 2 lists the manufacturers of recommended inductor options. The inductors with larger packages tend to provide better overall efficiency, while the smaller package inductors provide decent efficiency with reduced footprint or height. The saturation current ratings and DC characteristics are also shown. Table 2 — Recommended Inductors Manufacturer Part Number L (μH) DCR (Ω) Saturation Current (mA) L at 400mA (μH) Dimensions LxWxH (mm) Murata LQM21PN1R0MC0 1.0±20% 0.19 800 0.75 2.0x1.25x0.55 Murata LQM2HPN1R0MJ0 1.0±20% 0.09 1500 0.95 2.5x2.0x1.1 Murata LQM31PN1R0M00 1.0±20% 0.12 1200 0.95 3.2x1.6x0.85 Taiyo Yuden CKP25201R0M-T 1.0±20% 0.08 800 0.88 2.5x2.0x1.0 Toko MDT2012-CR1R0N 1.0±30% 0.08 1350 1.00 2.0x1.25x1.0 FDK MIPSZ2012D1R0 1.0±30% 0.09 1100 1.00 2.0x1.25x1.0 FDK MIPSU2520D1R0 1.0±30% 0.08 1300 0.78 2.5x2.0x0.5 FDK MIPSA2520D1R0 1.3±30% 0.09 1200 1.20 2.5x2.0x1.2 Taiyo Yuden BRC1608T1R0M 1.0±20% 0.18 850 0.90 1.6x0.8x0.8 COUT Selection The internal voltage loop compensation in the SC195F limits the minimum output capacitor value to 10μF. This is due to its influence on the the loop crossover frequency, phase margin, and gain margin. Increasing the output capacitor above this minimum value will reduce the crossover frequency and provide greater phase margin. The output capacitor determines the output voltage ripple and contributes load current during large step load transitions. A capacitor between 10μF and 22μF will usually be adequate in stabilizing the output during large load transitions. Capacitors with X7R or X5R ceramic dielectric are recommended for their low ESR and superior temperature and voltage characteristics. Y5V capacitors should not be used as their temperature coefficients make them unsuitable for this application. In addition to ensuring stability, the output capacitor serves other important functions. This capacitor determines the output voltage ripple — as capacitance increases, ripple voltage decreases. It also supplies current during a large load step for a few switching cycles until the control loop responds (typically 3 switching cycles). Once the loop responds, regulation is restored and the desired output is reached. During the period prior to PWM operation resuming, the relationship between output voltage and output capacitance can be approximated using the equation COUT 3 u 'ILOAD VDROOP u f This equation can be used to approximate the minimum output capacitance needed to ensure voltage does not droop below an acceptable level. For example, a load step from 50mA to 400mA requiring droop less than 50mV would require the minimum output capacitance to be COUT 3 u 0 .4 0.05 u 4 u 10 6 6.0PF In this example, using a standard 10µF capacitor would be adequate to keep voltage droop less than the desired 13 SC195F Applications Information (continued) limit. Note that if the voltage droop limit were decreased from 50mV to 25mV, the output capacitance would need to be increased to at least 12µF (twice as much capacitance for half the droop). Capacitance will decrease from the nominal value when a ceramic capacitor is biased with a DC current, so it is important to select a capacitor whose value exceeds the necessary capacitance value at the programmed output voltage. Check the manufacturer’s capacitance vs. DC voltage graphs when selecting an output capacitor to ensure the capacitance will be adequate. Table 3 lists the manufacturers of recommended output capacitor options. Table 3 — Recommended Output Capacitors Value (μF) Type Rated Voltage (VDC) Murata GRM188R60J106ME47D 10±20% X5R 6.3 1.6x0.8x0.8 0603 Murata GRM21BR60J106K 10±10% X5R 6.3 2.0x1.25x1.25 0805 Taiyo Yuden JMK107BJ106MA-T 10±20% X5R 6.3 1.6x0.8x0.8 0603 TDK C1608X5R0J106MT 10±20% X5R 6.3 1.6x0.8x0.8 0603 Manufacturer Part Nunber Dimensions LxWxH (mm) Case Size CIN Selection The SC195F input current will appear as a pulse DC current. To prevent large input voltage ripple, a low ESR ceramic capacitor is required. A minimum value of 4.7μF should be used. It is important to consider the DC voltage coefficient characteristics when determining the actual required value. For example, a 10μF, 6.3V, X5R ceramic capacitor with 5V DC applied may exhibit a capacitance as low as 4.5μF. The value of required input capacitance is estimated by determining the acceptable input ripple voltage and calculating the minimum value required for CIN using the equation CIN VOUT § VOUT · ¨1 ¸ VIN ¨© VIN ¸¹ § 'V · ¨¨ ESR ¸¸f I © OUT ¹ The input voltage ripple is at maximum level when the input voltage is twice the output voltage (50% duty cycle scenario). The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the PMOS switch. Low ESR/ESL X5R ceramic capacitors are recommended for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IN and GND pins of the SC195F. Table 4 lists the recommended input capacitor options from different manufacturers. Table 4 — Recommended Input Capacitors Manufacturer Part Nunber Value (μF) Type Rated Voltage (VDC) Dimensions LxWxH (mm) Case Size Murata GRM188R60J475K 4.7±10% X5R 6.3 1.6x0.8x0.8 0603 Murata GRM188R60J106K 10±10% X5R 6.3 1.6x0.8x0.8 0603 Taiyo Yuden JMK107BJ475KA 4.7±10% X5R 6.3 1.6x0.8x0.8 0603 TDK C1608X5R0J475KT 4.7±10% X5R 6.3 1.6x0.8x0.8 0603 PCB Layout Considerations The layout diagram in Figure 2 shows a recommended PCB top-layer for the SC195F and supporting components. Specified layout rules must be followed since the layout is critical for achieving the performance specified in the Electrical Characteristics table. Poor layout can degrade the performance of the DC-DC converter and can contribute to EMI problems, ground bounce, and resistive voltage losses. Poor regulation and instability can result. The following guidelines are recommended for designing a PCB layout: 1. CIN should be placed as close to the IN and GND pins as possible. This capacitor provides a low impedance loop for the pulsed currents present at the buck converter’s input. Use short wide traces to minimize trace impedance. This will also minimize EMI and input voltage ripple by localizing the high frequency current pulses. 2. Keep the LX pin traces as short as possible to minimize pickup of high frequency switching edges to other parts of the circuit. COUT and LX should be connected as close as possible between the LX and GND pins, with a direct return to the GND. 14 SC195F Applications Information (continued) 3. Use a ground plane referenced to the GND pin. Use several vias to connect to the component side ground to further reduce noise and interference on sensitive circuit nodes. 4. Route the output voltage feedback/sense path away from the inductor and LX node to minimize noise and magnetic interference. 5. Minimize the resistance from the OUT and GND pins to the load. This will reduce errors in DC regulation due to voltage drops in the traces. 4.8mm CIN 3mm LX CTL3 CTL2 CTL1 CTL0 SC195F COUT Figure 2 — Recommended PCB Layout 15 SC195F Outline Drawing — MLPQ-UT8 D A B PIN 1 INDICATOR (LASER MARK) DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A A1 A2 b D E e L N aaa bbb E A2 A .024 .002 (.006) .006 .008 .010 .059 BSC .059 BSC .016 BSC 0.12 .014 0.16 8 .004 .004 .020 .000 0.60 0.05 (0.1524) 0.15 0.20 0.25 1.50 BSC 1.50 BSC 0.40 BSC 0.30 0.35 0.40 8 0.10 0.10 0.50 0.00 SEATING PLANE aaa C C A1 LxN e 2 0.20 0.25 1 N 0.17 bxN bbb C A B NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 16 SC195F Suggested Land Pattern — MLPQ-UT8 Z G DIM P 2X (C) (G) (Z) X R C G P R X Y Z DIMENSIONS INCHES MILLIMETERS (.057) .028 .016 .004 .008 .030 .087 (1.45) 0.70 0.40 0.10 0.20 0.75 2.20 Y NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 17 SC195F © Semtech 2016 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. 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