VISHAY SI8409DB

Si8409DB
New Product
Vishay Siliconix
P-Channel 30-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
−30
rDS(on) (W)
ID (A)
0.046 @ VGS = −4.5 V
−6.3
0.065 @ VGS = −2.5 V
−5.3
Qg (Typ)
17
D TrenchFETr Power MOSFET
D New MICRO FOOTr Chipscale Packaging
Reduces Footprint Area, Profile (0.62 mm) and
On-Resistance Per Footprint Area
D Pin Compatible to Si8401DB
APPLICATIONS
D Load Switch, Battery Switch, and PA Switch for
Portable Devices
S
MICRO FOOT
Bump Side View
3
Backside View
G
2
D
S
4
8409
xxx
D
G
Device Marking: 8409
xxx = Date/Lot Traceability Code
D
Ordering Information: Si8409DB-T1—E1
1
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
5 secs
Steady State
Drain-Source Voltage
VDS
−30
Gate-Source Voltage
VGS
"12
Continuous Drain Current (TJ = 150_C)a
TA = 25_C
TA = 70_C
Pulsed Drain Current
ID
IS
TA = 25_C
Maximum Power Dissipationa
TA = 70_C
Operating Junction and Storage Temperature Range
Package Reflow Conditionsb
PD
V
−4.6
−6.3
−5.1
−3.7
IDM
continuous Source Current (Diode Conduction)a
−25
−2.5
−1.3
2.77
1.47
1.77
0.94
TJ, Tstg
Unit
A
W
−55 to 150
VPR
215
IR/Convection
220
_C
THERMAL RESISTANCE RATINGS
Parameter
M i
Maximum
JJunction-to-Ambient
ti t A bi ta
Maximum Junction-to-Foot (drain)
Symbol
t v 5 sec
Steady State
Steady State
RthJA
RthJF
Typical
Maximum
35
45
72
85
16
20
Unit
_C/W
C/W
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering.
Document Number: 73111
S-41816—Rev. A, 11-Oct-04
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Si8409DB
New Product
Vishay Siliconix
SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Min
VGS(th)
VDS = VGS, ID = −250 mA
−0.6
Typ
Max
Unit
−1.4
V
"100
nA
Static
Gate Threshold Voltage
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain Source On-State
Drain-Source
On State Resistancea
Voltagea
VDS = −30 V, VGS = 0 V
−1
VDS = −30 V, VGS = 0 V, TJ = 70_C
−5
VDS v −5 V, VGS = −4.5 V
mA
−5
A
VGS = −4.5 V, ID = −1 A
0.038
0.046
VGS = −2.5 V, ID = −1 A
0.052
0.065
gfs
VDS = −10 V, ID = −1 A
6.4
VSD
IS = −1 A, VGS = 0 V
−0.8
−1.1
17
26
VDS = −10 V, VGS = −4.5 V, ID = −1 A
2.2
rDS(on)
DS( )
Forward Transconductancea
Diode Forward
VDS = 0 V, VGS = "12 V
W
S
V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
f = 1MHz
22
td(on)
Rise Time
VDD = −10 V, RL = 10 W
ID ^ −1 A, VGEN = −4.5 V, Rg = 6 W
td(off)
Fall Time
tf
Source-Drain Reverse Recovery Time
trr
W
20
tr
Turn-Off Delay Time
nC
5.7
IF = −1 A, di/dt = 100 A/ms
30
35
55
140
210
90
135
85
130
ns
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Characteristics
25
Transfer Characteristics
25
VGS = 5 thru 3 V
2.5 V
20
I D − Drain Current (A)
I D − Drain Current (A)
20
15
2V
10
5
1.5 V
15
10
TC = 125_C
5
25_C
−55_C
0
0
1
2
3
4
VDS − Drain-to-Source Voltage (V)
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2
5
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VGS − Gate-to-Source Voltage (V)
Document Number: 73111
S-41816—Rev. A, 11-Oct-04
Si8409DB
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Drain Current
0.16
Capacitance
1500
1200
0.12
C − Capacitance (pF)
r DS(on) − On-Resistance ( W )
0.14
0.10
0.08
VGS = 2.5 V
0.06
VGS = 4.5 V
0.04
Ciss
900
600
Coss
300
0.02
Crss
0.00
0
0
5
10
15
20
25
0
5
Gate Charge
1.5
25
30
VGS = 4.5 V
ID = 1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
V GS − Gate-to-Source Voltage (V)
20
On-Resistance vs. Junction Temperature
1.6
VDS = 10 V
ID = 1 A
4
15
VDS − Drain-to-Source Voltage (V)
ID − Drain Current (A)
5
10
3
2
1
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0
0
4
8
12
16
0.6
−50
20
−25
0
Qg − Total Gate Charge (nC)
Source-Drain Diode Forward Voltage
75
100
125
150
On-Resistance vs. Gate-to-Source Voltage
0.10
r DS(on) − On-Resistance ( W )
I S − Source Current (A)
50
TJ − Junction Temperature (_C)
30
TJ = 150_C
10
TJ = 25_C
1
0.0
25
0.08
ID = 1 A
0.06
0.04
0.02
0.00
0.2
0.4
0.6
0.8
1.0
1.2
VSD − Source-to-Drain Voltage (V)
Document Number: 73111
S-41816—Rev. A, 11-Oct-04
1.4
1.6
0
1
2
3
4
5
VGS − Gate-to-Source Voltage (V)
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Si8409DB
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Threshold Voltage
Single Pulse Power, Juncion-To-Ambient
0.6
80
ID = 250 mA
0.5
60
Power (W)
V GS(th) Variance (V)
0.4
0.3
0.2
40
0.1
0.0
20
−0.1
−0.2
−50
−25
0
25
50
75
100
125
0
150
0.001
0.01
0.1
TJ − Temperature (_C)
10
1
100
600
Time (sec)
Safe Operating Area
100
IDM Limited
* rDS(on) Limited
I D − Drain Current (A)
10
P(t) = 0.001
1
ID(on)
Limited
P(t) = 0.01
P(t) = 0.1
0.1
TA = 25_C
Single Pulse
P(t) = 1
P(t) = 10
BVDSS Limited
dc
0.01
0.1
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
10
100
VDS − Drain-to-Source Voltage (V)
*VGS u minimum VGS at which rDS(on) is specified
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = RthJA = 72_C/W
3. TJM − TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10−4
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4
10−3
10−2
10−1
1
Square Wave Pulse Duration (sec)
10
100
600
Document Number: 73111
S-41816—Rev. A, 11-Oct-04
Si8409DB
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Normalized Thermal Transient Impedance, Junction-to-Foot
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10−4
Document Number: 73111
S-41816—Rev. A, 11-Oct-04
10−3
10−2
10−1
Square Wave Pulse Duration (sec)
1
10
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Si8409DB
New Product
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 X 2, 0.8-mm PITCH)
4
O 0.30 X 0.31
Note 3
Solder Mask O X 0.40
e
A
A2
Silicon
A1
Bump Note 2
b Diamerter
e
S
Recommended Land
E
e
8409
XXX
e
S
D
Mark on Backside of Die
NOTES (Unless Otherwise Specified):
1.
Laser mark on the silicon die back, coated with a thin metal.
2.
Bumps are lead (Pb)-free.
3.
Non-solder mask defined copper landing pad.
4.
The flat side of wafers is oriented at the bottom.
MILLIMETERS*
INCHES
Dim
Min
Max
Min
Max
A
0.600
0.650
0.0236
0.0256
A1
0.260
0.290
0.0102
0.0114
A2
0.340
0.360
0.0134
0.0142
b
0.370
0.410
0.0146
0.0161
D
1.520
1.600
0.0598
0.0630
E
1.520
1.600
0.0598
0.0630
e
0.750
0.850
0.0295
0.0335
S
0.370
0.380
0.0146
0.0150
* Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?73111.
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Document Number: 73111
S-41816—Rev. A, 11-Oct-04
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
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