TS30111 High Efficiency 700mA Current-Mode Synchronous Buck DC/DC Regulator, 1MHz TRIUNE PRODUCTS Features • • • • • • • • • • • • • Fixed output voltage choices: 1.5V, 1.8V, 2.5V, 3.3V, and 5V Adjustable version output voltage range: 0.9V to 5V Wide input voltage range 4.5V to 16V (18V Abs Max) 1MHz +/- 10% fixed switching frequency Continuous output current: 700mA High efficiency – up to 90% Current mode PWM control with PFM mode for improved light load efficiency Voltage supervisor for VOUT reported at the PG pin Input supply under voltage lockout Soft start for controlled startup with no overshoot Full protection for over-current, over-temperature, and VOUT over-voltage Less than 10µA in standby mode Low external component count Product is lead-free, Halogen Free, RoHS / WEEE compliant Summary Specification • • Description The TS30111 is a DC/DC synchronous switching regulator with fully integrated power switches, internal compensation, and full fault protection. The switching frequency of 1MHz enables the use of small filter components resulting in minimal board space and reduced BOM costs. The TS30111 utilizes current mode feedback in normal regulation PWM mode. When the regulator is placed in standby (EN is low), the device draws less than 10µA quiescent current. The TS30111 integrates a wide range of protection circuitry including input supply under-voltage lockout, output voltage soft start, current limit, and thermal shutdown. The TS30111 includes supervisory reporting through the PG (Power Good) open drain output to interface other components in the system. Junction operating temperature -40 °C to 125 °C Packaged in a 16pin QFN (3x3) Applications • • On-card switching regulators Set-top box, DVD, LCD, LED supply Typical Applications Adjustable Output TS30111 GND TS30111 Final Datasheet June 13, 2016 Rev 1.2 VOUT RTOP VOUT 10 kohm (optional) VOUT VSW COUT RBOT PG BST VCC FB EN PGND EN LOUT VCC TS30111 VSW CBYPASS CBST EN PG www.semtech.com FB VOUT 10 kohm (optional) EN PGND VCC Fixed Output GND VCC BST PG PG 1 of 21 Semtech Product Ordering Information Part Number Description TS30111-M000QFNR 1MHz Sync Buck, 700mA – Adj V TS30111-M015QFNR 1MHz Sync Buck, 700mA - 1.5V TS30111-M018QFNR 1MHz Sync Buck, 700mA - 1.8V TS30111-M025QFNR 1MHz Sync Buck, 700mA - 2.5V TS30111-M033QFNR 1MHz Sync Buck, 700mA - 3.3V TS30111-M050QFNR 1MHz Sync Buck, 700mA – 5.0V Marking Information Top Mark : Legend Line 1 Logo Line 2 30111 Line 3 • TS30111 Final Datasheet June 13, 2016 Device Identification Pin 1 Mark VL Voltage Level; 15 =1.5V; 18 = 1.8V; 25 = 2.5V; 33 = 3.3V; 50 = 5.0V; 00 = Adj V M Month Code: Jan – Sept = 1 – 9; Oct = A; Nov = B; Dec = C Y Year Code: A = 2011; B = 2012; C = 2013; … Rev 1.2 www.semtech.com 2 of 21 Semtech VSW PIN 1 PGND PGND VSW Pinout VSW VSW VCC VCC TS30111 ` VCC BST GND EN PG NC NC FB Figure 1: 16 Lead 3x3 QFN, Top View Pin Description Pin # Pin Name Pin Function Description 1 VSW Switching Voltage Node 2 VCC Input Voltage Input voltage 3 VCC Input Voltage Input voltage 4 GND GND Primary ground for the majority of the device except the low-side power FET 5 FB Feedback Input Regulator FB Voltage. Connects to VOUT for fixed mode and the output resistor divider for adjustable mode 6 NC No Connect 7 8 NC PG No Connect Power Good Output 9 EN Enable Input Above 2.2V the device is enabled. GND the pin to put device in standby mode. Includes internal pull-up 10 BST Bootstrap Capacitor Bootstrap capacitor for the high-side FET gate driver. 22nF ceramic capacitor from BST pin to VSW pin 11 VCC Input Voltage 12 VSW Switching Voltage Node Connected to 3.3µH (typical) inductor 13 VSW Switching Voltage Node Connected to 3.3µH (typical) inductor 14 PGND Power GND GND supply for internal low-side FET/integrated diode 15 PGND Power GND GND supply for internal low-side FET/integrated diode 16 VSW Switching Voltage Node Connected to 3.3µH (typical) inductor Not Connected Not Connected Open-drain output Input Voltage Connected to 3.3µH (typical) inductor Thermal Characteristics Package QFN θJA (°C/W) (See Note 4) θJC (°C/W) (See Note 5) 16 pin 50 3.9 (4) This assumes a FR4 board only. (5) This assumes a 1 Oz. Copper JEDEC standard board with thermal vias – See Exposed Pad section and application note for more information. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 3 of 21 Semtech Functional Block Diagram PG EN VCC 4.2V VCC VIN VCC Under Voltage Protection MONITOR & CONTROL Over & Under Voltage Protection Oscillator Vref & Softstart VCC FB Bootstrap Voltage Thermal Protection Ramp Generator CBYPASS Over Current Protection BST VCC Σ CBST Gate Drive Control Gate Drive VSW LOUT VOUT COUT Gate Drive Comparator Error Amp PGND Vref Compensation Network RTOP FB PFM Mode Comparator RBOT GND Figure 2: TS30111 Block Diagram PG VOUT-UV EN Filter Filter ENABLE REGULATOR Internal POR Filter VCC-UV Filter TSD Filter VOUT-OV Filter IOCD OCD_Filter TRISTATE VSW OUTPUT Figure 3: Monitor & Control Logic Functionality TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 4 of 21 Semtech Absolute Maximum Ratings Over operating free–air temperature range unless otherwise noted(1, 2) Parameter Value Unit VCC -0.3 to 18 V BST -0.3 to (VCC+6) V VSW -1 to 18 V EN, PG, FB -0.3 to 6 V Electrostatic Discharge – Human Body Model +/-2k V Electrostatic Discharge – Charge Device Model +/-500 V 260 °C Lead Temperature (soldering, 10 seconds) Notes: (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. Thermal Characteristics Symbol Parameter Value Unit θJA Thermal Resistance Junction to Air (Note 1) 50 °C/W TSTG Storage Temperature Range -65 to 150 °C TJ MAX Maximum Junction Temperature 150 °C Operating Junction Temperature Range -40 to 125 °C TJ Note 1: Assumes 16LD 3x3 QFN with hi-K JEDEC board and 13.5 inch2 of 1 oz Cu Recommended Operating Conditions Symbol Parameter Min Typ Max Unit VCC Input Operating Voltage 4.5 12 16 V CBST Bootstrap Capacitor 17.6 22 26.4 nF LOUT Output Filter Inductor Typical Value (Note 1) 3.3 µH COUT Output Filter Capacitor Typical Value (Note 2) 22 µF COUT-ESR Output Filter Capacitor ESR 2 CBYPASS Input Supply Bypass Capacitor Typical Value (Note 3) 8 100 10 mΩ µF Note 1: For best performance, an inductor with a saturation current rating higher than the maximum VOUT load requirement plus the inductor current ripple. Note 2: For best performance, a low ESR ceramic capacitor should be used. Note 3: For best performance, a low ESR ceramic capacitor should be used. If CBYPASS is not a low ESR ceramic capacitor, a 0.1µF ceramic capacitor should be added in parallel to CBYPASS. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 5 of 21 Semtech Electrical Characteristics Electrical characteristics, TJ = -40°C to 125°C, VCC = 12V (unless otherwise noted) Symbol Parameter Condition Min Typ Max Unit 16 V VCC Supply Voltage VCC Input Supply Voltage Quiescent current Normal Mode Quiescent current Normal Mode – Non-switching Quiescent current Standby Mode ICC-NORM ICC-NOSWITCH ICC-STBY 4.5 VCC = 12V, ILOAD = 0A 5.2 mA VCC=12V, ILOAD=0A, Non-switching 2.3 mA VCC = 12V, VEN = 0V 5 VCC Increasing 4.3 V 350 mV Oscillator Frequency 1 MHz PG Release Timer 10 ms 0.5 µA 10 µA VCC Under Voltage Lockout Input Supply Under Voltage Threshold Input Supply Under Voltage Threshold Hysteresis VCC-UV VCC-UV_HYST OSC fOSC PG Open Drain Output tPG IOH-PG High-Level Output Leakage VPG=5V VOL-PG Low-Level Output Voltage IPG = -0.3mA 0.01 V EN/nLP Input Voltage Thresholds VIH-EN High Level Input Voltage VIL-EN Low Level Input Voltage VHYST-EN 2.2 0.8 Input Hysteresis IIN-EN EN Input Leakage V V 480 mV VEN=5V 3.5 µA VEN=0V -1.5 µA 170 °C 10 °C Thermal Shutdown TSD Thermal Shutdown Junction Temperature Note: not tested in production TSD Hysteresis Note: not tested in production TSDHYST TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 150 6 of 21 Semtech Regulator Characteristics Electrical characteristics, TJ = -40°C to 125°C, VCC = 12V (unless otherwise noted) Symbol Parameter Condition Min Typ Max Unit Switch Mode Regulator: L=3.3µH and C=22µF VOUT-PWM Output Voltage Error in PWM Mode ILOAD =700 mA ±2% V VOUT-PFM Output Voltage Tolerance in PFM Mode ILOAD = 0A VOUT + 1% V High Side Switch On Resistance IVSW = -700mA 240 mΩ Low Side Switch On Resistance IVSW = 700mA 160 mΩ RDSON IOUT Output Current 700 IOCD Over Current Detect HS switch current 1.2 A FBTH Feedback Reference (Adjustable Mode) (Note 2) 0.9 V FBTH-TOL Feedback Reference Absolute Tolerance (Note 2) 1.5 % tSS Soft start Ramp Time 4 ms FBTH-PFM PFM Mode FB Comparator Threshold VOUT + 1% V VOUT-UV VOUT Under Voltage Threshold 93% VOUT VOUT-UV_HYST VOUT Under Voltage Hysteresis 1.5% VOUT VOUT-OV VOU TOver Voltage Threshold 103% VOUT VOUT-OV_HYST VOUT Over Voltage Hysteresis 1% VOUT DUTYMAX Max Duty Cycle (Note 1) 95% 97% mA 99% Note 1: Regulator VSW pin is forced off for 240ns every 8 cycles to ensure the BST cap is replenished. Note 2: For the adjustable version, the ratio of VCC/VOUT cannot exceed 16. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 7 of 21 Semtech Functional Description The TS30111 current-mode synchronous step-down power supply product is ideal for use in the commercial, industrial, and automotive market segments. It includes flexibility to be used for a wide range of output voltages and is optimized for high efficiency power conversion with low RDSON integrated synchronous switches. A 1MHz internal switching frequency facilitates low cost LC filter combinations. Additionally, the fixed output versions enable a minimum external component count to provide a complete regulation solution with only 4 external components: an input bypass capacitor, an inductor, an output capacitor, and the bootstrap capacitor. The regulator automatically transitions between PFM and PWM mode to maximize efficiency for the load demand. The TS30111 was designed to provide these system benefits: • Reduced board real estate • Lower system cost Lower cost inductor Low external parts count • Ease of design Bill of Materials and suggested board layout provided Power Good output Integrated compensation network Wide input voltage range • Robust solution Over current, over voltage and over temperature protection Detailed Pin Description Unregulated input, VCC This terminal is the unregulated input voltage source for the IC. It is recommended that a 10µF bypass capacitor be placed close to the device for best performance. Since this is the main supply for the IC, good layout practices need to be followed for this connection. Bootstrap control, BST This terminal will provide the bootstrap voltage required for the upper internal NMOS switch of the buck regulator. An external ceramic capacitor placed between the BST input terminal and the VSW pin will provide the necessary voltage for the upper switch. In normal operation the capacitor is re-charged on every low side synchronous switching action. In the case of where the switch mode approaches 100% duty cycle for the high side FET, the device will automatically reduce TS30111 Final Datasheet June 13, 2016 Rev 1.2 the duty cycle switch to a minimum off time on every 8th cycle to allow this capacitor to re-charge. Sense feedback, FB This is the input terminal for the output voltage feedback. For the fixed mode versions, this should be hooked directly to VOUT. The connection on the PCB should be kept as short as possible, and should be made as close as possible to the capacitor. The trace should not be shared with any other connection. (Figure 23) For adjustable mode versions, this should be connected to the external resistor divider. To choose the resistors, use the following equation: VOUT = 0.9 (1 + RTOP/RBOT ) The input to the FB pin is high impedance, and input current should be less than 100nA. As a result, good layout practices are required for the feedback resistors and feedback traces. When using the adjustable version, the feedback trace should be kept as short as possible and minimum width to reduce stray capacitance and to reduce the injection of noise. For the adjustable version, the ratio of VCC/VOUT cannot exceed 16. Switching output, VSW This is the switching node of the regulator. It should be connected directly to the 3.3µH inductor with a wide, short trace and to one end of the Bootstrap capacitor. It is switching between VCC and PGND at the switching frequency. Ground, GND This ground is used for the majority of the device including the analog reference, control loop, and other circuits. Power Ground, PGND This is a separate ground connection used for the low side synchronous switch to isolate switching noise from the rest of the device. (Figure 15) Enable, EN This is the input terminal to activate the regulator. The input threshold is TTL/CMOS compatible. It also has an internal pullup to ensure a stable state if the pin is disconnected. www.semtech.com 8 of 21 Semtech Power Good Output, PG This is an open drain, active low output. The switched mode output voltage is monitored and the PG line will remain low until the output voltage reaches the VOUT-UV threshold. Once the internal comparator detects the output voltage is above the desired threshold, an internal delay timer is activated and the PG line is de-asserted to high once this delay timer expires. In the event the output voltage decreases below VOUT-UV, the PG line will be asserted low and remain low until the output rises above VOUT-UV and the delay timer times out. See Figure 2 for the circuit schematic for the PG signal. Internal Protection Details Internal Current Limit The current through the high side FET is sensed on a cycle by cycle basis and if current limit is reached, it will abbreviate the cycle. In addition, the device senses the FB pin to identify hard short conditions and will direct the VSW output to skip 4 cycles if current limit occurs when FB is low. This allows current built up in the inductor during the minimum on time to decay sufficiently. Current limit is always active when the regulator is enabled. Soft start ensures current limit does not prevent regulator startup. Under extended over current conditions (such as a short), the device will automatically disable. Once the over current condition is removed, the device returns to normal operation automatically. (Alternately the factory can configure the device’s NVM to shutdown the regulator if an extended over current event is detected and require a toggle of the Enable pin to return the device to normal operation.) Thermal Shutdown If the temperature of the die exceeds 170°C (typical), the VSW outputs will tri-state to protect the device from damage. The PG and all other protection circuitry will stay active to inform the system of the failure mode. Once the device cools to 160°C (typical), the device will start up again, following the normal soft start sequence. If the device reaches 170°C, the shutdown/ restart sequence will repeat. TS30111 Final Datasheet June 13, 2016 Rev 1.2 Reference Soft Start The reference in this device is ramped at a rate of 4ms to prevent the output from overshoot during startup. This ramp restarts whenever there is a rising edge sensed on the Enable pin. This occurs in both the fixed and adjustable versions. During the soft start ramp, current limit is still active, and will still protect the device in case of a short on the output. Output Overvoltage If the output of the regulator exceeds 103% of the regulation voltage, the VSW outputs will tri-state to protect the device from damage. This check occurs at the start of each switching cycle. If it occurs during the middle of a cycle, the switching for that cycle will complete, and the VSW outputs will tri-state at the beginning of the next cycle. VCC Under-Voltage Lockout The device is held in the off state until VCC reaches 4.3V (typical). There is a 300mV hysteresis on this input, which requires the input to fall below 4V (typical) before the device will disable. www.semtech.com 9 of 21 Semtech TS30111 Version 1.0 Typical Performance Characteristics VCC = 12V, COUT = 2 x 22µF (unless otherwise noted) 5V/div 500mA/div 1V/div 50mV/div TYPICAL PERFORMANCE CHARACTERISTICS Figure 5. 100mA to 1A Load Step (VCC=12V, VOUT =1.8V) 5V/div 1A/div 50mV/div 100mV/div Figure 4. Startup Response Figure 6. 100mA to 1A Load Step (VCC=12V, VOUT=3.3V) TS30111 Specifications subject to change Final Datasheet Rev 1.2 June 13, 2016 Figure 7. Line Transient Response (VCC=12V, VOUT=3.3V) www.semtech.com WWW.TRIUNESYSTEMS.COM 10 of 21 Copyright © 2012, Triune Systems, LLC Semtech 10 Version 1.0 Figure 12. Efficiency vs. Output Current ( VOUT = 5V) Figure 13. Efficiency vs. Input Voltage (VOUT = 3.3V) Typical Performance Characteristics VCC = 12V, COUT =PERFORMANCE 2 x 22µF (unless otherwise noted) TYPICAL CHARACTERISTICS Standby Current (uA) 7.0 6.5 6.0 5.5 5.0 4.5 4.0 -‐50 0 50 100 150 Temperature (°C) Figure 8. Standby Current vs. Input Voltage Figure 9. Standby Current vs. Temperature Output Voltage (V) 3.305 Iout=30mA 3.300 3.295 Iout=300mA 3.290 3.285 3.280 -‐50 0 50 100 1.05 Oscillator Frequency (MHz) 3.310 1.03 1.01 0.99 0.97 0.95 150 -‐50 0 Temperature (°C) Input Current No SW (mA) Quiscent Current (mA) 2 1.98 1.96 1.94 1.92 1.9 1.88 1.86 1.84 5.50 5.00 4.50 0 50 100 150 -‐50 Figure 12. Quiescent Current vs. Temperature (No load) TS30111 Final Datasheet June 13, 2016 Rev 1.2 0 50 100 150 Temperature (°C) Temperature (°C) Specifications subject to change 150 Figure 11. Oscillator Frequency vs. Temperature (IOUT=300mA) 6.00 -‐50 100 Temperature (°C) Figure 10. Output Voltage vs. Temperature 4.00 50 Figure 13. Input Current vs. Temperature (No load, No switching) WWW.TRIUNESYSTEMS.COM 12 www.semtech.com Copyright © 2012, Triune Systems, LLC 11 of 21 Semtech Typical Application Schematic BST VCC VSW CBYPASS2 0.1µF 35V (optional) EN GND EN TS30111 CBYPASS 10µF 35V PGND VCC CBST 10nF LOUT 3.3µH DCATCH (optional) FB RTOP 17.8K RTOP 10K PG VOUT 2.5V COUT1 22µF 10V VOUT RPLP 10K (optional) PG Figure 14: TS30111 Application Schematic A minimal schematic suitable for most applications is shown on page 1. Figure 14 includes optional components that may be considered to address specific issues as listed in the External Component Selection section. PCB Layout For proper operation and minimum EMI, care must be taken during PCB layout. An improper layout can lead to issues such as poor stability and regulation, noise sensitivity and increased EMI radiation. The main guidelines are the following: • • • provide low inductive and resistive paths for loops with high di/dt, provide low capacitive paths with respect to all the other nodes for traces with high di/dt, sensitive nodes not assigned to power transmission should be referenced to the analog signal ground (GND) and be always separated from the power ground (PGND). The negative ends of CBYPASS, COUT and the Schottky diode DCATCH (optional) should be placed close to each other and connected using a wide trace. Vias must be used to connect the PGND node to the ground plane. The PGND node must be placed as close as possible to the TS30111 PGND pins to avoid additional voltage drop in traces. The bypass capacitor CBYPASS (optionally paralleled to a 0.1µF capacitor) must be placed close to the VCC pins of TS30111. TS30111 Final Datasheet June 13, 2016 Rev 1.2 The inductor must be placed close to the VSW pins and connected directly to COUT in order to minimize the area between the VSW pin, the inductor, the COUT capacitor and the PGND pins. The trace area and length of the switching nodes VSW and BST should be minimized. For the adjustable output voltage version of the TS30111, feedback resistors RBOT and RTOP are required for Vout settings greater than 0.9V and should be placed close to the TS30111 in order to keep the traces of the sensitive node FB as short as possible and away from switching signals. RBOT should be connected to the analog ground pin (GND) directly and should never be connected to the ground plane. The analog ground trace (GND) should be connected in only one point to the power ground (PGND). A good connection point is under the TS30111 package to the exposed thermal pad and vias which are connected to PGND. RTOP will be connected to the VOUT node using a trace that ends close to the actual load. For fixed output voltage versions of the TS30111, RBOT and RTOP are not required and the FB pin should be connected directly to the VOUT. www.semtech.com 12 of 21 Semtech The exposed thermal pad must be soldered to the PCB for mechanical reliability and to achieve good power dissipation. Vias must be placed under the pad to transfer the heat to the ground plane. VOUT COUT LOUT VSW VCC VCC VCC BST GND EN PG PGND NC FB CBYPASS VSW VSW NC Vias to ground plane PGND VSW CBYP PGND DCATCH Switching node RBOT VCC CBST COUT RPLP RTOP Analog ground (GND) Vias to ground plane Figure 15: TS30111 PCB Layout, Top View External Component Bill Of Materials Designator Function Description Suggested Manufacturer Manufacturer Code Qty CBYPASS Input Supply Bypass Capacitor 10µF 10% 35V TDK CGA5L3X5R1V106K160AB 1 COUT Output Filter Capacitor 22µF 10% 10V TDK C2012X5R1A226K125AB 1 LOUT Output Filter Inductor 3.3µH 900mA TDK Wurth MLP2012S3R3MT 744045003 1 CBST Boost Capacitor 22nF 10V TDK C1005X7R1C223K 1 RTOP Voltage Feedback Resistor (optional) 17.8K (Note 1) 1 RBOT Voltage Feedback Resistor (optional) 10K (Note 1) 1 RPLP PG Pin Pull-up Resistor (optional) 10K 1 DCATCH Catch Diode (optional) 30V 2A SOD-123FL On Semiconductor MBR230LSFT1G 1 Note 1: The voltage divider resistor values are calculated for an output voltage of 2.5V. For fixed output versions, the FB pin is connected directly to VOUT. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 13 of 21 Semtech External Component Selection Thermal Information The 1MHz internal switching frequency of the TS30111 facilitates low cost LC filter combinations. Additionally, the fixed output versions enable a minimum external component count to provide a complete regulation solution with only 4 external components: an input bypass capacitor, an inductor, an output capacitor, and the bootstrap capacitor. The internal compensation is optimized for a 22µF output capacitor and a 3.3µH inductor. TS30111 is designed for a maximum operating junction temperature TJ of 125°C. The maximum output power is limited by the power losses that can be dissipated over the thermal resistance given by the package and the PCB structures. The PCB must provide heat sinking to keep the TS30111 cool. The exposed metal on the bottom of the QFN package must be soldered to a ground plane. This ground should be tied to other copper layers below with thermal vias. Adding more copper to the top and the bottom layers and tying this copper to the internal planes with vias can reduce thermal resistance further. For a hi-K JEDEC board and 13.5 square inch of 1 oz Cu, the thermal resistance from junction to ambient can be reduced to θJA = 38°C/W. The power dissipation of other power components (catch diode, inductor) cause additional copper heating and can further increase what the TS30111 sees as ambient temperature. For best performance, a low ESR ceramic capacitor should be used for CBYPASS. If CBYPASS is not a low ESR ceramic capacitor, a 0.1µF ceramic capacitor should be added in parallel to CBYPASS. The minimum allowable value for the output capacitor is 22µF. To keep the output ripple low, a low ESR (less than 35mOhm) ceramic is recommended. Multiple capacitors can be paralleled to reduce the ESR. The inductor range is 3.3µH +/-20%. For optimal over-current protection, the inductor should be able to handle up to the regulator current limit without saturation. Otherwise, an inductor with a saturation current rating higher than the maximum IOUT load requirement plus the inductor current ripple should be used. For high current modes, the optional Schottky diode will improve the overall efficiency and reduce the heat. It is up to the user to determine the cost/benefit of adding this additional component in the user’s application. The diode is typically not needed. For the adjustable output version of the TS30111, the output voltage can be adjusted by sizing RTOP and RBOT feedback resistors. The equation for the output voltage is VOUT = 0.9 (1 + RTOP/RBOT ). For the adjustable version, the ratio of VCC/VOUT cannot exceed 16. RPUP is only required when the Power Good signal (PG) is utilized. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 14 of 21 Semtech Package Mechanical Drawings (all dimensions in mm) TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 15 of 21 Semtech Recommeded PCB Land Pattern DIMENSIONS IN MILLIMETERS Contact Pitch Optional Center Pad Width Optional Center Pad Length Contact Pad Spacing Contact Pad Spacing Contact Pad Width (X8) Contact Pad Length (X8) Distance Between Pads Units Dimension Limits E W2 T2 C1 C2 X1 Y1 G MIN 0.15 MILLIMETERS NOM 0.50 BSC 3.00 3.00 - MAX 1.70 1.70 0.35 0.65 - Notes: Dimensions and tolerances per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact values shown without tolerances. REF: Reference Dimension, usually without tolerance, for information only. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 16 of 21 Semtech Packaging Information Pb-Free (RoHS): The TS30111 devices are fully compliant for all materials covered by European Union Directive 2002/95/EC, and meet all IPC-1752 Level 3 materials declaration requirements. MSL, Peak Temp: The TS30111 family has a Moisture Sensitivity Level (MSL) 1 rating per JEDEC J-STD-020D. These devices also have a Peak Profile Solder Temperature (Tp) of 260°C. IR Reflow Profile Profile Feature Average ramp-up rate (Tsmax to Tp) Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (Tsmin to Tsmax) (ts) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: - Temperature (TL) - Time (TL) 183°C 60-150 seconds See Table 4.1 217°C 60-150 seconds See Table 4.2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Peak Temperature (Tp) Time within 5°C of actual Peak Temperature (tp)2 Ramp-down Rate Time 25°C to Peak Temperature Note 1: All temperatures refer to topside of the package, measured on the package body surface Note 2: Time within 5 C of actual peak temperature (tp) specified for the reflow profiles is a “supplier” minimum and “user” maximum. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 17 of 21 Semtech Table 4-1 SnPb Eutectic Process - Package Peak Reflow Temperatures Package Thickness <2.5 mm ≥ 2.5 mm Volume mm3 <350 240 +0/-5 °C 225 +0/-5°C Volume mm3 ≥ 350 225 +0/-5°C 225 +0/-5°C Table 4-2 Pb-free Process - Package Peak Reflow Temperatures Package Thickness < 1.6 mm 1.6 mm - 2.5 mm > 2.5 mm Volume mm3 < 350 260 °C * 260 °C * 250 °C * Volume mm3 350 - 2000 260 °C * 250 °C * 245 °C * Volume mm3 > 2000 260 °C * 245 °C * 245 °C * * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature at the rated MSL level Note 1: Package volume excludes external terminals (balls, bumps, lands, leads) and/or non-integral heat sinks. Note 2: The maximum component temperature reached during reflow depends on package thickness and volume. The use of convection reflow processes reduces the thermal gradients between packages. However, thermal gradients due to differences in thermal mass of SMD packages may still exist. Note 3: Components intended for use in a “lead-free” assembly process shall be evaluated using the “lead free” peak temperature and profiles defined in Tables 4-1. 4.2 and 5-2 whether or not lead free. TS30111 Final Datasheet June 13, 2016 Rev 1.2 www.semtech.com 18 of 21 Semtech TS30111 Version 1.0 DIMENSIONS (13 INCH) ReelREEL Dimensions (13 Inch) Product Specifications Specifications subject to change TS30111 Final Datasheet June 13, 2016 Rev 1.2 Tape Width A (Max.) N (Min.) W1 W2 8mm 330 100 8.4 14.4 12mm 330 100 12.4 18.4 16mm 330 100 16.4 22.4 WWW.TRIUNESYSTEMS.COM 22 www.semtech.com Copyright © 2012, Triune Systems, LLC 19 of 21 Semtech Carrier Tape Specification All DFN and QFN packages will be oriented so that the index package locations will be on the upper right corner of the sprocket side of the carrier tape. All carrier tape used for packing Triune System Components will be specifically formulated to provide protection from physical and electro-static discharge (ESD)damage during shipping and storage. Embossed earner tape must be EIA Standard-481-1 compliant and meet the mechanical characteristics shown in Table 3. Dimensions are in millimeters Pkg type AO BO W DO D1 E1 1.50 +/0.10 1.10 +/0.10 1.75 +/0.10 E2 F 6.25 min 3.5 +/0.05 P1 4 P0 K0 T Wc Tc 4 1.5 0.25 +/0.05 8 0.210.35 2x2mm DFN 2.3 2.3 8.0 +/0.2 3x3mm QFN 3.3 3.3 12 1.50 +/0.10 1.10 +/0.10 3.5 +/0.05 8 8 1.1 4.5 0.210.35 4x4mm QFN 4.35 4.35 12 1.50 +/0.10 1.10 +/0.10 3.5 +/0.05 8 8 1.1 5.4 0.210.35 5x5 QFN 5.25 5.25 12 1.50 +/0.10 1.10 +/0.10 3.5 +/0.05 8 8 1.1 9.2 0.210.35 6x6mm QFN 6.3 +/0.10 6.3 +/0.10 16 +/0.30 1.50 +/0.10 1.50 +/0.10 7.5 +/0.10 12 2 1.1 13.3 0.210.35 TS30111 Final Datasheet June 13, 2016 Rev 1.2 1.75 +/0.10 14.25 www.semtech.com 0.30 +/0.05 20 of 21 Semtech Important Notice Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as a guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time of sale, and all sales are made in accordance with Semtech’s standard terms and conditions of sale. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and trade names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves the right to make changes to, or discontinue any products described in this document without further notice. Semtech makes no warranty, representation or guarantee, express or implied, regarding the suitability of its products for any particular purpose. All rights reserved. © Semtech 2016 Contact Information Semtech Corporation Triune Products 1101 Resource Dr. Suite 121, Plano, Texas 75074 E-mail: [email protected] Phone: (805) 498-2111, Fax: (805) 498-3804 www.semtech.com TS30111 Final Datasheet June 13, 2016 Rev 1.2 21 of 21 Semtech