NTD4965N Power MOSFET 30 V, 68 A, Single N−Channel, DPAK/IPAK Features • • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Three Package Variations for Design Flexibility These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 4.7 mW @ 10 V 30 V 68 A Applications 10 mW @ 4.5 V • CPU Power Delivery • DC−DC Converters D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJA (Note 1) TA = 25°C Value Unit VDSS 30 V VGS ±20 V ID 17.8 A TA = 100°C Power Dissipation RqJA (Note 1) TA = 25°C Continuous Drain Current RqJA (Note 2) TA = 25°C G S N−CHANNEL MOSFET 12.6 PD 2.6 W 4 4 4 TA = 100°C Current Limited by Package TA = 25°C PD 1.39 W TC = 25°C ID 68 A PD 38.5 W TA = 25°C IDM 248 A TA = 25°C IDmaxPkg 76 A TJ, TSTG −55 to +175 °C Source Current (Body Diode) IS 35 A Drain to Source dV/dt dV/dt 6.0 V/ns Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 24 V, VGS = 10 V, IL = 31 Apk, L = 0.1 mH, RG = 25 W) EAS 47 mJ TL 260 °C Lead Temperature for Soldering Purposes (1/8” from case for 10 s) CASE 369AA DPAK (Bent Lead) STYLE 2 2 3 1 2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK) 48 TC = 25°C Operating Junction and Storage Temperature 1 3 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain 4 Drain AYWW 49 65NG tp=10ms 1 2 9.2 TC = 100°C Power Dissipation RqJC (Note 1) A 13.0 AYWW 49 65NG Continuous Drain Current RqJC (Note 1) ID AYWW 49 65NG Steady State Power Dissipation RqJA (Note 2) Pulsed Drain Current Symbol 2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source A Y WW 4965N G = Assembly Location = Year = Work Week = Device Code = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2014 May, 2014 − Rev. 3 1 Publication Order Number: NTD4965N/D NTD4965N THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Case (Drain) Parameter RqJC 3.9 °C/W Junction−to−TAB (Drain) RqJC−TAB 4.3 Junction−to−Ambient – Steady State (Note 3) RqJA 57.6 Junction−to−Ambient – Steady State (Note 4) RqJA 107.6 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 21.5 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 2.5 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) VGS = 10 V gFS 1.8 4.1 VGS = 4.5 V Forward Transconductance 1.5 ID = 30 A 3.4 ID = 15 A 3.4 ID = 30 A 5.4 ID = 15 A 5.3 VDS = 1.5 V, ID = 30 A 52 mV/°C 4.7 10 mW S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 340 Total Gate Charge QG(TOT) 17.2 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) 1710 VGS = 0 V, f = 1.0 MHz, VDS = 15 V 664 pF 2.7 VGS = 4.5 V, VDS = 15 V, ID = 30 A 5.1 nC 8.5 VGS = 10 V, VDS = 15 V, ID = 30 A 28.2 nC SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) 12.1 VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 34.2 18.9 ns 14.2 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils. http://onsemi.com 2 NTD4965N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time td(ON) tr Turn−Off Delay Time Fall Time td(OFF) 8.3 VGS = 10 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 21.5 ns 24.4 7.8 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.86 TJ = 125°C 0.74 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 30 A 1.1 V 28.3 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 13.3 ns 15 QRR 16 nC Source Inductance (Note 7) LS 2.85 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK (Note 7) LD Gate Inductance (Note 7) LG 4.9 Gate Resistance RG 1.0 PACKAGE PARASITIC VALUES TA = 25°C 1.88 2.2 W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils. ORDERING INFORMATION Package Shipping† NTD4965NT4G DPAK (Pb−Free) 2500 / Tape & Reel NTD4965N−1G IPAK (Pb−Free) 75 Units / Rail NTD4965N−35G IPAK Trimmed Lead (Pb−Free) 75 Units / Rail Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 NTD4965N TYPICAL PERFORMANCE CURVES 90 90 10 V thru 4.5 V VGS = 3.7 V 70 3.5 V TJ = 25°C 60 3.3 V 50 40 3.1 V 30 20 2.9 V 10 2 3 4 50 40 20 TJ = 125°C TJ = −55°C 2 3 4 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 8.0 TJ = 25°C 7.5 7.0 6.5 6.0 VGS = 4.5 V 5.5 5.0 4.5 4.0 3.5 VGS = 10 V 3.0 2.5 2.0 10 20 30 40 50 60 70 80 90 ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.8 10000 TJ = 150°C IDSS, LEAKAGE (nA) 1.7 ID = 30 A VGS = 10 V 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 TJ = 125°C 1000 TJ = 85°C 100 0.8 0.7 0.6 −50 5 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 25°C 30 VDS, DRAIN−TO−SOURCE VOLTAGE (V) ID = 30 A TJ = 25°C 3 60 0 1 5 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 70 10 2.7 V 0 0 VDS = 10 V 80 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 80 −25 0 25 50 75 100 125 150 175 10 VGS = 0 V 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTD4965N TYPICAL PERFORMANCE CURVES TJ = 25°C VGS = 0 V 2200 2000 1800 1600 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 2400 Ciss 1400 1200 1000 Coss 800 600 400 Crss 200 0 0 5 10 15 20 25 7 6 5 Qgs 4 Qgd 3 ID = 30 A TJ = 25°C VDD = 15 V VGS = 10 A 2 1 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 30 IS, SOURCE CURRENT (A) VGS = 0 V 100 t, TIME (ns) 8 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDD = 15 V ID = 15 A VGS = 10 V tr td(off) td(on) tf 1 10 15 10 5 0.5 0.6 0.7 0.8 0.9 Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 10 ms 100 ms 1 ms 10 10 ms 0.01 0.01 TJ = 25°C VSD, SOURCE−TO−DRAIN VOLTAGE (V) 100 0.1 TJ = 125°C 20 RG, GATE RESISTANCE (W) 1000 1 25 0 0.4 100 0 V < VGS < 10 V Single Pulse TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 dc 10 100 EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) 10 I D, DRAIN CURRENT (A) QT 9 30 1000 1 10 48 44 40 ID = 31 A 36 32 28 24 20 16 12 8 4 0 25 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 1.0 150 NTD4965N PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A A E b3 c2 B 4 L3 Z D 1 2 H DETAIL A 3 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z L4 b2 e c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− NTD4965N PACKAGE DIMENSIONS 3 IPAK, STRAIGHT LEAD CASE 369AC ISSUE O B V NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. C E R DIM A B C D E F G H J K R V W A SEATING PLANE K W F J G H D 3 PL 0.13 (0.005) W INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 IPAK CASE 369D ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F H D G 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. 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