Analog Devices Welcomes Hittite Microwave Corporation NO CONTENT ON THE ATTACHED DOCUMENT HAS CHANGED www.analog.com www.hittite.com Report Title: Qualification Test Report Report Type: See Attached Date: See Attached Wafer Process: pHEMT-J HMC6484 HMC284A QTR: 2012-00042 Rev: 02 Wafer Process: pHEMT-J QTR: 2012-00042 Rev: 02 Introduction This Reliability test is designed to satisfy the reliability requirements designated by Hittite Microwave Corporation. The testing is devised to simulate exposure to environments the product may experience during assembly, test, and life in the end user application. The pass/fail criteria are dependent upon DC and critical RF parameters determined by the appropriate catalog specifications. The IC Process Reliability Plan for the pHEMT-J process is as follows: IC Process Reliability Wafer Process: pHEMT-J QTR: 2012-00042 Rev: 02 Sample Selection: All devices used were from finished goods and met acceptance test requirements. 160 parts were obtained from stock and divided to perform the following test. IC Process Reliability High Temperature Operating Life (HTOL) - Devices are subjected to 1000 hours of accelerated operating life test at Tj=125°C with a DC bias applied. The supply current (Idd) is periodically monitored. A significant decrease or increase in current indicates a potential device failure. This test is in accordance with JESD22-A108. High Temperature Storage Life (HTSL) - Devices are subjected to 1000 hours at 150oC per JESD22-A103. Wafer Process: pHEMT-J QTR: 2012-00042 Rev: 02 Summary of Results/Conclusions All testing is complete. There were no failures detected. The device meets the requirements for Hittite Reliability Testing. TEST QTY IN QTY OUT PASS/FAIL Initial electrical Test 160 160 Pass HTSL 80 80 Pass Post HTSL - Final Electrical Test 80 80 Pass HTOL 80 80 Pass Post HTOL - Final Electrical test 80 80 Pass NOTES Wafer Process: pHEMT-J QTR: 2012-00042 Rev: 02 FIT / MTTF Calculation Stress conditions: Qty of Parts Tested = 80 Qty of parts out of spec = 0 Stress Die Junction Temp = 125°C Max Use Die Junction Temp = 85°C Activation Energy = 1.6eV Acceleration Factor (AF): , AF=185.5 Calculating the Upper Confidence Bound Failure Rate at 90% CL: , at 90% CL and with 0 units out of spec, λ90% = 155 FIT, or 6.4x106 hours or 735 years.