RT6908

®
RT6908
PMIC for TFT LCD TV Panels
General Description
Features
The RT6908 provides a complete set of programmable
multi-functional power solution for TFT LCD panel. The
RT6908 contains a step-up converter for main power and
step-down controllers to provide the logic voltages for the
system. Moreover, a positive charge pump regulator
provides the adjustable gate-high voltage, VGH; a negative
z
9V to 16V Input Supply Voltage
z
4.4A Boost Regulator for AVDD with 12.7V to 19V
Programmable Output
1-CH Sync. Buck Converter for VI/O
1-CH Sync. Buck Controller for VCORE
Negative Charge Pump Regulator for VGL with
−8.1V to −1.8V Programmable Output
Positive Charge Pump Regulator for VGH with 24.5V
to 40V Programmable Output
Programmable Sequencing
Voltage Detection Output
Over Temperature Protection
I2C Compatible Interface for Register Control
Thin 40-Lead WQFN Package
RoHS Compliant and Halogen Free
charge pump regulator provides the gate-low voltage, VGL.
AVDD, VGH and VGL outputs and power sequence can be
programmable through I2C interface.
With its high current capabilities, the device is ideal for
large screen monitor panels and LCD TV applications with
12V supply voltage. The RT6908 is available in a WQFN40L 5x5 package.
z
z
z
z
z
z
z
z
z
z
Ordering Information
RT6908
Applications
Package Type
QW : WQFN-40L 5x5 (W-Type)
z
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Pin Configurations
TFT LCD TV Panel
LXB1
LXB1
BOOT1
NC
VINB1
AVIN
AGND
VL
EN
EN_I2C
(TOP VIEW)
Note :
Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT6908ZQW : Product Number
RT6908
ZQW
YMDNN
YMDNN : Date Code
40 39 38 37 36 35 34 33 32 31
PGND
FBB1
COMP1
RSTB
SDA
SCL
VDET
AVDD
GD
LXI
1
30
2
29
3
28
4
27
5
6
26
PGND
25
7
8
9
24
41
23
22
10
21
BOOT2
LXB2
DHB2
NC
DLB2
ILIMIT2
FBB2
COMP2
CRST
DRVN
11 12 13 14 15 16 17 18 19 20
COMP
A0
PGND
LX
LX
LX
PGND
VGL
VGH
DRVP
`
WQFN-40L 5x5
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT6908
Typical Application Circuit
L1
6.8µH
VIN
12V
D1
Q1
C1
22µF
C2
10µF
14, 15, 16
LX
C6
1µF
35 AVIN
33 VL
C7
1µF
RT6908
C3
C4
2.2nF
4.7nF
COMP 11
C30
R22 330pF
220k
R1
100k
DRVP 20
L2 10µH
VI/O
3.3V
C13
22µF x
2
C12
100pF
0.1µF
C19
470pF
R3
15k
R5
R6
VL
VIN
VCORE
1.1V
C20
L3
4.7µH
C24
22µF
x3
R14
1.2k
R27
C22
1nF
R11
10k
C23
470pF
R10
20k
0.22µF
M2
R13
1.5
C25
1nF
LXB1
C17
22nF
D4
C16
0.22µF
R9
6.8
R10
6.8
LX
D5
C18
10µF
VGH
35.5V
VGH 19
A0 12
VI/O
R23
24k
C26 10pF
R16
4.7k
SCL 6
SDA 5
4
RSTB
23 COMP2
R25 47k
7
VI/O
RSTB
R19
100k
C27
47nF D6
C28
0.22µF
R20
6.8
R21
6.8
LXB1
D7
VDET
R26
15k
VGL 18
C29
10µF
AGND
34
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
R18
4.7k
SDA
Q3
25 ILIMIT2
R17
4.7k
SCL
DRVN 21
R24 33k
www.richtek.com
2
R7
6.8
26 DLB2
24 FBB2
R12
24k
CRST 22
C15
0.1µF
28 DHB2
29 LXB2
C14
0.22µF
D3
3 COMP1
31 EN_I2C
32 EN
D2
R8
6.8
30 BOOT2
M1
C21
10µF
C10
47nF
38 BOOT1
2 FBB1
R4
120k
VL
AVDD
C9
1µF
Q2
39, 40 LXB1
C11
R2
47k
C5
120µF
10
LXI
9
GD
8
AVDD
36 VINB1
C8
10µF
AVDD
15.6V
VGL
-6V
PGND
1, 13, 17,
41 (Exposed Pad)
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Timing Diagram
VEN
VEN_I2C
12V
or VL
12V
or VL
300µs
VCORE 1.1V
300µs
VI/O 3.3V
VDET
TCRST
VRSTB
2
I C Bus
TCON Program
Control Byte
(Internal Register)
0xFF=0x55
DLY1,DLY2 begins start up
VGL
TDLY1
3ms
TDLY2
Q1 VSG
(VLXI - VGD)
4V
TCGD
AVDD
TSS
TDLY3
VGH
4ms
2
Figure 1. I C Mode Power Sequence (VEN_I2C = 1)
VEN
VEN_I2C
VCORE 1.1V
12V
or VL
0V
300µs
300µs
VI/O 3.3V
VDET
TCRST
VRSTB
2
I C Bus
3ms
VGL
Q1 VSG
(VLXI - VGD)
TDLY1
(Default : 200ms) (Default voltage : -6V)
TDLY2
4V
(Default : 400ms)
TCGD
(Default voltage : 15.6V)
TSS
AVDD
(Default : 2ms)
(Default voltage : 35.5V)
TDLY3
(Default : 10ms)
VGH
4ms
Figure 2. Default Mode Power Sequence (VEN_I2C = 0)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT6908
SDA
tSU, STA
tSU, DAT
tLOW
tHD, STA
tHD, DAT
SCL
tBUF
tSP
tSU, STO
tHIGH
tHD, STA
tR
tF
START
Condition
Repeated Start
Condition
STOP
Condition
START
Condition
Figure 3. I2C Interface Timing Diagram
Functional Pin Description
Pin No.
1, 13, 17,
41(Exposed Pad)
2
Pin Name
3
COMP1
4
RSTB
Pin Function
Power Ground. The exposed pad must be soldered to a large PCB and
connected to PGND for maximum thermal dissipation.
Feedback Input for Buck1 Converter.
Compensation Pin for Buck1 Converter. This pin is the output node of the
error amplifier.
Voltage Detector Open-Drain Output.
5
SDA
I C Compatible Serial Data Input/Output.
6
SCL
I C Compatible Serial Clock Input.
7
VDET
Voltage Detector Input.
8
AVDD
9
GD
10
LXI
11
COMP
Output Sense Pin for Boost Converter AVDD.
Gate Drive. Used to control an external MOSFET switch to provide input to
output isolation of AVDD.
Isolation Switch Input.
Boost Converter (AVDD) Compensation. Connect a compensation network
to ground.
12
A0
14, 15, 16
LX
PGND
FBB1
2
2
2
18
VGL
I C Compatible Device Address Bit 0.
Boost Converter (AVDD) Switch. Connect an inductor between this pin and
input voltage source.
Output Sensing Pin of VGL Negative Charge Pump.
19
VGH
Output Sensing Pin of VGH Positive Charge Pump.
20
DRVP
Base Drive of External PNP Transistor for VGH Positive Charge Pump.
21
DRVN
22
CRST
23
COMP2
Base Drive of External NPN Transistor for VGL Negative Charge Pump.
Voltage Detector Delay Capacitor Connection. Connect capacitor from this
pin to ground.
Compensation Pin for Buck2 Converter.
24
FBB2
25
ILIMIT2
26
DLB2
Feedback Input for Buck2 Converter.
Current Limit Adjustment for Buck2 Converter. Connect a resistor from
ILIMIT2 to AGND to adjust the current limit threshold below 300mV.
Low Side Gate Driver Output for Buck2 Converter.
NC
Not Internal Connected. Should be floating or connected to GND
27, 37
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
4
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Pin No.
Pin Name
Pin Function
High Side Gate Driver Output for Buck2 Converter.
Buck2 Converter Switch node Between High Side MOSFET and Low Side
MOSFET.
N-MOSFET Gate Drive Voltage for Buck2 Converter. Connect a capacitor
from the switch node LXB2 to this pin.
2
2
Enable for I C Control. AVDD, VGL, VGH enabled by I C Control.
28
DHB2
29
LXB2
30
BOOT2
31
EN_I2C
32
EN
33
VL
34
AGND
35
AVIN
36
VINB1
38
BOOT1
39
LXB1
Power Input Voltage Pins for the V I/O Buck Converter.
N-MOSFET Gate Drive Voltage for Buck1. Connect a capacitor from the
switch node LXB1 to this pin.
Buck1 Switch node Between High Side MOSFET and Low Side MOSFET.
40
LXB1
Buck1 Switch node Between High Side MOSFET and Low Side MOSFET.
Chip Enable (Active High). Tie to VL to enable the device.
Internal Logic Regulator Output. Connect this pin with a decoupling
capacitor.
Analog Ground.
Analog Input Voltage of the Device. This is the input for the analog circuits.
Connect this pin with a decoupling capacitor.
Function Block Diagram
LX
AVIN
VL
Internal
Regulator
LXI
GD
AVDD
COMP
BOOST
BOOT1
EN
EN_I2C
VINB1
LXB1
Sequence
Control
Sync.
Buck1
DC/DC
DAC
REG
VGH
Regulator
VL
VGL
Regulator
AGND
VGH
DRVN
VGL
CRST
BOOT2
VL
Sync.
Buck2
COMP2
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
SDA
SCL
A0
DRVP
FBB1
COMP1
DHB2
LXB2
DLB2
FBB2
2
I C
Interface
Voltage
Detector
RSTB
VDET
PGND
ILIMIT2
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
RT6908
Absolute Maximum Ratings
(Note 1)
EN, EN_I2C, AVIN, VINB1, LXI, GD, AVDD, LX, LXB1, LXB2,
BOOT1, BOOT2, DHB2, VDET to PGND ----------------------------------------------------------------------------z SDA, SCL, A0, RSTB, CRST, VL, COMP, COMP1, COMP2, FBB1,
FBB2, ILIMIT2, DLB2, DRVN to PGND -------------------------------------------------------------------------------z BOOT1 to LXB1 ------------------------------------------------------------------------------------------------------------z BOOT2, DHB2 to LXB2 --------------------------------------------------------------------------------------------------z DRVP, VGH to PGND ----------------------------------------------------------------------------------------------------z VGL to PGND --------------------------------------------------------------------------------------------------------------z PGND to AGND ------------------------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C
WQFN-40L 5x5 ------------------------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2)
WQFN-40L 5x5, θJA -------------------------------------------------------------------------------------------------------WQFN-40L 5x5, θJC ------------------------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------z Junction Temperature -----------------------------------------------------------------------------------------------------z Storage Temperature Range --------------------------------------------------------------------------------------------z ESD Susceptibility (Note 3)
HBM (Human Body Model) ----------------------------------------------------------------------------------------------MM (Machine Model) -----------------------------------------------------------------------------------------------------z
Recommended Operating Conditions
z
z
−0.3 to 26V
−0.3 to 6V
−0.3 to 6V
−0.3 to 6V
−0.3 to 44V
−26V to 26V
±0.3V
2.778W
36°C/W
6°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(Typical values VIN = VAVIN = VINB = 12V, VAVDD = 15.6V, VI/O = 3.3V, VCORE = 1.1V, VGH = 35.5V, VGL = −6V, TA = 25°C, unless
otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
9
--
16
V
LX, LXBx Not Switching
--
3.5
--
mA
VIN Rising
--
8.6
9
VIN Falling
7.2
7.6
--
--
5
--
--
5
--
V
--
50
--
ms
--
150
--
°C
--
50
--
°C
Supply Current
Input Voltage Range
VIN
AVIN Quiescent Current
IQIN
Under Voltage Lockout Threshold
VUVLO
VIN Falling Latch Reset
VL Output Voltage
VL
V
Fault Detection
Fault Trigger Duration
Thermal Shutdown Threshold
Temperature Rising
Thermal Shutdown Hysteresis
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
6
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Logic Inputs (SDA, SCL, EN, EN_I2C)
Input High Voltage
VIH
1.7
--
--
V
Input Low Voltage
VIL
--
--
0.6
V
Input Leakage Current
IIH, IIL
−1
0.01
1
μA
--
5
--
pF
--
0.3
--
V
VIN = 0 or 3.3V
Input Capacitance
SDA Output Low Voltage
VOL
I SINK = 6mA
2
I C Timing Characteristics
Serial-Clock Frequency
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
SCL Pulse-Width Low
fSCL
0
--
400
kHz
tBUF
1.3
--
--
μs
tHD, STA
0.6
--
--
μs
tLOW
1.3
--
--
μs
SCL Pulse-Width High
Setup Time for a Repeated
START Condition
Data Hold Time
tHIGH
0.6
--
--
μs
tSU, STA
0.6
--
--
μs
tHD, DAT
0
--
800
ns
Data Setup Time
SDA and SCL Receiving Rise
Time
tSU, DAT
--
--
ns
--
300
ns
SDA and SCL Receiving Fall Time
tF
--
300
ns
SDA Transmitting Fall Time
tF
--
250
ns
Setup Time for STOP Condition
tSU, STO
100
20 +
0.1CB
20 +
0.1CB
20 +
0.1CB
0.6
--
--
μs
Bus Capacitance
CB
--
--
400
pF
Pulse Width of Suppressed Spike
tSP
--
--
50
ns
2.2
--
--
V
--
0.6
--
V
--
100
--
mV
tR
Reset Voltage Detector
Minimum Operating Voltage
AVIN Minimum Voltage for
RSTB
VDET Falling
VDET Detecting Threshold
VTH
VDET Threshold Hysteresis
ΔVTH
RSTB Output Low Voltage
VOL
I SINK = 500μA
--
--
0.3
V
RSTB Leakage Current
ILEAK
VRSTB = 5.0V
--
0.01
0.1
μA
CRST Charge Current
ICRST
--
8
--
μA
CRST Threshold
VCRST
--
1.25
--
V
12.7
--
19
V
15.444
15.6
15.756
V
600
750
900
kHz
--
90
--
%
Boost Converter (AVDD)
Adjustable Output Voltage Range
AVDD Regulation Voltage
(Default)
Oscillator Frequency
VAVDD
Register Address = ”00h”, 6
bits, AVDD = (12.7V to 19V)
[00h to 3Fh]
VAVDD
No load
fOSC
Maximum Duty Cycle
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
7
RT6908
Parameter
Symbol
Test Conditions
N-MOSFET On-Resistance
N-MOSFET Switch Current
Limit
Switch Leakage Current
RDS(ON)
Ileak
VLX = 19V
LXI Over Voltage Protection
VOVP
VLX Rising, Hysteresis = 1V
AVDD Line Regulation
9V ≤ VIN ≤ 16V, IOUT = 1mA
AVDD Load Regulation
Trans-Conductance of Error
Amplifier
1mA ≤ IOUT ≤ 2A
AVDD Fault Trip Level
ILX = 500mA
ILIM
gm
VFT_AVDD
VAVDD Falling
Min
Typ
Max
Unit
--
120
--
mΩ
4.4
5.6
--
A
--
1
10
μA
19.5
20
--
V
--
0.004
--
%/V
--
0.1
--
%/A
--
100
--
μA/V
VAVDD
x 76%
VAVDD
x 80%
VAVDD
x 84%
V
5
6
7
V
Isolation Switch Control
VLXI − VGD
GD Pull Down Voltage
GD Sink Current
IGD
8
12
16
µA
GD Pull Up Resistance
RGD
8
12
16
kΩ
--
200
--
μs
0.788
0.8
0.812
V
400
500
600
kHz
--
180°
--
--
--
86
--
%
--
100
--
μA/V
ILXB1 = 500mA
--
200
--
mΩ
ILXB1 = 500mA
--
150
--
mΩ
--
300
--
μs
0.6144
0.64
0.6656
V
3
3.8
--
A
0.788
0.8
0.812
V
400
500
600
kHz
--
180°
--
--
--
50
--
%
RUG(ON)_DHB2 ILXB2 = 100mA
--
1.8
--
Ω
RLG(ON)_DHB2 ILXB2 = 100mA
--
0.6
--
Ω
RUG(ON)_DLB2 ILXB2 = 100mA
--
2
--
Ω
RLG(ON)_DLB2 ILXB2 = 100mA
--
0.5
--
Ω
TSS_CORE
--
300
--
μs
IAVDDD ≥ ILIMGD / RON, PMOS
Short-Circuit Trigger Duration
Buck1 Controller (VI/O )
FBB1 Regulation Voltage
VFBB1
Oscillator Frequency
Phase Shift Between Buck1
and Buck2
Maximum Duty Cycle
Trans-Conductance of Error
Amplifier
LXB1 to VINB1 N-MOSFET
On-Resistance
LXB1 to PGND N-MOSFET
On-Resistance
Soft-Start Period
fOSC
gm
RDS(ON)
TSS_I/O
FBB1 Fault Trip Level
LXB1 Positive Current Limit
No Load
VFBB1 Falling
ILIM
Buck2 Controller (VCORE)
FBB2 Regulation Voltage
VFBB2
Oscillator Frequency
Phase Shift Between Buck1
and Buck2
Maximum Duty Cycle
BOOT2 to DHB2 P-MOSFET
On-Resistance
DHB2 to LXB2 N-MOSFET
On-Resistance
LXB2 to DLB2 P-MOSFET
On-Resistance
DLB2 to PGND N-MOSFET
On-Resistance
Soft-Start Period
fOSC
No Load
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
8
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
FBB2 Fault Trip Level
VFBB2 Falling
0.6144
0.64
0.6656
V
FBB2 Short Trip Level
VFBB2 Falling
--
0.16
--
V
--
40
--
μA
--
VILIMIT2
/8
--
V
--
2.4
--
V
ILIMIT2 Source Current
Low Side Switch Current
Cycle by Cycle
Limit
Maximum ILIMIT2
Voltage Setting
Negative Charge Pump Controller (VGL)
VGL Adjustable Output
Voltage Range
VGL Regulation Voltage
(Default)
DRVN Sink Current Limit
DRVN Short Circuit
Current
VGL Load Regulation
Error
Soft-Start Period
VGL
Register Address = ”02h”, 6 bits, VGL
= (−1.8V to −8.1V) [00h to 3Fh]
−8.1
--
−1.8
V
VGL
VDRVN = 0.6V, IDRVN = −100μA
−6.3
−6
−5.7
V
--
3.5
5
mA
VGL > −0.5V
--
300
--
μA
VDRVN = 0.6V,
−50μA < IDRVN < −1mA
--
60
--
mV/mA
-VGL
+ 1.5
3
-VGL
+ 2.5
ms
IDRVN,MAX VDRVN = 0.6V
IDRVN,SC
TSS
VGL Fault Trip Level
VGL Rising
VGL Short Trip Level
VGL Rising
VGH Falling
VGH Short Trip Level
VGH Falling
V
−0.5
Positive Charge Pump Controller (VGH)
VGH Adjustable Output
Register Address = ”01h”, 5 bits,
VGH
Voltage Range
VGH = (24.5V to 40V) [00h to 1Fh]
VGH Regulation Voltage
VGH
VDRVP = 15.6V, IDRVP = 100μA
(Default)
DRVP Source Current
IDRVP,MAX VDRVP = 15.6V
Limit
DRVP Short Circuit
IDRVP,SC
VGH < 20%
Current
VGH Load Regulation
VDRVP = 15.6V, 50μA < I DRVP < 1mA
Error
Soft-Start Period
TSS
VGH Fault Trip Level
--
V
24.5
--
40
V
34.79
35.5
36.21
V
--
3.5
5
mA
--
80
--
μA
--
300
--
mV/mA
-VGH
x 70
--
4
VGH
x 75
20
-VGH
x 80
--
ms
%
%
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
RT6908
Typical Operating Characteristics
Buck1 Efficiency vs. Load Current
100
90
90
Efficiency (%)
Efficiency (%)
Boost Efficiency vs. Load Current
100
80
70
60
80
70
60
VIN = 12V, VAVDD = 15.6V
VIN = 12V, VI/O = 3.3V
50
50
0
0.4
0.8
1.2
1.6
2
0
0.4
Load Current (A)
1.2
Buck2 Efficiency vs. Load Current
2
Boost Output Voltage vs. Load Current
17.0
16.5
Output Voltage (V)
90
80
70
60
16.0
15.5
15.0
14.5
VIN = 12V, VAVDD = 15.6V
VIN = 12V, VCORE = 1.1V
50
14.0
0
0.4
0.8
1.2
1.6
0
2
0.5
Load Current (A)
1
1.5
2
Load Current (A)
Buck1 Output Voltage vs. Load Current
Buck2 Output Voltage vs. Load Current
3.9
1.3
3.6
1.2
Output Voltage (V)
Output Voltage (V)
1.6
Load Current (A)
100
Efficiency (%)
0.8
3.3
3.0
2.7
1.1
1.0
0.9
VIN = 12V, VI/O = 3.3V
VIN = 12V, VCORE = 1.1V
2.4
0.8
0
0.5
1
1.5
Load Current (A)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
10
2
0
0.5
1
1.5
2
Load Current (A)
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
VGL Output Voltage vs. Load Current
-3
37
-4
Output Voltage (V)
Output Voltage (V)
VGH Output Voltage vs. Load Current
38
36
35
34
-5
-6
-7
VIN = 12V, VGL = −6V
VIN = 12V, VGH = 35.5V
33
-8
0
15
30
45
60
75
0
15
30
Load Current (mA)
Boost Output Voltage vs. Temperature
75
Buck1 Output Voltage vs. Temperature
3.5
16.5
3.4
Output Voltage (V)
Output Voltage (V)
60
Load Current (mA)
17.0
16.0
15.5
15.0
3.3
3.2
3.1
14.5
VIN = 12V, VI/O = 3.3V
VIN = 12V, VAVDD = 15.6V
14.0
3.0
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
25
50
75
100
125
Temperature (°C)
Buck2 Output Voltage vs. Temperature
VGH Output Voltage vs. Temperature
1.3
38
1.2
37
Output Voltage (V)
Output Voltage (V)
45
1.1
1.0
0.9
36
35
34
VIN = 12V, VCORE = 1.1V
0.8
VIN = 12V, VGH = 35.5V
33
-50
-25
0
25
50
75
100
Temperature (°C)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT6908
VGL Output Voltage vs. Temperature
Power On Sequence 1
-3
VEN
(5V/Div)
Output Voltage (V)
-4
-5
V CORE
(1V/Div)
VI/O
(2V/Div)
VRSTB
(2V/Div)
-6
-7
VIN = 12V, VGL = −6V
VIN = 12V, VCORE = 1.1V, VI/O = 3.3V, C17= 22nF
-8
-50
-25
0
25
50
75
100
Time (1ms/Div)
125
Temperature (°C)
Power On Sequence 2
VAVDD
(10V/Div)
VGH
(20V/Div)
VGL
(5V/Div)
Boost Load Transient Response
VAVDD_ac
(500mV/Div)
IAVDD
(1A/Div)
VRSTB
(2V/Div)
VIN = 12V, VAVDD = 15.6V,
VI/O = 35.5V, VGL = -6V, C17= 22nF
VIN = 12V, VAVDD = 15.6V,
R22 = 220kΩ, C30 = 330pF, C31= 10pF
Time (100ms/Div)
Time (500μs/Div)
Buck1 Load Transient Response
Buck2 Load Transient Response
VI/O_ac
(100mV/Div)
VCORE_ac
(100mV/Div)
I I/O
(1A/Div)
I CORE
(1A/Div)
VIN = 12V, VI/O = 3.3V, R4 = 120kΩ, C19 = 470nF
Time (500μs/Div)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
12
VIN = 12V, VCORE = 1.1V, R23 = 24kΩ,
C25 = 1nF, C26 = 10pF, R14 = 1.2kΩ, C23 = 470pF
Time (500μs/Div)
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Application Information
I2C Command
Slave Address
7
6
5
4
3
2
1
0 = LSB
1
1
0
1
0
0
A0
R/W
Single I2C Register Write Protocol
Stop 1
1
0 A0 0 Slave
ACK
Slave Address
0
1
0
Register Address
Slave D7 D6 D5 D4 D3 D2 D1 D0 Slave Stop
ACK
ACK
Register Address
Slave Re- 1
ACK Start
Single I2C Register Read Protocol
Stop 1
1
0 A0 0 Slave
ACK
Slave Address
0
1
0
1
0 A0 1 Slave
ACK
Slave Address
0
1
0
Stop
D7 D6 D5 D4 D3 D2 D1 D0 Master
NACK
Multiple I2C Register Write Protocol
Stop 1
1
0 A0 0 Slave
ACK
Slave Address
0
1
0
Slave D7 D6 D5 D4 D3 D2 D1 D0 Slave
ACK
ACK
Register Address
D7 D6 D5 D4 D3 D2 D1 D0 Slave
ACK
D7 D6 D5 D4 D3 D2 D1 D0 Slave
ACK Stop
Multiple I2C Register Read Protocol
Stop 1
1
0 A0 0 Slave
ACK
Slave Address
0
1
0
Register Address
Slave Re- 1
ACK Start
D7 D6 D5 D4 D3 D2 D1 D0 Master
ACK
Register Map
Address Name
Description
1
0 A0 1 Slave
ACK
Slave Address
0
1
0
Stop
D7 D6 D5 D4 D3 D2 D1 D0 Master
NACK
Default Value Resolution
Range
00h
AVDD
[5 : 0] Boost
15.6V (1Dh)
0.1V
12.7V to 19V (00h to 3Fh)
01h
VGH
[4 : 0] VGH
35.5V (16h)
0.5V
24.5V to 40V (00h to 1Fh)
02h
VGL
[5 : 0] VGL
−6V (2Ah)
−0.1V
−1.8V to −8.1V (00h to 3Fh)
03h
VIO
[3 : 0] VIO adjustment
0% (07h)
1%
−7% to 7% (00h to 0Eh)
04h
VCORE
[3 : 0] VCORE adjustment
0% (07h)
1%
−7% to 7% (00h to 0Eh)
05h
DLY1
[3 : 0] VGL Delay Time
200ms (01h)
DLYR1
0 to 15 x DLYR1 (00h to 0Fh)
06h
DLY2
[3 : 0] AVDD Delay Time
400ms (02h)
DLYR2
0 to 15 x DLYR2 (00h to 0Fh)
07h
DLY3
[3 : 0] VGH Delay Time
10ms (01h)
DLYR3
0 to 15 x DLYR3 (00h to 0Fh)
08h
DLYR1
[1 : 0] DLY1 Resolution
200ms (02h)
1ms, 10ms, 200ms
09h
DLYR2
[1 : 0] DLY2 Resolution
200ms (02h)
1ms, 10ms, 200ms
0Ah
DLYR3
[1 : 0] DLY3 Resolution
10ms (01h)
1ms, 10ms, 200ms
0Bh
SS
2ms (02h)
1ms
0Ch
ILIMGD
Disable (00h)
50mV
FFh
CTRL
[3 : 0] AVDD Soft-Start Time
[3 : 0] Isolation Switch
Current Limit
[7 : 0] ’’55h’’ Start Power On
Sequence
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
0ms to 15ms (00h to 0Fh)
Disable, 100mV to 800mV
(00h to 0Fh)
00h
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT6908
Output Code Table (unit : V)
Register
AVDD VGH VGL
Code
00h
12.7 24.5 −1.8
VIO VCORE DLY1
DLY2
DLY3 DLYR1 DLYR2
−7%
−7%
0ms
0ms
0ms
1ms
25.0
−1.9
−6%
−6%
1ms
1ms
1ms
01h
12.8
DLYR3
SS
ILIMGD
1ms
1ms
0ms
disable
10ms
10ms
10ms
1ms
100mV
200ms
200ms
200ms
02h
12.9
25.5
−2.0
−5%
−5%
2ms
2ms
2ms
2ms
150mV
03h
13.0
26.0
−2.1
−4%
−4%
3ms
3ms
3ms
3ms
200mV
04h
13.1
26.5
−2.2
−3%
−3%
4ms
4ms
4ms
4ms
250mV
05h
13.2
27.0
−2.3
−2%
−2%
5ms
5ms
5ms
5ms
300mV
06h
13.3
27.5
−2.4
−1%
−1%
6ms
6ms
6ms
6ms
350mV
07h
13.4
28.0
−2.5
0
0
7ms
7ms
7ms
7ms
400mV
08h
13.5
28.5
−2.6
1%
1%
8ms
8ms
8ms
8ms
450mV
09h
13.6
29.0
−2.7
2%
2%
9ms
9ms
9ms
9ms
500mV
0Ah
13.7
29.5
−2.8
3%
3%
10ms
10ms
10ms
10ms 550mV
0Bh
13.8
30.0
−2.9
4%
4%
11ms
11ms
11ms
11ms
0Ch
13.9
30.5
−3.0
5%
5%
12ms
12ms
12ms
12ms 650mV
0Dh
14.0
31.0
−3.1
6%
6%
13ms
13ms
13ms
13ms 700mV
0Eh
14.1
31.5
−3.2
7%
7%
14ms
14ms
14ms
14ms 750mV
0Fh
14.2
32.0
−3.3
15ms
15ms
15ms
15ms 800mV
10h
14.3
32.5
−3.4
11h
14.4
33.0
−3.5
12h
14.5
33.5
−3.6
13h
14.6
34.0
−3.7
14h
14.7
34.5
−3.8
15h
14.8
35.0
−3.9
16h
14.9
35.5
−4.0
17h
15.0
36.0
−4.1
18h
15.1
36.5
−4.2
19h
15.2
37.0
−4.3
1Ah
15.3
37.5
−4.4
1Bh
15.4
38.0
−4.5
1Ch
15.5
38.5
−4.6
1Dh
15.6
39.0
−4.7
1Eh
15.7
39.5
−4.8
1Fh
15.8
40.0
−4.9
20h
15.9
−5.0
21h
16.0
−5.1
22h
16.1
−5.2
23h
16.2
−5.3
24h
16.3
−5.4
25h
16.4
−5.5
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
14
600mV
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Register
AVDD VGH
Code
26h
16.5
VGL
VIO VCORE DLY1
DLY2
DLY3 DLYR1 DLYR2
DLYR3
SS
ILIMGD
−5.6
27h
16.6
−5.7
28h
16.7
−5.8
29h
16.8
−5.9
2Ah
16.9
−6.0
2Bh
17.0
−6.1
2Ch
17.1
−6.2
2Dh
17.2
−6.3
2Eh
17.3
−6.4
2Fh
17.4
−6.5
30h
17.5
−6.6
31h
17.6
−6.7
32h
17.7
−6.8
33h
17.8
−6.9
34h
17.9
−7.0
35h
18.0
−7.1
36h
18.1
−7.2
37h
18.2
−7.3
38h
18.3
−7.4
39h
18.4
−7.5
3Ah
18.5
−7.6
3Bh
18.6
−7.7
3Ch
18.7
−7.8
3Dh
18.8
−7.9
3Eh
18.9
−8.0
3Fh
19.0
−8.1
40h
If register data out of spec, IC will be into default value.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
15
RT6908
The RT6908 is a programmable multi-functional power
solution for TFT LCD panels. The RT6908 contains a stepup converter for main power, a synchronous buck
converter and a synchronous buck controller to provide
the logic voltages for timing controller, voltage detector
for the system. Moreover, a positive charge pump regulator
provides the adjustable gate-high voltage and a negative
charge pump regulator provides the gate low voltage.
Boost Converter
The boost converter is high efficiency PWM architecture.
It performs fast transient responses to generate source
driver supplies for TFT LCD display. The high operation
frequency allows use of smaller components to minimize
the thickness of the LCD panel. The output voltage can be
achieved by setting the I2C register 00h [5:0]. The Boost
minimum gain ratio depends on minimum on time. It
suggested that AVDD higher than 1.14XVIN for better
performance.
Boost Soft-Start
The main boost converter has an internal soft-start function
to reduce the input inrush current. The soft-start time can
be achieved from 0ms to 15ms by setting the I2C register
0Bh [3:0].
Boost Short Circuit Protection
The main boost converter has a short circuit protection.
This function disables the boost converter and isolation
P-MOSFET if the difference voltage between the LXI and
AVDD pin larger than ILIMGD I2C register 0Ch [3:0] setting.
The IC will shut down if this difference voltage remains
above setting value after 200μs. Besides, IC will also shut
down if input voltage below UVLO threshold at AVDD short
circuit period. Only input voltage below 5V (typ.) then repower on and remove fault condition, IC can return to normal
operation.
Boost Under Voltage Fault Protection
The main boost converter has a fault protection. This
function disables the boost converter if AVDD is detected
to be below 80%. The IC will shut down if AVDD remains
below 80% after 50ms.
Boost Inductor Selection
The inductor value depends on the maximum input current.
As a general rule the inductor ripple current is 20% to
40% of maximum input current. If 40% is selected as an
example, the inductor ripple current can be calculated
according to the following equation :
VOUT × IOUT(MAX)
η × VIN
= 0.4 × IIN(MAX)
IIN(MAX) =
Boost Over Voltage Protection
The main boost converter has an over voltage protection
to protect the main switch at the LXI pin. When the LXI
pin voltage rises above 20V, the boost converter turns the
switch off. As soon as the output voltage falls below the
over voltage threshold, the converter will resume operation.
Boost Over Current Protection
The RT6908 senses the inductor current that is flowing
into the LX pin. The internal N-MOSFET will be turned off
if the peak inductor current reaches 5.6A (typ.). Thus, the
output current at the current limit boundary, denoted as
IOUT(LIM), can be calculated according to the following
equation :
V × (VOUT − VIN ) TS ⎞
⎛
V
IOUT(LIM) = η × IN × ⎜ ILIM − 1 × IN
×
VOUT ⎝
2
VOUT
L ⎟⎠
where η is the efficiency of the boost converter, ILIM is the
value of the current limit and TS is the switching period.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
16
IRIPPLE
where η is the efficiency of the boost converter, IIN(MAX) is
the maximum input current and IRIPPLE is the inductor ripple
current. The input peak current can be obtained by adding
the maximum input current with half of the inductor ripple
current as shown in the following equation :
IPEAK = IRIPPLE + IIN(MAX) = 1.2 IIN(MAX)
Note that the saturated current of inductor must be greater
than IPEAK. The inductance can eventually be determined
according to the following equation :
η × ( VIN ) × ( VOUT − VIN )
2
L=
0.4 × ( VOUT ) × I OUT(MAX)×fOSC
2
where fOSC is the switching frequency. For better system
performance, a shielded inductor is preferred to avoid EMI
problems.
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
Boost Diode Selection
The schottky diode is a good choice for any asynchronous
boost converter due to the small forward voltage. However,
when selecting a schottky diode, important parameters
such as power dissipation, reverse voltage rating, and
pulsating peak current must all be taken into
consideration. A suitable schottky diode's reverse voltage
rating must be greater than the maximum output voltage,
and its average current rating must exceed the average
output current.
ΔIL
Input Current
Inductor Current
Output Current
Time
(1-D)TS
Output Ripple
Voltage (ac)
Boost Input Capacitor Selection
Low ESR ceramic capacitors are recommended for input
capacitor applications. Low ESR will effectively reduce
the input ripple voltage caused by the switching operation.
Another consideration is the voltage rating of the input
capacitor, which must be greater than the maximum input
voltage.
Boost Output Capacitor Selection
Output ripple voltage is an important index for estimating
the performance. A 120μF low ESR OS-CAP is sufficient
for most applications. This portion consists of two parts,
one is the product of IIN and ESR of output capacitor, another
part is formed by charging and discharging process of
output capacitor. As shown in Figure 4, ΔVOUT1 can be
evaluated based on the ideal energy equalization.
According to the definition of Q, the Q value can be
calculated as the following equation :
⎡
⎤
Q = 1 × ⎢⎛⎜ IIN + 1 ΔIL − IOUT ⎞⎟ + ⎛⎜ IIN − 1 ΔIL − IOUT ⎞⎟ ⎥
2 ⎣⎝
2
2
⎠ ⎝
⎠⎦
V
× IN × 1 =COUT × ΔVOUT1
VOUT fOSC
Where fOSC is the switching frequency and the ΔIL is the
inductor ripple current. Move COUT to the left side to
estimate the value of ΔVOUT1 as the following equation :
ΔVOUT1 =
D × IOUT
η × COUT × fOSC
Finally, the output ripple voltage can be determined as
following equation :
D × IOUT
ΔVOUT = IIN × ESR+
η × COUT × fOSC
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
Time
ΔVOUT1
Figure 4. The Output Ripple Voltage without the
Contribution of ESR
Boost Loop Compensation
The voltage feedback loop can be compensated with an
external compensation network consisted of R22 and C30.
Choose R22 to set the high frequency integrator gain for
fast transient response. And choose C30 to set the
integrator zero to maintain stability.
VI/O Synchronous Buck Converter
The buck converter is a high efficiency PWM architecture
with 500kHz operation frequency and fast transient
response. The converter drives an internal N-MOSFET,
connected between the VINB1 and LXB1 pin. Connect a
100nF low ESR ceramic capacitor between the BOOT1
pin and LXB1 pin to provide gate driver voltage for the high
side MOSFET.
VI/O Buck Output Voltage Setting
The regulated default output voltage is as shown in the
following equation :
VI/O = VFBB1 × ⎛⎜ 1 + R2 ⎞⎟ , where VFBB1 = 0.8V (typ.)
R3 ⎠
⎝
The recommended value for R2 should be up to 10kΩ
without some sacrificing. To place the resistor divider as
close as possible to the chip can reduce noise sensitivity.
The output voltage also can be adjusted from −7% to 7%
by setting the I2C register 03h [3:0].
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
17
RT6908
VI/O Buck Soft-Start
The step-down converter has an internal soft-start to reduce
the input inrush current. When the buck converter is
enabled, the output voltage rises slowly from zero to the
regulated voltage. The typical soft-start time is around
300μs.
The recommended value for R11 should be up to 10kΩ
without some sacrificing. Place the resistor divider as
close as possible to the chip can reduce noise sensitivity.
The output voltage also can be adjusted from −7% to 7%
by setting the I2C register 04h [3:0].
VCORE Buck Soft-Start
VI/O Buck Over Current Protection
The IC senses the inductor current that is flowing out the
LXB1 pin. The internal MOSFET will be turned off if the
peak inductor current reaches 3.8A (typ.).
VI/O Buck Short Circuit Protection
To limit the short circuit current, the device has a cycleby-cycle current limit. To avoid the short circuit current
from rising above the internal current limit when the output
is shorted to GND, the switching frequency is reduced as
well. The switching frequency is reduced to one-half of
original frequency when the output voltage is below 80%
and to one-fourth of the original frequency when the output
voltage is below 20%. If the “short” is removed, the buck
converter will resume operation. If the voltage remains
below 80% after 50ms, the IC will shut down.
VI/O Buck Loop Compensation
The voltage feedback loop can be compensated with an
external compensation network consisted of the R4 and
C19. Choose R4 to set high frequency integrator gain for
fast transient response. And choose the C19 to set the
integrator zero to maintain stability.
VCORE Synchronous Buck Controller
The synchronous buck controller is a high efficiency PWM
architecture with 500kHz operation frequency and fast
transient response. The controller need external high side
and low side N-MOSFET as synchronous rectifier and does
not required Schottky diode on the LXB2 pin. The high
side MOSFET is connected between VIN and the LXB2
pin, while the low side MOSFET is connected between
the LXB2 pin and GND.
VCORE Buck Output Voltage Setting
The regulated default output voltage as shown in the
following equation :
VCORE = VFBB2 × ⎛⎜ 1 + R11 ⎞⎟ , where VFBB2 = 0.8V (typ.)
R12 ⎠
⎝
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
18
The synchronous buck converter has an internal soft-start
to reduce the input inrush current. When the converter is
enabled, the output voltage rises slowly from zero to the
regulated voltage. The typical soft-start time is around
300μs.
VCORE Buck Over Current Protection
The IC has a cycle-by-cycle low side source current
sensing algorithm that uses the on-resistance of the low
side MOSFET as a current sensing element, so that costly
sense resistors are not required. The DHB2 and DLB2 will
be turned off if the low side MOSFET source current
reaches setting value. Moreover, IC will restart after 50ms
if over current remains 7 cycles. Low side source peak
current limit threshold is 1/8 voltage at the ILIMT2 pin.
Meanwhile, the real current limit value need consider the
on-resistance of the low side MOSFET.
VILIMIT2
ILIM_M2 =
(A)
8 × RON (switch)
when ILIM_M2 is “Low side switch current limit”.
VCORE Buck Short Circuit Protection
To limit the short circuit current, the device has a cycleby-cycle current limit. To avoid the short circuit current
from low side MOSFET source current limit when the
output is shorted to GND, the switching operation will be
stop. The switching operation will stop when the output
voltage is below 20%. If the short is removed, the buck
converter will resume operation. If the voltage remains
below 80% after 50ms, the IC will shut down.
VCORE Buck Loop Compensation
The voltage feedback loop can be compensated with an
external compensation network consisted of R23 and C25
and C26. Choose R23 to set high frequency integrator
gain for fast transient response, C25 and C26 to set the
integrator zero to maintain stability.
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
VCORE Buck External MOSFET Selection
Buck Output Capacitor Selection
The VCORE buck controller drives two external N-MOSFETs
as the switch. There are some considerations to choose
the external MOSFET. It includes MOSFET drain to source
voltage stress, on-resistance, total gate charge
characteristics and power dissipation for thermal
performance.
The selection of COUT is determined by the required ESR
to minimize voltage ripple. Moreover, the amount of bulk
capacitance is also a key for COUT selection to ensure
that the control loop is stable. Loop stability can be
checked by viewing the load transient response as
described in a later section. The output ripple, VOUT, is
determined by :
Buck Inductor Selection
1
⎞
ΔVOUT = ΔIL × ⎛⎜ ESR +
8 × fOSC × COUT ⎟⎠
⎝
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current, ΔIL, will increase with higher
VIN and decrease with higher inductance, as shown in
below equation :
V
V
ΔIL = ⎛⎜ OUT ⎞⎟ × ⎛⎜ 1− OUT ⎞⎟
f
L
VIN ⎠
×
OSC
⎝
⎠ ⎝
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
the highest efficiency operation. However, it requires a
large inductor to achieve this goal. For the ripple current
selection, the value of IL(MAX) = 0.4 is a reasonable starting
point. The largest ripple current occurs at the highest VIN.
To guarantee that the ripple current stays below the
specified maximum, the inductor value should be chosen
according to the following equation :
⎛
⎞ ⎛
VOUT
VOUT ⎞
L= ⎜
× ⎜ 1−
⎟
⎟
f
I
V
×
Δ
L(MAX) ⎠ ⎝
IN(MAX) ⎠
⎝ OSC
Buck Input Capacitor Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high-side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
V
VIN
IRMS = IOUT(MAX) × OUT ×
−1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT / 2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design. For the input capacitor, a 10μF low ESR ceramic
capacitor is recommended.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
The output ripple will be highest at the maximum input
voltage since IL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Suitable
candidates such as dry tantalum, special polymer,
aluminum electrolytic and ceramic capacitors are all
available in surface mount packages. Special polymer
capacitors offer very low ESR value. However, it provides
lower capacitance density than other types. Although
tantalum capacitors have the highest capacitance density,
it is important to only use types that pass the surge test
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR. However, it can
be used in cost-sensitive applications requiring high ripple
current rating and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing. Nevertheless, higher
value, lower cost ceramic capacitors are now becoming
available in smaller case sizes. Their high ripple current,
high voltage rating and low ESR make them ideal for
switching regulator applications. However, care must be
taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input,
VIN, and the power is supplied by a wall adapter through
long wires, a load step at the output can induce ringing at
the input. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
19
RT6908
VGL Negative Regulator
The VGL negative regulator controller provides low level
voltage for gate driver. The linear regulator can provide a
programmable output voltage. The output voltage can be
adjusted by setting the I2C register 02h [5:0]. The VGL
negative regulator controller has a fault protection. This
function can disable the VGL negative regulator controller
when the VGL voltage is detected to be above VGL + 2V.
If the voltage remains above VGL + 2V after 50ms, the IC
will shut down. Moreover, If VGL voltage above −0.5V, the
IDRVN source current will be limited to 300μA for short
circuit protection.
VGH Positive Regulator
The VGH positive regulator controller provides high level
voltage for gate driver. The linear regulator can provide a
programmable output voltage. The output voltage can be
adjusted by setting the I2C register 01h [4:0]. The VGH
positive regulator controller has a fault protection. This
function can disable the VGH regulator controller when
the VGH voltage is detected to be below 75%. If the VGH
voltage remains below 75% after 50ms, the IC will shut
down. Moreover, If VGH voltage remains below 20%, the
IDRVP sink current will be limited to 80μA for short circuit
protection.
Voltage Detector
The voltage detector monitors the VDET voltage to generate
the RSTB pin signal. The RSTB pin will be floating and
pulled high by VI/O if VDET is higher than the detecting
level. Moreover, the detector power on delay can be
determined by connect capacitor to the CRST pin and
ground. The detecting level and delay time can be
determined as the following equations :
The 1V (typ.) hysteresis prevents supply transients from
causing a shutdown. Once the input voltage exceeds the
UVLO rising threshold, start-up begins. When the input
voltage falls below the UVLO falling threshold, all switch
will be turned off and latched. Otherwise, input voltage
need below 5V (typ.), the IC can be reset.
Over Temperature Protection
The RT6908 equips an Over Temperature Protection (OTP)
circuitry to prevent overheating due to excessive power
dissipation. The OTP will shut down switching operation
when junction temperature exceeds 150°C. Once the
junction temperature cools down by approximately 50°C,
the RT6908 will resume operation. To maintain continuous
operation maximum, the junction temperature should be
prevented from rising above 125°C.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Detector delay time = 0.1563 × C17 × 109 (ms)
For recommended operating condition specifications of
the RT6908, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θ JA , is layout dependent. For
WQFN-40L 5x5 package, the thermal resistance, θJA, is
36°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
Under Voltage Lockout Protection
PD(MAX) = (125°C − 25°C) / (36°C/W) = 2.778W for
WQFN-40L 5x5 package
Detect voltage, falling = VDET × ⎛⎜ 1 + R25 ⎞⎟ ,
R26 ⎠
⎝
where VDET =0.6V (typ.)
The UVLO circuit compares the input voltage at the AVIN
pin with the UVLO threshold (8.6V rising, typ.) to ensure
that the input voltage is high enough for reliable operation.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
www.richtek.com
20
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT6908 package, the derating
is a registered trademark of Richtek Technology Corporation.
DS6908-01 March 2013
RT6908
curve in Figure 5 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
Layout Consideration
2.8
For high frequency switching power supplies, the PCB
layout is important to get good regulation, high efficiency
and stability. The following descriptions are the guidelines
for better PCB layout.
2.4
`
For good regulation, place the power components as
close as possible. The traces should be wide and short
enough especially for the high current loop.
`
The compensation circuit should be kept away from
the power loops and be shielded with a ground trace to
prevent any noise coupling.
`
Minimize the size of all LX nodes and keep them wide
and shorter.
`
The exposed pad of the chip should be connected to a
strong ground plane for maximum thermal consideration.
Maximum Power Dissipation (W)1
3.2
Four-Layer PCB
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve for the RT6908 Package
C11
L2
R2
C13
C21
C20
Place the power components
as close as possible.
40 39 38 37 36 35 34 33 32 31
R3
PGND
FBB1
R4
C19
COMP1
RSTB
SDA
The compensation circuit
SCL
should be kept away from the
power loops and should be
VDET
shielded with a ground trace AVDD
AVDD
to prevent any noise coupling.
GD
LXI
AGND C28
C54
1
30
2
29
3
28
4
27
5
26
PGND
6
25
7
24
8
23
41
9
22
10
21
11 12 13 14 15 16 17 18 19 20
R38
COMP
A0
PGND
LX
LX
LX
PGND
VGL
VGH
DRVP
C12
VIN
LXB1
LXB1
BOOT1
NC
VINB1
AVIN
AGND
VL
EN
EN_I2C
VI/O
AGND
Separate power ground (PGND) and analog ground
(AGND). Connect the AGND and the PGND islands
at a single end. Make sure that there are no other
connections between these separate ground planes.
VIN
VIN
AGND
Place the power components as close as
possible. The traces should be wide and
short especially for the high current loop.
D1
Q1
AVDD
L1
C2
C1
PGND
VCORE
M1
L3
M2
C24
PGND
R11
R12
R23
AGND
C25
The compensation circuit should be
kept away from the power loops and
should be shielded with a ground
C26
trace to prevent any noise coupling.
The exposed pad of the chip
should be connected to ground
plane for thermal consideration.
Place the power components as
close as possible. The traces should
be wide and short especially for the
high-current loop.
VIN
C5
BOOT2
LXB2
DHB2
NC
DLB2
ILIMIT2
FBB2
COMP2
CRST
DRVN
VIN
The power ground (PGND) consists of input and output
capacitor grounds, the components's ground of charge
pump. The PGND should be wide and short enough to
connect to a ground plane.
Figure 6. PCB Layout Guide
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS6908-01 March 2013
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
21
RT6908
Outline Dimension
D
SEE DETAIL A
D2
L
1
E2
E
e
b
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.150
0.250
0.006
0.010
D
4.950
5.050
0.195
0.199
D2
3.250
3.500
0.128
0.138
E
4.950
5.050
0.195
0.199
E2
3.250
3.500
0.128
0.138
e
L
0.400
0.350
0.016
0.450
0.014
0.018
W-Type 40L QFN 5x5 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
22
DS6908-01 March 2013