RT5002

RT5002
7 + 1 Channel DC/DC PMU with Li-Ion Battery Charger for
DSC
General Description
Features
The RT5002 is a complete power supply solution for digital
still cameras and other handheld devices. It includes a
7+1 channel DC/DC power converter unit, a single-cell Liion battery charger, and an I2C control interface.
Power Converter Unit :
One Channel LV Sync Step-Up and Three Channel
LV Sync Step-Down
Up to 95% Efficiency
One Sync Step-Up and One Async Inverting for
CCD±
± bias
One WLED Driver in either Sync Step-Up or Current
Source Operation
WLED Driver with Dimming Control
Step-Up Mode with LED Open Protection (OVP7)
One Low Quiescent LDO with Reverse Leakage
Prevention for RTC Power Supply
Preset On/Off Sequence of CH1, CH2, CH3, CH4
(1 → 3 → 4 → 2)
Two Preset On/Off Sequence of CH5, CH6 (5 → 6 or
6 → 5)
All Power Switches Integrated with Internal
Compensation
All Step-Up Converters with Load Disconnect
Wake Up Impulse to Monitor BAT and VIN Plug-In
Charger Unit :
28V Maximum Rating for VIN Power
Selectable Power Current Limit (0.1A / 0.5A / 1.5A)
Auto Power Path Management (APPM) and
Integrated Power MOSFETs
Battery Charging Current Control
Battery Regulation Voltage Control
Programmable Charging Current and Safe Charge
Timer
Under Voltage and Over Voltage Protection
Optimized Charge Rate via Thermal Feedback
Interrupt Indicator to Fault/Status Events
I2C Control Interface : Support Fast Mode up to
400kb/s
Voltage Divider for Sensing Battery Voltage Level
Small 40-Lead WQFN Package
RoHS Compliant and Halogen Free
The power converter unit includes one synchronous stepup converter and three synchronous step-down converters
for DSP core, I/O, Motor, and memory power supply, one
synchronous high voltage step-up converter and one
asynchronous inverting converter for CCD± bias, one
WLED driver in either synchronous high voltage step-up
or current source operation, and one low quiescent LDO
for RTC application. All converters are internally frequency
compensated and integrate power MOSFETs. The power
converter unit provides complete protection functions: over
current, thermal shutdown, over voltage, over-load, and
under voltage protection.
The battery charger includes Auto Power Path
Management (APPM). No external MOSFETs are required.
The charger enters sleep mode when power is removed.
Charging tasks are optimized by using a control algorithm
to vary the charge rate, including pre-charge mode, fast
charge mode and constant voltage mode. The charge
current can also be programmed with an external resistor
and modified via the I2C control interface. The scope that
the battery regulation voltage can be modified via the I2C
interface depends on the battery temperature. The internal
thermal feedback circuitry regulates the die temperature
to optimize the charge rate for all ambient temperatures.
The charging task will always be terminated in constant
voltage mode when the charging current reduces to the
termination current of 10% x ICHG_FAST. The charger
includes under voltage and over-voltage protection for the
supply input voltage, VIN.
Applications
DSC
DS5002-00
November 2011
www.richtek.com
1
RT5002
Ordering Information
Pin Configurations
(TOP VIEW)
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Note :
Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
LX1
PVD1
RTCPWR
VIN
SYS
SYS
BAT
BAT
PVD2
LX2
RT5002
40 39 38 37 36 35 34 33 32 31
INT
FB1
VDDM
FB7
PVD7
LX7
BATS
LX4
PVD4
FB4
1
30
2
29
3
28
27
4
5
26
GND
6
25
7
24
8
41
23
22
9
21
10
WAKE
FB2
TSSEL
LX5
PVD5
FB5
EN1234
LX3
PVD3
FB3
Marking Information
RT5002ZQW : Product Number
RT5002
ZQW
YMDNN
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2
YMDNN : Date Code
ISETA
TS
VP
SDA
SCL
PVD6
LX6
VOUT6
FB6
VREF
11 12 13 14 15 16 17 18 19 20
WQFN-40L 5x5
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November 2011
RT5002
Typical Application Circuit
For 4-LED Application
L5 10µH
SYS
CCD
15V
27
C14
4.7µF
R9
287k
L1
2.2µH
PVD5
PVD1 39
C1
10µF x 2
C13
10µF x 2
16
SYS
C15
10µF
L6 10µH
FB5
PVD2 32
PVD6
LX2
17
LX6
FB2
C3
10µF
L2
31 2.2µH
C4
10µF
29
18
C17
1nF
PVD3
19
C18
0.1µF
R12
10k
20
5
C19
1µF
D2
D3
SYS
L7
10µH
6
C20
1µF
D4
VOUT6
R11
63.4k
D5
4
R13
10
TSSEL = VIN
for 10k NTC
ADAPTER
/USB
28
C21
2.2µF
RISETA
FB3
R16
LX7
PVD4 9
FB4
RTCPWR
11 ISETA
BATS
DS5002-00
November 2011
L4
2.2µH
R7
232k
10
C7
33pF
1.8V
C6
10µF
SYS
C11
47pF
VCORE
C10 1V
10µF
R8
931k
C9
10µF
38
SYS
RTCPWR
VDDM 3
Bypass Cap
1µF
2
VDD_I C
R14
1k
VP
SCL 15
1 INT
SDA 14
30 WAKE
CBATS
0.1µF
C8
10µF
TS
Interrupt Flag
Wake Up Signal to µP
SYS
Super Cap
13
C23
0.1µF
R5
470k
FB7
BAT
R3
470k
R6
374k
LX4 8
TSSEL
VI/O
3.3V
DDRII
21
R17
VI/O
3.3V
L3
2.2µH
SYS 35, 36
12
R18 10k
C5
10µF
PVD7
RNTC
~10k
LX3 23
VREF
C22
1µF
+
22
37 VIN
33, 34
BAT
FB6
SYS
R4
150k
D1
Back Light
Motor
5V
R2
88.7k
25
C16
10µF x 2
C24
4.7pF
R1
470k
FB1 2
R10
26.1k
CCD
-7V
SYS
C2
10µF
RT5002
26
C12
27pF
LX1 40
LX5
7 BATS
EN1234
GND
24
R15
1k
EN1234 Control
Chip Enable CH1 CH3 CH4
5V
1.8V 1V
CH2
3.3V
41 (Exposed Pad)
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RT5002
For 1-LED Application
L5 10µH
SYS
CCD
15V
27
C14
4.7µF
R9
287k
LX5
L1
2.2µH
PVD5
C13
10µF x 2
PVD1 39
C1
10µF x 2
16
SYS
FB5
LX2
17
D1
C17
1nF
18
LX6
R12
10k
20
5
C19
1µF
6
FB6
VREF
R13 TSSEL = GND
10
for 100k NTC
ADAPTER
/USB
28
C21
2.2µF
RISETA
RNTC
~100k
LX3 23
FB3
LX4 8
TSSEL
R5
470k
C8
10µF
L4
2.2µH
FB4
R7
232k
10
SYS 35, 36
BAT
SYS
C7
33pF
C6
10µF
DDRII
1.8V
SYS
C11
47pF
C10
10µF
VCORE
1V
R8
931k
C9
10µF
11 ISETA
12
R18 10k
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4
R3
470k
38
SYS
RTCPWR
Super Cap
13
BATS
L3
2.2µH
FB7
RTCPWR
R16
C23
Interrupt Flag
0.1µF
Wake Up Signal to µP
VI/O
3.3V
R6
374k
VDDM 3
2
VDD_I C
R14
1k
VP
SCL 15
1 INT
SDA 14
30 WAKE
CBATS
0.1µF
Bypass Cap
1µF
TS
R17
VI/O
3.3V
C5
10µF
21
LX7
C22
1µF
+
22
PVD4 9
37 VIN
33, 34
BAT
29
PVD7
Back Light
4
C4
10µF
VOUT6
PVD3
19
5V
FB2
5V
C3
10µF
L2
31 2.2µH
R4
150k
R11
63.4k
C18
0.1µF
PVD2 32
PVD6
C15
10µF
L6
10µH
D6
Motor
5V
R2
88.7k
25
C16
10µF x 2
C24
4.7pF
R1
470k
FB1 2
R10
26.1k
CCD
-7V
SYS
C2
10µF
RT5002
26
C12
27pF
LX1 40
EN1234
7 BATS
GND
24
R15
1k
EN1234 Control
Chip Enable CH1 CH3 CH4
5V
1.8V 1V
CH2
3.3V
41 (Exposed Pad)
DS5002-00
November 2011
RT5002
Functional Pin Description
Pin No.
Pin Name
Pin Function
Interrupt Indicator Open Drain Output. If any toggle events of TS_FAULT, PGOOD,
2
1
INT
EOC, or SAFE happen, the output INT goes low. After I C register bank address
0x2 is read or power on reset, INT goes high.
2
FB1
Feedback Input of CH1.
3
VDDM
4
FB7
5
PVD7
IC Analog Power Pin.
Feedback Input of CH7 in Step-Up Mode or Current Sink Pin of CH7 in Current
Source Mode.
Power Output of CH7
6
LX7
7
BATS
8
LX4
Switch Node of CH7 in Step-Up Mode.
Output pin of voltage divider for battery voltage level sensing enabled after CH2
soft-start end. BATS voltage is about 60% of BAT.
Switch Node of CH4.
9
PVD4
Power Input of CH4.
10
FB4
Feedback Input of CH4.
11
ISETA
12
TS
13
VP
Charge Current Set Input. Connect a resistor (R ISETA) between ISETA and GND.
Temperature Sense Input. The TS pin connects to a battery’s thermistor to
determine whether the battery is too hot or too cold to be charged. If the battery’s
temperature is out of range, charging is paused until it re-enters the valid range.
TS also detects whether the battery (with NTC) is present or not.
Power Output of 3.3V Buffer for Battery Temperature Sensing.
14
SDA
Data Signal Pin of I C Interface.
15
SCL
Clock Signal Pin of I C Interface.
16
PVD6
Power Input of CH6.
17
LX6
Switch Node of CH6.
18
VOUT6
Sense Input of CH6 Inverting Output Node.
19
FB6
Feedback Input of CH6.
20
VREF
1.8V Reference Output.
21
FB3
Feedback Input of CH3.
22
23
PVD3
LX3
Power Input of CH3.
Switch Node of CH3.
24
EN1234
Enable Pin of CH1, CH2, CH3, and CH4.
25
26
FB5
PVD5
Feedback Input of CH5.
Power Output of CH5.
27
LX5
28
TSSEL
Switch Node of CH5.
Input Pin to Select Temperature Sensing Thresholds. Thresholds of TSSEL = H are
60% and 38% of VP voltage. Thresholds of TSSEL = L are 74% and 28% of VP
voltage.
29
FB2
Feedback Input of CH2.
30
WAKE
Wake-Up Impulse Push-Pull Output. If VIN or BAT plug in, WAKE pin generates
one 55ms width high pulse to notify micro processor.
31
LX2
Switch Node of CH2.
32
PVD2
Power Input of CH2.
2
2
To be continued
DS5002-00
November 2011
www.richtek.com
5
RT5002
Pin No.
Pin Name
Pin Function
33, 34
BAT
35, 36
SYS
37
VIN
Battery Charge Current Output.
System Connect Pin. Connect this pin to system with a minimum 10μF ceramic
capacitor to GND.
Supply Voltage Input.
38
RTCPWR
RTC Power Output.
39
PVD1
Power Output of CH1.
40
LX1
Switch Node of CH1.
41
GND
(Exposed Pad)
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6
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum thermal dissipation.
DS5002-00
November 2011
RT5002
Function Block Diagram
VDDM
EN1234
SCL
SDA
SYS
Power On/Off Sequence
Control
UVLO
SS
2
I C Interface Register File
VDDI
PVD1
VDDM
UVLO
PVD5
VDDM
Body
Diode
Control
SYS
Body
Diode
Control
CH1
C-Mode
Step-Up
LX1
CH5
C-Mode
Step-Up
LX5
+
FB5
1.25V
REF
FB1
PVD2
VDDM
PVD6
CH2
C-Mode
Step-Down
CH6
Async
Inverting
LX6
VOUT6
FB6
0.6V REF
LX2
+
EN56
+
FB2
0.8V
REF
VDDM
PVD7
VDDM
SYS
Body
Diode
Control
PVD3
CH7
Step-Up or
Current Source
+
31 Level Dimming
CH3
C-Mode
Step-Down
+
-
LX7
EN7
+
VREF
MOD7
ENCH
VIN
USUS
SYS
VSET
Li+ Battery
Charger with
APPM
PVD4
EN7_DIM7
TSSEL
TS
FB3
0.8V
REF
VDDM
1.8V
REF
BAT
LX3
-
FB7
VREF
0.8V
REF
VDDM
EN56
+
SYS
CH4
C-Mode
Step-Down
LX4
ISETL
-
ISETU
+
ISET
VP
ISETA
TIMER
BATS
SAFE
VDDI
RTC_LDO
w / Body Diode Control
FB4
0.8V
REF
GND
RTCPWR
EOC
INT
Interrupt Handler
TS_FAULT VIN
PGOOD
BAT
Power Plug-In
Wake Up Detector
WAKE
SAFE
DS5002-00
November 2011
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RT5002
Charger Function Block Diagram
VIN
SYS
Thermal
Circuit
BAT
Control
Circuit
ssend2
ISETA
ISET
VSET
ISETL
BATS
Sleep
Mode
CC/CV/TR
/DPPM
Multi Loop
Controller
Current
Set block
INT
USUS
OVP
UVLO
ENCH
Logic
PGOOD
TS_FAULT
EOC
SAFE
2
I C Bank
ISETU
JEITA
2
I C Bank
TS
VP
TSSEL
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8
NoBAT
2
I C Bank
Timer
2
I C Bank
GND
DS5002-00
November 2011
RT5002
Absolute Maximum Ratings
(Note 1)
Battery Input Voltage, BAT --------------------------------------------------------------------------- −0.3V to 6V
Supply Voltage, VDDM -------------------------------------------------------------------------------- −0.3V to 6V
Supply Input Voltage, VIN ---------------------------------------------------------------------------- −0.3V to 28V
BATS, INT ------------------------------------------------------------------------------------------------ −0.3V to 28V
Other Pins ------------------------------------------------------------------------------------------------ −0.3V to 6V
Power Switch (DC) :
VOUT6 ---------------------------------------------------------------------------------------------------- −10V to 0.3V
LX1, LX2, LX3, LX4 ------------------------------------------------------------------------------------- −0.3V to 6V
PVD5, LX5 ------------------------------------------------------------------------------------------------ −0.3V to 24V
PVD7, LX7 ------------------------------------------------------------------------------------------------ −0.3V to 17V
LX6 --------------------------------------------------------------------------------------------------------- (PVD6 − 16V) to (PVD6 + 0.3V)
INT Continuous Current ------------------------------------------------------------------------------- 20mA
BAT Continuous Current (total in two pins) (Note 2) ----------------------------------------- 2.5A
Power Dissipation, PD @ TA = 25°C
WQFN-40L 5x5 ----------------------------------------------------------------------------------------- 2.778W
Package Thermal Resistance (Note 3)
WQFN-40L 5x5, θJA ------------------------------------------------------------------------------------ 36°C/W
WQFN-40L 5x5, θJC ----------------------------------------------------------------------------------- 7°C/W
Junction Temperature ---------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------ 260°C
Storage Temperature Range ------------------------------------------------------------------------- −65°C to 125°C
ESD Susceptibility (Note 4)
HBM (Human Body Mode) --------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 5)
Supply Voltage, VDDM -------------------------------------------------------------------------------- 2.7V to 5.5V
Supply Input Voltage, VIN (ISETL = 1) ------------------------------------------------------------ 4.4V to 6V
Supply Input Voltage, VIN (ISETL = 0) ------------------------------------------------------------ 4.5V to 6V
Junction Temperature Range ------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
Power Converter Unit : (VDDM = 4.2V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
1.5
--
--
V
SYS UVLO (Hysteresis Low)
--
1.3
--
V
SYS UVLO Hysteresis (Gap)
--
0.2
--
V
Supply Voltage
SYS Startup Voltage for PMU
VST
To be continued
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November 2011
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9
RT5002
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
5.82
6.0
6.18
V
--
−0.25
--
V
VDDM UVLO (Hysteresis High)
2.2
2.4
2.6
V
VDDM UVLO Hysteresis (Gap)
--
0.3
--
V
VDDM Over Voltage Protection
(OVP) (Hysteresis High)
VDDM OVP Hysteresis (Gap)
Supply Current
IOFF
All Channels are Off,
VEN1234 = 0V, VBAT = 4.2V
--
10
20
μA
IQ1
No Switching, VEN1234 = 3.3V
--
--
800
μA
IQ2
No Switching, VEN1234 = 3.3V
--
--
800
μA
IQ3
No Switching, VEN1234 = 3.3V
--
--
800
μA
IQ4
No Switching, VEN1234 = 3.3V
--
--
800
μA
IQ5
Non Switching, EN56 = 1
--
--
800
μA
IQ6
No Switching, EN56 = 1
--
--
800
μA
--
--
800
μA
--
--
800
μA
1800
2000
2200
kHz
CH7 in Step-Up Mode
900
1000
1100
kHz
CH1 Maximum Duty Cycle (Step-Up)
CH2 Maximum Duty Cycle
(Step-Down)
CH3 Maximum Duty Cycle
(Step-Down)
CH4 Maximum Duty Cycle
(Step-Down)
CH5 Maximum Duty Cycle (Step-Up)
VFB1 = 0.75V
80
83
86
%
VFB2 = 0.75V
--
--
100
%
VFB3 = 0.75V
--
--
100
%
VFB4 = 0.75V
--
--
100
%
VFB5 = 1.15V
91
93
97
%
CH6 Maximum Duty Cycle (Inverting)
VFB6 = 0.7V
91
93
97
%
CH7 Maximum Duty Cycle (Step-Up)
VFB7 = 0.15V
91
93
97
%
0.788
0.8
0.812
V
1.237
1.25
1.263
V
0.58
0.6
0.62
V
0.237
0.25
0.263
V
Shutdown Supply Current
CH1 (Sync-Step-Up) Supply Current
into VDDM
CH2 (Syn-Step-Down) Supply
Current into VDDM
CH3 (Syn-Step-Down)
Supply Current into VDDM
CH4 (Syn-Step-Down)
Supply Current into VDDM
CH5 (Syn-Step-Up)
Supply Current into VDDM
CH6 (Inverting)
Supply Current into VDDM
CH7 (WLED) in Step-Up Mode
Supply Current into VDDM
CH7 (WLED) in Current Source
mode Supply Current into VDDM
Oscillator
IQ7b
IQ7c
CH1, 2, 3, 4 Operation Frequency
fOSC
CH5, 6, 7 Operation Frequency
fOSC2
No Switching, EN7_DIM7 [4:0]
= 31, MOD7 = 1
EN7_DIM7 [4:0] = 31,
MOD7 = 0
Feedback, Output Regulation Voltage, and Output Regulation Current
Feedback Regulation Voltage @
FB1, FB2, FB3, FB4
Feedback Regulation Voltage @ FB5
Feedback Regulation Voltage @ FB6
(Inverting)
Feedback Regulation Voltage @ FB7
(Step-Up mode and current source
EN7_DIM7 [4:0] = 31
mode)
To be continued
www.richtek.com
10
DS5002-00
November 2011
RT5002
Parameter
Reference
VREF Output Voltage
(VREF-FB6) Regulation Voltage
VREF Load Regulation
Symbol
Test Conditions
Min
Typ
Max
Unit
1.77
1.182
--
1.8
1.2
--
1.83
1.218
10
V
V
mV
P-MOSFET, VPVD1 = 3.3V
N-MOSFET, VPVD1 = 3.3V
---
200
150
300
250
mΩ
P-MOSFET, VPVD2 = 3.3V
2.2
--
3
200
4
300
-1.4
150
1.8
250
2.2
--1.2
300
300
1.6
400
400
2
300
300
1.6
1.1
400
400
2
1.5
VREF
0μA < IREF < 200μA
Power Switch
CH1 On Resistance of MOSFET
CH1 Current Limitation (Step-Up)
CH2 On Resistance of MOSFET
N-MOSFET, VPVD2 = 3.3V
CH2 Current Limitation (Step-Down)
CH3 On Resistance of MOSFET
P-MOSFET, VPVD3 = 3.3V
N-MOSFET, VPVD3 = 3.3V
CH3 Current Limitation (Step-Down)
mΩ
A
mΩ
A
CH4 Current Limitation (Step-Down)
CH5 On Resistance of P-MOSFET
VPVD5 = 16V
--1.2
--
CH5 On Resistance of N-MOSFET
CH5 Current Limitation (Step-Up)
CH6 On Resistance of MOSFET
VDDM = 3.3V
N-MOSFET
P-MOSFET, VPVD6 = 3.3V
-0.9
--
0.6
1.2
0.5
0.8
1.6
0.7
Ω
A
Ω
CH6 Current Limitation (Inverting)
CH7 On Resistance of P-MOSFET
P-MOSFET
VPVD7 = 10V
1
--
1.5
2.0
2
3.0
A
Ω
CH7 On Resistance of N-MOSFET
CH7 Current Limitation (Step-Up)
VDDM = 3.3V
N-MOSFET
-0.6
0.9
0.8
1.1
1
Ω
A
5.82
20
6.0
22
6.18
24
V
V
--
−13
--
V
14.2
15
16
V
--
VSYS
−0.8V
--
V
0.35
0.4
0.45
V
0.5
0.6
0.7
V
1.1
1.2
1.3
V
0.65
0.7
0.75
V
1.05
1.1
1.15
V
0.69
0.74
0.79
V
--
100
--
ms
CH4 On Resistance of MOSFET
P-MOSFET, VPVD4 = 3.3V
N-MOSFET, VPVD4 = 3.3V
A
Protection
Over Voltage Protection of PVD1
Over Voltage Protection of PVD5
Over Voltage Protection of VOUT6
Over Voltage Protection of PVD7
(Step-Up mode)
CH1 Step-Up Under Voltage
Protection of PVD1
CH1/2/3/4 Under Voltage Protection
CH5 Under Voltage Protection
CH6 Under Voltage Protection
CH1/2/3/4 Overload Protection
CH5 Overload Protection
CH6 Overload Protection
Protection Fault Delay
At VFBx < 0.4V after soft-start
ends
At VFB5 < 0.6V after soft-start
ends
At VFB6 > 1.2V after soft-start end
At VFBx < 0.72V after fault delay
(100ms)
At VFB5 < 1.1V after fault delay
(100ms)
At VFB6 > 0.74V after fault delay
(100ms)
mΩ
A
Ω
To be continued
DS5002-00
November 2011
www.richtek.com
11
RT5002
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
1.3
--
--
---
-1
0.4
6
μA
---
155
20
---
°C
°C
-3.23
60
3
3.3
130
6
3.37
200
μA
V
mA
mV
Control
EN1234, TSSEL Input Logic-High
Voltage Threshold
Logic-Low
EN1234, TSSEL Sink Current
Thermal Protection
Thermal Shutdown
Thermal Shutdown Hysteresis
RTC LDO
TSD
ΔTSD
Standby Current
VOUT (RTCPWR)
Max Output Current (Current Limit)
VDDM = 4.2V
I OUT = 0mA, VDDM = 4.2V
VDDM = 4.2V
Dropout Voltage
I OUT = 50mA
I OUT = 10mA
---
---
1000
150
I OUT = 3mA
--
--
60
--
55
--
V
WAKE Up Detector
WAKE Impulse High Duration
VIN or BAT plug in,
RTCPWR = 3.3V
Source Current 0.5mA,
VWAKE_H
RTCPWR = 3.3V
Sink Current −0.5mA,
VWAKE_L
RTCPWR = 3.3
t WAKEUP
High Level
WAKE Output
Low Level
VIN Threshold to Wake Up
BAT Threshold to Wake Up
BAT Threshold Hysteresis to Wake
Up
RTCPWR
RTCPWR
− 0.3
--
ms
V
0
0.3
--
3.1
--
3.3
2.7
3.5
--
V
V
--
150
--
mV
Charger Unit : (VIN = 5V, VBAT = 4V, TA = 25°C, unless otherwise specified)
Parameter
Supply Input
VIN Under Voltage Lockout
Threshold
VIN Under Voltage Lockout
Hysteresis
VIN Supply Current
Symbol
Test Conditions
Min
Typ
Max
Unit
VUVLO
VIN = 0V to 4V
3.1
3.3
3.5
V
ΔVUVLO
VIN = 4V to 0V
--
240
--
mV
ISYS = IBAT = 0mA, ENCH = 0
(VBAT > VREGx )
--
1
2
ISYS = IBAT = 0mA, ENCH = 1
(VBAT > VREGx )
--
0.8
1.5
---
195
200
300
300
μA
mV
10
50
--
mV
4.3
4.4
4.5
V
4.16
4.2
4.23
V
4.01
4.05
4.08
V
I SUPPLY
VIN Suspend Current
VIN − BAT VOS Rising
I USUS
VOS_H
VIN − BAT VOS Falling
Voltage Regulation
VOS_L
System Regulation Voltage
VSYS
Battery Regulation Voltage
VREG1
Battery Regulation Voltage
VREG2
VIN = 5V, USUS = 1
ISYS = 800mA
0 to 85°C, Loading = 20mA,
when VSET = 1
0 to 85°C, Loading = 20mA,
when VSET = 0
mA
To be continued
www.richtek.com
12
DS5002-00
November 2011
RT5002
Parameter
APPM Regulation Voltage
Symbol
ΔVAPPM
Test Conditions
VSYS − VAPPM
Min
120
Typ
200
Max
280
Unit
mV
DPM Regulation Voltage
VIN to SYS MOSFET
On-Resistance
BAT to SYS MOSFET
On-Resistance
Re-Charge Threshold
VDPM
ISETL = 0
4.3
4.4
4.5
V
IVIN = 1000mA
--
0.2
0.35
Ω
VBAT = 4.2V, ISYS = 1A
--
0.05
0.1
Ω
ΔVREGCHG Battery Regulation − Recharge Level
60
100
140
mV
58.3
59.8
61.3
%
--
2
--
V
100
--
1200
mA
570
600
630
mA
285
1.2
450
90
300
1.5
475
95
315
1.8
500
100
mA
A
2.7
2.8
2.9
V
--
200
--
mV
VBAT = 2V
5
10
15
%
ISETL = 0, ISETU = 1
ISETL = 1, ISETU = X
5
10
15
%
ISETL = 0, ISETU = 0
--
3.3
--
%
IINT = 5mA
--
200
--
mV
TREG
--
125
--
°C
TSD
--
155
--
°C
-6.25
20
6.5
-6.75
°C
V
BATS Divider Ratio
Current Regulation
ISETA Set Voltage
VISETA
(Fast Charge Phase)
Charge Current Setting Range ICHG
Charge Current Accuracy1
ICHG1
Charge Current Accuracy2
ICHG2
VIN Current Limit
IVIN
Pre-Charge
BAT Pre-Charge Threshold
BAT Pre-Charge Threshold
Hysteresis
Pre-Charge Current
VPRECH
VBAT = 4.2V
VBAT = 4V, RISETA = 1kΩ
VBAT = 4V, RISETA = 1kΩ
ISET = 1
VBAT = 3.8V, RISETA = 1kΩ, ISET = 0
ISETL = 1 (1.5A Mode)
ISETL = 0, ISETU = 1 (500mA Mode)
ISETL = 0, ISETU = 0 (100mA Mode)
BAT Falling
ΔVPRECH
ICHG_PRE
Charge Termination Detection
Termination Current Ratio to
Fast Charge (Except USB 100 ITERM
Mode)
Termination Current Ratio to
I
Fast Charge (USB100 Mode) TERM2
mA
Login Input/Output
INT Pull Down Voltage
Protection
Thermal Regulation
Thermal Shutdown
Temperature
Thermal Shutdown Hysteresis
Over Voltage Protection
Over Voltage Protection
Hysteresis
Output Short Circuit Detection
Threshold
Battery Installation Detection
Threshold at TS
Time
VINT
ΔTSD
VOVP
VIN Rising
ΔVOVP
VIN = 7V to 5V, VOVP − ΔVOVP
--
100
--
mV
VSHORT
VBAT − VSYS
--
300
--
mV
EN1234 = H
--
90
--
% of
VP
1800
2250
2700
s
Pre-Charge Fault Time
tPCHG
TIMER [3:0] = 0100, (1/8 x t FCHG)
Fast Charge Fault Time
tFCHG
TIMER [3:0] = 0100
14400 18000 21600
s
To be continued
DS5002-00
November 2011
www.richtek.com
13
RT5002
Parameter
Min
Typ
Max
Unit
--
1
--
s
tOVP
--
50
--
μs
tPF
--
25
--
ms
tFP
--
25
--
ms
Termination Deglitch Time
tTERMI
--
25
--
ms
Recharge Deglitch Time
tRECHG
--
100
--
ms
tNO_IN
--
25
--
ms
tTS
--
25
--
ms
tSHORT
--
250
--
μs
Short Circuit Recovery Time
Other
tSHORT-R
--
64
--
ms
VP Regulation Voltage
VVP
VDDM = 4.2V
3.234
3.3
3.366
V
VP Load Regulation
VP Under Voltage Lockout
Threshold
TS Battery Detect Threshold
VVP
VP Source Out 2mA
--
--
-0.1
V
Falling Threshold
--
0.8
--
V
2.75
2.85
2.95
V
73
74
75
59
60
61
--
1
--
27
28
29
37
38
39
--
1
--
63
64
65
53
54
55
--
1
--
34
35
36
39
40
41
--
1
--
PGOOD Deglitch Time
Input Over Voltage Blanking
Time
Pre-Charge to Fast-Charge
Deglitch Time
Fast-Charge to Pre-Charge
Deglitch Time
Input Power Loss to SYS LDO
Turn-Off Delay Time
Pack Temperature Fault
Detection Deglitch Time
Short Circuit Deglitch Time
Symbol
tPGOOD
Test Conditions
Time measured from VIN :
0 to 5V 1μs rise-time to
2
PGOOD = 1 in I C Register
VTS
NTC
Low Temperature Trip Point
(0°C)
VCOLD
Low Temperature Trip Point
Hysteresis (near 0°C)
ΔVCOLD
High Temperature Trip Point
(60°C)
VHOT
High Temperature Trip Point
Hysteresis (near 60°C)
ΔVHOT
Low Temperature Trip Point
(10°C) for JEITA
Rising Threshold when
TSSEL = L (100k NTC)
Rising Threshold when
TSSEL = H (10k NTC)
Falling Threshold when
TSSEL = L
Falling Threshold when
TSSEL = H
Rising Threshold when
TSSEL = L (100k NTC)
Rising Threshold when
TSSEL = H (10k NTC)
Low Temperature Trip Point
Hysteresis (near 10°C) for JEITA
High Temperature Trip Point
(45°C) for JEITA
High Temperature Trip Point
Hysteresis (near 45°C) for JEITA
www.richtek.com
14
Falling Threshold when
TSSEL = L
Falling Threshold when
TSSEL = H
DS5002-00
%
of VP
%
of VP
%
of VP
%
of VP
%
of VP
%
of VP
%
of VP
%
of VP
November 2011
RT5002
(VDDM = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Logic-High
2.0
--
--
Logic-Low
--
--
0.8
--
--
400
kHz
tHD;STA
0.6
--
--
μs
tLOW
1.3
--
--
μs
Logic Inputs (SDA SCL)
SDA, SCL Input
Threshold Voltage
V
2
I C Timing Characteristics
SCL Clock Rate
Hold Time (Repeated) START
Condition. After this period, the
first clock pulse is generated
LOW Period of SCL Clock
fSCL
VDDM = 3.3V
HIGH Period of SCL Clock
tHIGH
Set-up Time for Repeated START tSU;STA
Condition
Data Hold Time
tHD;DAT
0.6
--
--
μs
0.6
--
--
μs
0
--
0.9
μs
Data Set-up Time
tSU;DAT
100
--
--
ns
Set-up Time for STOP Condition
Bus Free Time between a STOP
and START Condition
Rise Time of both SDA and SCL
Signals
Fall Time of both SDA and SCL
Signals
SDA and SCL Output Low Sink
Current
tSU;STO
0.6
--
--
μs
tBUF
1.3
--
--
μs
tR
20
--
300
ns
tF
20
--
300
ns
2
--
--
mA
IOL
SDA or SCL Voltage = 0.4V
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Guaranteed by design.
Note 3. θJA is measured in natural convection at TA = 25° C on a high-effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 4. Devices are ESD sensitive. Handling precaution is recommended.
Note 5. The device is not guaranteed to function outside its operating conditions.
DS5002-00
November 2011
www.richtek.com
15
RT5002
Typical Operating Characteristics
CH2 Step-Down Efficiency vs. Output Current
CH1 Step-Up Efficiency vs. Output Current
100
100
90
90
Efficiency (%)
80
70
60
50
=
=
=
=
=
=
=
2.7V
3V
3.3V
3.6V
3.9V
4.2V
4.4V
80
Efficiency (%)
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
40
30
70
VSYS
VSYS
VSYS
VSYS
VSYS
60
50
10
40
30
10
VOUT = 5V, COUT = 10μF x 2, L = 2.2μH
VOUT = 3.3V, COUT = 10μF, L = 2.2μH
0
0
10
100
10
1000
100
1000
Output Current (mA)
Output Current (mA)
CH3 Step-Down Efficiency vs. Output Current
CH4 Step-Down Efficiency vs. Output Current
100
100
90
90
80
80
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
70
60
50
40
=
=
=
=
=
=
=
2.7V
3V
3.3V
3.6V
3.9V
4.2V
4.4V
Efficiency (%)
Efficiency (%)
3.4V
3.7V
3.9V
4.2V
4.4V
20
20
30
20
70
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
60
50
40
30
=
=
=
=
=
=
=
2.7V
3V
3.3V
3.6V
3.9V
4.2V
4.4V
20
10
10
VOUT = 1.8V, COUT = 10μF, L = 2.2μH
0
VOUT = 1V, COUT = 10μF, L = 2.2μH
0
10
100
1000
10
Output Current (mA)
100
90
90
80
80
60
50
40
30
Efficiency (%)
70
=
=
=
=
=
=
=
1000
CH6 Inverting Efficiency vs. Output Current
100
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
100
Output Current (mA)
CH5 Step-Up Efficiency vs. Output Current
Efficiency (%)
=
=
=
=
=
2.7V
3V
3.3V
3.6V
3.9V
4.2V
4.4V
20
70
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
60
50
40
30
=
=
=
=
=
=
=
2.7V
3V
3.3V
3.6V
3.9V
4.2V
4.4V
20
10
VOUT = 15V, COUT = 10μF x 2, L = 10μH
0
10
VOUT = −7V, COUT = 10μF x 2, L = 10μH
0
1
10
Output Current (mA)
www.richtek.com
16
100
1
10
100
Output Current (mA)
DS5002-00
November 2011
RT5002
CH7 Efficiency vs. Input Voltage
CH1 Step-Up Output Voltage vs. Output Current
100
5.20
90
5.15
Output Voltage (V)
Efficiency (%)
80
70
60
50
40
30
20
5.10
5.05
VSYS = 3.4V
VSYS = 4.4V
5.00
4.95
10
4WLEDs, IOUT = 25mA, COUT = 1μF
VOUT = 5V
0
4.90
2.7
2.9
3.1
3.3
3.5
3.7
3.9
4.1
4.3
4.5
0
100
Input Voltage (V)
400
1.825
3.33
1.820
3.32
VSYS = 3.6V
VSYS = 5V
3.30
3.29
1.815
VSYS = 4.4V
VSYS = 3.4V
VSYS = 2.7V
1.810
1.805
VOUT = 3.3V
VOUT = 1.8V
1.795
0
100
200
300
400
500
600
0
100
Load Current (mA)
300
400
500
600
CH5 Step-Up Output Voltage vs. Output Current
15.4
1.015
15.3
Output Voltage (V)
1.020
1.010
1.005
VSYS = 4.4V
VSYS = 3.4V
VSYS = 2.7V
1.000
200
Load Current (mA)
CH4 Step-Down Output Voltage vs. Output Current
Output Voltage (V)
600
1.800
3.28
0.995
15.2
15.1
VSYS = 3.4V
VSYS = 4.4V
15.0
14.9
VOUT = 1V
0.990
VOUT = 15V
14.8
0
100
200
300
400
Load Current (mA)
DS5002-00
500
CH3 Step-Down Output Voltage vs. Output Current
3.34
Output Voltage (V)
Output Voltage (V)
300
Load Current (mA)
CH2 Step-Down Output Voltage vs. Output Current
3.31
200
November 2011
500
600
0
20
40
60
80
100
Load Current (mA)
www.richtek.com
17
RT5002
Power On
CH6 Inverting Output Voltage vs. Output Current
-7.12
VOUT_CH1
(5V/Div)
Output Voltage (V)
-7.14
-7.16
VOUT_CH2
(2V/Div)
VSYS = 4.4V
VSYS = 3.4V
VSYS = 2.7V
-7.18
-7.20
VOUT_CH3
(2V/Div)
-7.22
VOUT_CH4
(2V/Div)
VOUT = −7V
-7.24
0
20
40
60
80
VBAT = 3.7V
Time (2.5ms/Div)
100
Load Current (mA)
Power Off
Power On
VOUT_CH1
(5V/Div)
VOUT_CH5
(10V/Div)
VOUT_CH2
(2V/Div)
VOUT_CH6
(5V/Div)
VOUT_CH3
(2V/Div)
VOUT_CH4
(2V/Div)
VBAT = 3.7V, SEQ56 = 1
VBAT = 3.7V
Time (1ms/Div)
Time (5ms/Div)
Power Off
Power On
VOUT_CH5
(10V/Div)
VOUT_CH5
(10V/Div)
VOUT_CH6
(5V/Div)
VOUT_CH6
(5V/Div)
VBAT = 3.7V, SEQ56 = 1
Time (2.5ms/Div)
www.richtek.com
18
VBAT = 3.7V, SEQ56 = 0
Time (5ms/Div)
DS5002-00
November 2011
RT5002
Power Off
VOUT_CH5
(10V/Div)
CH1 Output Voltage Ripple
LX1
(2V/Div)
VOUT_CH6
(5V/Div)
VOUT_CH1_ac
(10mV/Div)
VBAT = 3.7V, VOUT = 5V
IOUT = 400mA, COUT = 10μF x 2, L = 2.2μH
VBAT = 3.7V, SEQ56 = 0
Time (5ms/Div)
Time (500ns/Div)
CH2 Output Voltage Ripple
CH3 Output Voltage Ripple
LX2
(2V/Div)
LX3
(2V/Div)
VOUT_CH2_ac
(5mV/Div)
VOUT_CH3_ac
(5mV/Div)
VBAT = 3.7V, VOUT = 3.3V
IOUT = 400mA, COUT = 10μF, L = 2.2μH
VBAT = 3.7V, VOUT = 1.8V
IOUT = 400mA, COUT = 10μF, L = 2.2μH
Time (500ns/Div)
Time (500ns/Div)
CH4 Output Voltage Ripple
CH5 Output Voltage Ripple
LX4
(2V/Div)
LX5
(5V/Div)
VOUT_CH4_ac
(5mV/Div)
VOUT_CH5_ac
(10mV/Div)
VBAT = 3.7V, VOUT = 1V
IOUT = 400mA, COUT = 10μF, L = 2.2μH
Time (500ns/Div)
DS5002-00
November 2011
VBAT = 3.7V, VOUT = 15V
IOUT = 30mA, COUT = 10μF x 2, L = 10μH
Time (1μs/Div)
www.richtek.com
19
RT5002
CH1 Load Transient Response
CH6 Output Voltage Ripple
LX6
(5V/Div)
IOUT
(100mA/Div)
VOUT_CH6_ac
(10mV/Div)
V OUT_CH1_ac
(100mV/Div)
VBAT = 3.7V, VOUT = −7V
IOUT = 50mA, COUT = 10μF x 2, L = 10μH
VBAT = 3.7V, VOUT = 5V
IOUT = 0A to 300mA, COUT = 10μF x 2, L = 2.2μH
Time (1μs/Div)
Time (250μs/Div)
CH2 Load Transient Response
CH3 Load Transient Response
IOUT
(100mA/Div)
IOUT
(100mA/Div)
V OUT_CH2_ac
(50mV/Div)
V OUT_CH3_ac
(10mV/Div)
VBAT = 3.7V, VOUT = 3.3V
IOUT = 0A to 300mA, COUT = 10μF, L = 2.2μH
VBAT = 3.7V, VOUT = 3.3V
IOUT = 100mA to 300mA, COUT = 10μF, L = 2.2μH
Time (250μs/Div)
Time (250μs/Div)
CH4 Load Transient Response
CH5 Load Transient Response
IOUT
(100mA/Div)
IOUT
(20mA/Div)
V OUT_CH4_ac
(10mV/Div)
V OUT_CH5_ac
(50mV/Div)
VBAT = 3.7V, VOUT = 1V
IOUT = 100mA to 300mA, COUT = 10μF, L = 2.2μH
Time (250μs/Div)
www.richtek.com
20
VBAT = 3.7V, VOUT = 15V
IOUT = 10mA to 30mA, COUT = 10μF X 2, L = 10μH
Time (250μs/Div)
DS5002-00
November 2011
RT5002
Charger On/Off Control from ENCH
CH6 Load Transient Response
VBAT = 3.7V, VOUT = −7V, IOUT = 15mA to 50mA
COUT = 10μF x 2, L = 10μH
I2CEN
(5V/Div)
IOUT
(20mA/Div)
VBAT
(5V/Div)
V OUT_CH6_ac
(10mV/Div)
IBAT
(500mA/Div)
VVP = 3.3V
USB 500mA Mode, VIN = 5V, VBAT = Real Battery
Time (250μs/Div)
Time (25ms/Div)
Charger On/Off Control from VIN
TS Inserted / Removed
VIN
(5V/Div)
VBAT
(5V/Div)
VBAT
(5V/Div)
VTS
(2V/Div)
IBAT
(500mA/Div)
IBAT
(500mA/Div)
VVP = 3.3V
USB 500mA Mode, VIN = 5V, VBAT = Real Battery
IBAT
(1A/Div)
Time (500ms/Div)
Time (500ms/Div)
VIN Removal
VIN Hot-Plug with NTC/without Battery
VIN = 5V, VBAT = Real Battery, VVP = 3.3V
RSYS = 10Ω, ISETL = 1
I IN
(500mA/Div)
V SYS
(5V/Div)
V SYS
(5V/Div)
VBAT
(10V/Div)
VBAT
(10V/Div)
VIN
(10V/Div)
VIN
(10V/Div)
VIN = 5V, VVP = 3.3V, RSYS = 10Ω, ISETL = 0
Time (100ms/Div)
DS5002-00
VIN = 5V, VBAT = Real Battery, VVP = 3.3V
November 2011
Time (100ms/Div)
www.richtek.com
21
RT5002
VIN Hot-Plug without NTC/Battery
VIN Hot-Plug with Battery
I IN
(500mA/Div)
IBAT
(1A/Div)
V SYS
(5V/Div)
V SYS
(5V/Div)
VBAT
(10V/Div)
VBAT
(10V/Div)
VIN
(10V/Div)
VIN
(10V/Div)
VIN = 5V, VVP = 3.3V
VBAT = Real Battery, RSYS = 10Ω, ISETL = 1
VIN = 5V, VVP = 3.3V, RSYS = 10Ω, ISETL = 0
Time (100ms/Div)
Time (100ms/Div)
VIN Over Voltage Protection
Battery Regulation Voltage vs. Temperature
IBAT
(1A/Div)
VIN
(10V/Div)
V SYS
(10V/Div)
VBAT
(10V/Div)
VIN = 5V to 15V
VBAT = Real Battery, RSYS = 10Ω, ISETL = 1
Battery Regulation Voltage (V)
4.300
4.275
4.250
4.225
4.200
4.175
4.150
4.125
VIN = 5V, ISYS = 0.5A
4.100
Time (500ms/Div)
-50
-25
0
25
50
75
100
125
Temperature (°C)
OVP Threshold Voltage vs. Temperature
VIN - VSYS Dropout Voltage vs. Temperature
450
6.55
420
Dropout Voltage (mV)
OVP Threshold Voltage (V)
6.60
Rising
6.50
6.45
Falling
6.40
6.35
6.30
6.25
VIN = 5V, VBAT = 3.7V
6.20
390
360
330
300
270
240
VIN = 5V, ISYS = 1A
210
-50
-25
0
25
50
Temperature (°C)
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22
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
DS5002-00
November 2011
RT5002
Charge Current vs. Temperature
90
500
85
450
Charge Current (mA)
Dropout Voltage (mV)
VBAT - VSYS Dropout Voltage vs. Temperature
80
75
70
65
60
55
400
350
300
250
200
150
100
VBAT = 3.7V, VVP = 3.3V
USB 500mA Mode, VIN = 5V
50
VBAT = 3.7V, ISYS = 1A
50
0
-50
-25
0
25
50
75
100
125
-50
-25
Temperature (°C)
25
50
75
100
125
Temperature (°C)
Battery Regulation Voltage vs. Temperature
Pre-Charge Current vs. Battery Voltage
4.300
130.0
4.275
127.5
Pre-Charge Current (mA)
Battery Regulation Voltage (V)
0
4.250
4.225
4.200
4.175
4.150
4.125
125.0
122.5
120.0
117.5
115.0
112.5
VIN = 5V, RISEAT = 0.5kΩ
VIN = 5V
4.100
110.0
-50
-25
0
25
50
75
100
125
Temperature (°C)
2
2.2
2.4
2.6
2.8
3
Battery Voltage (V)
Fast-Charge Current vs. Battery Voltage
Fast-Charge Current (mA)
700
675
650
625
600
575
550
525
VIN = 5V, RISEAT = 1kΩ
500
3
3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9
4
4.1
Battery Voltage (V)
DS5002-00
November 2011
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23
RT5002
Application Information
Power Converter Unit
The RT5002 is an integrated power system for digital still
cameras and other small handheld devices. It includes
six DC/DC converters as well as one WLED driver, one
RTC LDO, and a fully integrated single-cell Li-ion battery
charger ideal for portable applications.
CH1 : Step-up synchronous current mode DC/DC converter
with internal power MOSFETs and compensation network.
The P-MOSFET body can be controlled to disconnect the
load. It is suitable for providing power to the motor.
CH2 to CH4 : Step-down synchronous current mode DC/
DC converter with internal power MOSFETs and
compensation network. These channels supply the power
for I/O, DRAM, and core. They can be operated at 100%
maximum duty cycle to extend battery operating voltage
range. When the input voltage is close to the output
voltage, the converter enters low dropout mode with low
output ripple.
CH5 : High voltage step-up synchronous current mode
DC/DC converter with internal power MOSFET and
compensation network. The P-MOSFET body can be
controlled to disconnect the load. This channel supplies
the CCD+ bias.
CH6 : Asynchronous inverting current mode DC/DC
converter with internal power MOSFET and compensation
network. An external Schottky diode is required. This
channel supplies the CCD− bias.
CH7 : WLED driver operating in either current source mode
or synchronous step-up mode with internal power
MOSFET and compensation network. The operation mode
is determined via the I2C interface. The P-MOSFET body
in step-up mode can be controlled to disconnect the load.
Output Voltage Design Equation of CH1 to CH4 :
The output voltage can be set by the following equation :
VOUT = (1 + RH / RL) x VFB
where VFB is 0.8V typically, RH is R1, R3, R5, and R7
respectively for CH1 to 4, and RL is R2, R4, R6, and R8
respectively for CH1 to 4.
Output Voltage Design Equation of CH5 :
The output voltage can be set by the following equation :
VOUT_CH5 = (1 + R9 / R10) x VFB5
where VFB5 is 1.25V typically.
Output Voltage Design Equation of CH6 :
The output voltage can be set by the following equation :
VOUT_CH6 = −(R11 / R12) x (1.2V) + 0.6V
where R11 and R12 are the feedback resistors connected
to FB6, 1.2V equals to (VREF − VFB6), and 0.6V is the
typical value of VFB6.
Reference Voltage
The RT5002 provides a precise 1.8V reference voltage,
VREF, with sourcing capability of 100μA. Connect a 0.1μF
ceramic capacitor from the VREF pin to GND. Reference
voltage is enabled by I 2C register bit EN56 = 1.
Furthermore, this reference voltage is internally pulled to
GND at shutdown.
CH5 and CH6 Power Sequence :
CH5 and CH6 are enabled together via I2C interface and
their power on sequence can be chosen via I2C register
setting.
CH1 to CH4 operate in PWM mode with 2MHz, while
CH5 to CH7 operate in PWM mode with 1MHz switching
frequency.
RTC_LDO : 3.3V output LDO with low quiescent current
and reverse leakage prevention from output node.
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DS5002-00
November 2011
RT5002
SEQ56 = 1
EN56
10ms
Wait until VOUT6 > -0.12V
Constant Current Pre-Charge.
CH5 VOUT
18ms
5ms
CH6 VOUT
SEQ56 = 0
EN56
16ms
10ms
Constant
Current PreCharge.
CH5 VOUT
2ms
5ms
Wait until VOUT5 < 0.5V
CH6 VOUT
CH7 : WLED Driver
CH7 is a WLED driver that can operate in either current
source mode or synchronous step-up mode, as determined
by the I2C interface. When CH7 works in current source
mode, it sources an LED current out of LX7 pin and
regulates the current by FB7 voltage. The LED current is
defined by the FB7 voltage as well as the external resistor
b[7]
(MSB)
b[6]
b[5]
Meaning
MOD7
SEQ56
EN56
Default
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
Address
0x0
MOD7
SEQ56
EN56
between FB7 and GND. The FB7 regulation voltage can
be set in 31 steps from 8mV to 250mV, typically, via I2C
interface. If CH7 works in synchronous step-up mode, it
integrates synchronous step-up mode with an internal
MOSFET and internal compensation to output a voltage
up to 15V. The LED current is also set via an external
resistor and FB7 regulation voltage.
b[4]
b[3]
b[1]
b[0]
(LSB)
0
0
0
R/W
R/W
R/W
b[2]
EN7_DIM7 [4:0]
1
CH7 in step-up mode
0
CH7 in current source mode
1
CH5/6 power on sequence is CH5
CH6, power off sequence is CH6
CH5
0
CH5/6 power on sequence is CH6
CH5, power off sequence is CH5
CH6
1
Enable (turn on) CH5 and CH6 by preset sequence
0
Disable (turn off) CH5 and CH6 by preset
Enable CH7 and define FB7 regulation voltage
00000
Ch7 turn off
EN7_DIM7
00001 to
[4:0]
Ch7 turn on and dimming ratio : VFB7 = EN7_DIM7 [4:0] / 31 x 0.25V
11111
DS5002-00
November 2011
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25
RT5002
CH7 WLED Current Dimming Control
CH1 to CH4 Power off Sequence is :
If CH7 is in synchronous step-up mode or current source
mode, the WLED current is set by an external resistor.
Regardless of the mode, dimming is always controlled
by the I2C interface.
When EN1234 goes low, CH2 will turn off first and internally
discharge output. When FB2 < 0.1V, CH4 will turn off and
also internally discharge output via the LX4 pin. When
FB4 < 0.1V, CH3 will turn off and internally discharge output
via the LX3 pin. Likewise, when FB3 < 0.1V, CH1 will turn
off and discharge output. After FB1 < 0.1V, CH1 to 4
shutdown sequence will be completed.
The WLED current can be set by the following equations :
ILED (mA) = [250mV / R (W)] x EN7_DIM7 [4:0] / 31
where R is the current sense resistor from FB7 to GND
and EN7_DIM7 [4:0] / 31 ratio refers to the I2C control
register file. It is recommended that CH7 input power
connects to the node SYS in order to prevent abnormal
CH7 start-up.
Charger Unit
The RT5002 includes a Li-ion battery charger with
Automatic Power Path Management. The charger is
designed to operate in below modes :
VDDM Bootstrap
Pre-Charge Mode
To support bootstrap function, the RT5002 includes a
power selection circuit which selects between SYS and
PVD1 to create the internal node voltage VDDI and VDDM.
When the output voltage is lower than 2.8V, the charging
current will be reduced to a fast-charge current ratio set
by RISETA to protect the battery life-time.
VDDM is the power of the RT5002 PMU control circuits
which must be connected to an external decoupling
capacitor by way of the VDDM pin. VDDI is the power
input of the RTC LDO. The output PVD1 of CH1 can
bootstrap VDDM and VDDI. The RT5002 includes UVLO
circuits to monitor VDDM and SYS voltage status.
RTC LDO
The RT5002 provides a 3.3V output LDO for real-time clock.
The LDO features low quiescent current (3µA) and high
output voltage accuracy. This LDO is always on, even when
the system is shut down. For better stability, it is
recommended to connect a 0.1µF capacitor to the
RTCPWR pin. The RTC LDO includes pass transistor body
diode control to avoid the RTCPWR node from backcharging into the input node VDDI.
Fast-charge Mode
When the output voltage is higher than 3V, the charging
current will be equal to the fast-charge current set by
RISETA.
Constant Voltage Mode
When the output voltage is near 4.2V and the charging
current falls below the termination current, after a deglitch
time check of 25ms, the charger will become disabled.
Re-charge Mode
When the chip is in charge termination mode, the charging
current gradually goes down to zero. However, once the
voltage of the battery drops to below 4.1V, there will be a
deglitch time of 100ms and then the charging current will
resume again.
Power On/Off Sequence for CH1 to CH4
EN1234 will turn on/off CH1 to CH4 in preset sequence.
CH1 to CH4 Power on Sequence is :
When EN1234 goes high, CH1 will turn on first. 3.5ms
after CH1 is turned on, CH3 will turn on. 3.5ms after CH3
is turned on, CH4 will turn on. 3.5ms after CH4 is turned
on, CH2 will turn on.
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26
DS5002-00
November 2011
RT5002
I2C Register for Charging Status Setting
b[7]
(MSB)
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
Meaning
ISETU
ISETL
USUS
NoBAT
EOC
PGOOD
TS_FAULT
Default
1
0
0
0
0
0
0
SAFE
0
Read/Write
R/W
R/W
R/W
R
R
R
R
R
Address
0x2
b[0]
(LSB)
ISETU and ISETL : Set VIN Input Current Limit
ISETU
ISETL
VIN Input Current Limit
0
1
0
0
95mA
475mA
X
1
1.5A
USUS : VIN Suspend Control Input
1
Suspend
USUS
0
No Suspend
Battery Installation Detection
1
No Battery Installed (TS > 90% of VP)
NoBAT
0
BAT Installed (TS < 90% of VP)
End_Of_Charge Status
EOC
1
Charging Done or Recharging after Termination
0
During Charging
VIN Power Good Status
PGOOD
0
VIN < VU VLO
0
1
VUVLO < VIN < V BAT + VOS_H
VBAT + VOS_ H < VIN < VOVP
0
VIN > VOVP
Temperature Sensing Status
TS_FAULT
1
0
TS is at fault (too cold, too hot) or VP triggers UVLO.
TS and VP are normal.
Charger Safety Timer Status
SAFE
DS5002-00
1
Safety timer expired.
0
Otherwise
November 2011
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27
RT5002
Interrupt Indicator
Battery Installation Detection
The RT5002 provides the interrupt indicator output pin (INT).
INT is an open drain pin.
RT5002 also detect TS voltage to judge the battery
installation status. If PMU is enabled but TS voltage >
90% of VP node voltage, RT5002 would set the bit NoBAT
= 1 in I2C register bank 0x2.
When the status bits (PGOOD, TS_FAULT, EOC, SAFE)
of I2C register address 0x2 toggle, the INT is set to be
low. After Reg 0x2 is read or PMU turn off, INT goes high.
End_Of_Charge (EOC) Status
The bit EOC in I2C register bank 0x2 can show the EOC
status. If EOC = 1, the Charger is in EOC State.
Wake-Up Detector
Wake-Up Detector detects VIN or BAT plug-in events. Once
one of them plug-in, WAKE pin asserts one 55ms-width
high pulse. The timing diagram is shown below.
Suspend Mode
Set USUS = 1, and the charge will enter Suspend Mode.
In Suspend Mode, IUSUS (MAX) < 300µA.
WAKE Timing Diagram
Battery Sense
3.3V
VIN
When PMU is turned on, BATS = 59.8% x BAT, The
RT5002 detects the battery level from BATS voltage level.
2.7V
BAT
WAKE
55ms
55ms
VOUT2
4 ±0.4ms
BATS
Charge State
Charger State
Bit EOC
0
Bit PGOOD
1
Bit SAFE
0
Charging Suspended by Thermal Loop
0
1
0
Safety Timers Expired
0
1
1
Charging Done
1
1
0
Recharging after Termination
1
1
0
IC Disabled or no Valid Input Power
0
0
0
Charging
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DS5002-00
November 2011
RT5002
b[7]
(MSB)
Address
0x1
Meaning
Default
Read/Write
0
R/W
b[6]
b[5]
TIMER [3:0]
1
0
R/W
R/W
b[4]
b[3]
b[2]
b[1]
0
R/W
ENCH
0
R/W
JEITA
0
R/W
ISET
0
R/W
b[0]
(LSB)
VSET
0
R/W
VIN Power Good Status
TIMER [3:0]
ENCH
JEITA
0000 to
1111
Fast Charge timeout period : tFCHG = (TIMER [3:0] + 1) hours. (ISET = 1)
Pre-Charge timeout period : tPCHG = tFCHG / 8
1
Disable charger
0
Enable charger
1
Charger operation controlled by I C bits VSET and ISET
0
Charger operation automatically in JEITA temperature standard
2
Half Charge Current Set Input
ISET
1
For ICHG1 : time = tFCHG
0
For ICHG2 : time = 2 x tFCHG, I CHG2 = ICHG1 / 2
Battery Regulation Set Input
VSET
1
Battery regulation voltage is 4.2V
0
Battery regulation voltage is 4.05V
Charging Current Decision
The charge current can be set according to the following
equations :
If ISET = 1 (for ICHG1 )
ICHG_FAST = VISETA × 300
RISETA
If ISET = 0 (for ICHG2 )
V
ICHG_FAST = ISETA × 150
RISETA
ICHG_PRE = 10% × ICHG_FAST
However, once the duration exceeds the fault time, the
register 0x2 bit [0] will be changed from 0 to 1, and the
charge current will be reduced to about 1mA.
Time fault release methods :
(1) Re-plug power
(2) Toggle EN
(3) Enter/exit suspend mode
(4) Remove Battery
Time Fault
During the fast charge phase, several events may increase
the charging time.
For example, the system load current may have activated
the APPM loop which reduces the available charging
current or the device has entered thermal regulation
because the IC junction temperature has exceeded TREG.
DS5002-00
November 2011
(5) OVP
If ISET = 1 (for ICHG1 )
time = tFCHG
If ISET = 0 (for ICHG2 )
time = 2 × tFCHG
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29
RT5002
JEITA Battery Temperature Standard
CV regulation voltage will change at the following battery
temperature ranges : 0°C to 10°C and 45°C to 60°C.
CC regulation current will change at the following battery
temperature ranges : 0°C to 10°C and 45°C to 60°C.
R2 + RCOLD
= 0.74
RCOLD +R1+R2
(1)
R2 + RHOT
= 0.28
RHOT +R1+R2
(2)
Form (1), (2)
R1 =
Battery Pack Temperature Monitoring
The battery pack temperature monitoring function can be
realized by connecting the TS pin to an external Negative
Temperature Coefficient (NTC) thermistor to prevent over
temperature condition. Charging is suspended when the
voltage at the TS pin is out of normal operating range. The
internal timer is then paused, but the value is maintained.
When the TS pin voltage returns back to normal operating
range, charging will resume and the safe charge timer will
continue to count down from the point where it was
suspended.
RCOLD − RHOT
2.457
R2 = 0.389 × R1 − RHOT
If R2 < 0
RCOLD
= 0.74
RCOLD +R1
Form (3)
R1 =
RCOLD
− RCOLD
0.74
Case 2 : TSSEL = H (For 10kΩ NTC) :
VP
VP
Case 1 : TSSEL = L (For 100kΩ NTC) :
TS
TS
0.74 x VP +
R2
0.28 x VP
+
RNTC
Too Cold Temperature
+
Too Cold
Too Hot
0.38 x VP
RNTC
Figure 2
Too Cold Temperature
RCOLD = RNTC
Too Hot Temperature
Too Cold
Too Hot
R2 + RCOLD
= 0.6
RCOLD +R1+R2
(1)
R2 + RHOT
= 0.38
RHOT +R1+R2
(2)
Form (1), (2)
R1 =
RCOLD − RHOT
0.9
R2 = 0.6 × R1− RHOT
If R2 < 0
Too Hot Temperature
RCOLD
= 0.6
RCOLD +R1
RHOT = RNTC
Form (3)
R1 =
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30
+
R2
Figure 1
RCOLD = RNTC
-
RHOT = RNTC
VP
VP
R1
0.6 x VP
R1
The 3.3V at VP pin is buffered by the RT5002 once it is in
charging state or its PMU part is enabled.
For 100kΩ NTC thermistor, the input pin, TSSEL, should
be connected to GND. For 10kΩ NTC thermistor, the input
pin, TSSEL, should be connected to VIN. TSSEL
determines the TS threshold levels for 0°C and 60°C. It
also defines the TS threshold levels used in JEITA
operation. The choosing method of R1 and R2 to meet
battery temperature monitoring is shown below :
(3)
(3)
RCOLD
− RCOLD
0.6
DS5002-00
November 2011
RT5002
The Control Temperature Used in JEITA Operation :
The above calculation gives R1 and R2. JEITA control
thresholds for full charging current and 4.2V regulation
voltage are at TS/VP ratio = 40% and 54% (for TSSEL =
H), 35% and 64% (for TSSEL = L). With the ratio, the
corresponding NTC thermistor resistances from the
resistors in the voltage divider circuit can be obtained.
According to the NTC resistances, the corresponding
temperatures can be found. The two temperatures are the
control temperatures used in JEITA operation.
Power Switch
For the charger, there are three power scenarios :
(1) When a battery and an external power supply (USB or
adapter) are connected simultaneously :
If the system load requirements exceed that of the input
current limit, the battery will be used to supplement the
current to the load. However, if the system load
requirements are less than that of the input current limit,
the excess power from the external power supply will be
used to charge the battery.
charging current is reduced while the SYS current is
increased to maintain system output. In APPM mode,
the battery termination function is disabled.
Battery Supplement Mode Short Circuit Protect
In APPM mode, the SYS voltage will continue to drop if
the charge current is zero and the system load increases
beyond the input current limit. When the SYS voltage
decreases below the battery voltage, the battery will kick
in to supplement the system load until the SYS voltage
rises above the battery voltage.
While in supplement mode, there is no battery supplement
current regulation. However, a built-in short circuit
protection feature is available to prevent any abnormal
current situations. While the battery is supplementing the
load, if the difference between the battery and SYS voltage
becomes more than the short circuit threshold voltage,
SYS will be disabled. After a short circuit recovery time,
tSHORT_R, the counter will be restarted. In supplement
mode, the battery termination function is disabled. Note
that for the battery supply mode exit condition, VBATVSYS < 0V.
(2) When only the battery is connected to the system :
The battery provides the power to the system.
(3) When only an external power supply is connected to
the system :
The external power supply provides the power to the
system.
Input DPM Mode
For the charger, the input voltage is monitored when
USB100 or USB500 is selected. If the input voltage is
lower than VDPM, the input current limit will be reduced
to stop the input voltage from dropping any further. This
can prevent the IC from damaging improperly configured
or inadequately designed USB sources.
APPM Mode
Once the sum of the charging and system load currents
becomes higher than the maximum input current limit,
the SYS pin voltage will be reduced. When the SYS pin
v oltage is reduced to VAPPM, the RT5002 will
automatically operate in APPM mode. In this mode, the
DS5002-00
November 2011
Thermal Regulation and Thermal Shutdown
The charger provides a thermal regulation loop function to
monitor the device temperature. If the die temperature rises
above the regulation temperature, TREG, the charge
current will automatically be reduced to lower the die
temperature. However, in certain circumstances (such as
high VIN, heavy system load, etc.) even with the thermal
loop in place, the die temperature may still continue to
increase. In this case, if the temperature rises above the
thermal shutdown threshold, TSD, the internal switch
between VIN and SYS will be turned off. The switch
between the battery and SYS will remain on, however, to
allow continuous battery power to the load. Once the die
temperature decreases by ∆TSD, the internal switch
between VIN and SYS will be turned on again and the
device returns to normal thermal regulation.
The internal thermal feedback circuitry regulates the die
temperature to optimize the charge rate for all ambient
temperatures.
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31
RT5002
4.16 to 4.2 to 4.23V
−40°C to 85°C
Battery Voltage
Charging Current
VRECH
If
VPRECH
ISETL = 1, ISETU = 1
ISETL = 0, ISETU = X
ITERMI = 10% x ICHG_FAST
If ISETL = 0, ISETU = 0
ITERMI = 3.3% x ICHG_FAST
ICHG_PRE = 10% x ICHG_FAST
ITERM2
Time
Figure 3
APPM Profile
1.5A Mode :
VIN 5V
VSYS 4.4V
VAPPM 4.2V
VBAT 4.0V
3A
2A
IBAT
1A
ISYS
0
IVIN -1A
-2A
-3A
T1
T2
T3
T4
T5
T6
T7
ISYS
VSYS
IVIN
IBAT
T1, T7
0
SYS Regulation Voltage
CHG_MAX
CHG_MAX
T2, T6
< I VIN_OC − CHG_MAX
SYS Regulation Voltage
ISYS + CHG_MAX
CHG_MAX
Auto Charge Voltage Threshold
VIN_OC
VIN_OC − ISYS
VBAT − IBAT x RDS(ON)
VIN_OC
I SYS − I VIN_OC
T3, T5
> IVIN_OC − CHG_MAX
< I VIN_OC
T4
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32
> IVIN_OC
DS5002-00
November 2011
RT5002
USB 500mA Mode :
VUSB
5V
VSYS
4.4V
VAPPM
4.2V
VBAT
4.0V
0.75A
0.5A
IBAT
0.25A
ISYS
0
IUSB -0.25A
-0.5A
-0.75A
T1
T2
T3
T5
T4
T6
T7
ISYS
VSYS
IUSB
IBAT
T1, T7
0
SYS Regulation Voltage
CHG_MAX
CHG_MAX
T2, T6
< IVIN_OC (USB) − CHG_MAX
SYS Regulation Voltage
ISYS + CHG_MAX
CHG_MAX
Auto Charge Voltage
Threshold
IVIN_OC (USB)
IVIN_OC (USB) − ISYS
VBAT − IBAT x RDS(ON)
IVIN_OC (USB)
ISYS − IVIN_OC (USB)
T3, T5
T4
> IVIN_OC (USB) − CHG_MAX
< IVIN_OC (USB)
> IVIN_OC (USB)
VSET vs. VREG, ISET vs. ICHG
When JEITA = 1, VREG and ICHG are set by the bits
VSET and ISET, respectively.
VSET
4.16 to 4.2 to 4.23V
When JEITA = 0, VREG and ICHG follows JEITA
temperature standard.
For JEITA Battery Temperature Standard :
CV regulation voltage will change at the following battery Temp ranges
0°C to 10°C and 45°C to 60°C
CC regulation current will change at the following battery Temp ranges
0°C to 10°C and 45°C to 60°C
VREG
4.01 to 4.05 to 4.08V
4.16 to 4.2 to 4.23V
ISET
4.01 to 4.05 to 4.08V
4.01 to 4.05 to 4.08V
ICHG +/-5%
0°C
ICHG
45°C
10°C
0.5 x ICHG +/-5%
60°C
Temperature
+/- 2°C
ICHG +/- 5%
0.5 x ICHG +/- 5%
0.5 x ICHG +/- 5%
Temperature
+/- 2°C
DS5002-00
November 2011
www.richtek.com
33
RT5002
RT5002 Operation State Diagram for Charging
VBAT > 3V
Fast-Charge State
If ISET = 1
ICHG_FAST = (VISETA / RISETA) x 300
If ISET = 0
ICHG_FAST = (VISETA / RISETA) x 150
Yes
No
VIN – VBAT
> VOS_H
Yes
Pre-Charge State
ICHG_PRE =
10% x ICHG_FAST
Sleep State
If VSET = 1
Check VBAT > 4.1V
If VSET = 0
Check VBAT > 3.95V
No
Yes
No
Time > tFCHG
Yes
No
Time > tPCHG
Standby State
ISETL = 0 & ISETU = 1
ISETL = 1 & ISETU = X
Check ICHG < 10% x ICHG_FAST
If ISETL = 0 & ISETU = 0
Check ICHG < 3.3% x ICHG_FAST
If
Yes
No
Timer-Out State
SAFE = 1
& ICHG to 1mA
Yes
No
Yes
VUVLO< VIN < VOVP
& ENCH = 0
& USUS = 0
Re-Charge State
Time > tTERMI = 25msec
Charger
Disable
Yes
Any State
or V IN < VUVLO,
or VIN > VOVP,
Or VIN - VBAT < VOS_H
or USUS = 1
or ENCH = 1
Yes
If VSET = 1
Check VBAT < 4.1V
If VSET = 0
Check VBAT < 3.95V
Charge Done State
EOC = 1 & ICHG = 0A
No
Operation State Diagram for TS Pin (TSSEL = L)
Any State
No
74% x VVP < VTS < 2.85V
Or V TS < 28% x VVP
No
VTS > 2.85V
Yes
Yes
TS fault State
ICHG = 0A
TS_FAULT = 1
www.richtek.com
34
Battery Remove State
ICHG = 0A
Reset timer and NoBAT = 1
DS5002-00
November 2011
RT5002
I2C Interface
The RT5002 I2C slave address is by default = 0011000
(7bits), but if customers request, the slave address can
be changed to 0011010 (7bits). The I2C interface supports
fast mode (bit rate up to 400kb/s). The write or read bit
stream (N>=1) is shown below :
Read N bytes
S
Slave Address
0 A
Register Address
A Sr
Slave Address
Assume Address = m
R/W
Data 2
MSB
1 A MSB
Data 1
LSB A
Data for Address = m
LSB A
MSB
Data for Address = m+1
Data N
LSB A P
Data for Address = m + N - 1
Write N bytes
S
Slave Address
0 A
Register Address
Assume Address = m
R/W
A MSB
Data 1
Data for Address = m
MSB
LSB A MSB
Data 2
Data for Address = m + 1
Data N
LSB A
LSB A P
Data for Address = m + N - 1
Driven by Master,
Driven by Slave (RT5002), P Stop,
S Start,
Sr Repeat Start
SDA
tLOW
tF
tSU;DAT
tR
tHD;STA
tF
tBUF
tR
tSP
SCL
tHD;STA
S
tHD;DAT
tHIGH
tSU;STO
tSU;STA
P
Sr
S
I2C Register File
b[7]
(MSB)
b[6]
b[5]
Meaning
Default
MOD7
0
SEQ56
0
EN56
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
Address
0x0
Meaning
0x1
0x2
TIMER [3:0]
b[3]
b[1]
b[0]
(LSB)
0
0
R/W
R/W
R/W
JEITA
0
ISET
VSET
0
0
R/W
b[2]
EN7_DIM7 [4:0]
0
Default
0
1
0
0
ENCH
0
Read/Write
Meaning
R/W
ISETU
R/W
ISETL
R/W
USUS
R/W
NoBAT
R/W
EOC
R/W
PGOOD
R/W
TS_FAULT
Default
1
0
0
0
0
0
0
SAFE
0
R
R
R
R
R
R/W
R/W
R/W
Read/Write
Reset after EN1234 = L and PMU shutdown completely.
DS5002-00
b[4]
November 2011
www.richtek.com
35
RT5002
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
For the best performance of the RT5002, the following
PCB layout guidelines must be strictly followed.
}
Place the input and output capacitors as close as
possible to the input and output pins respectively for
good filtering.
}
Keep the main power traces as wide and short as
possible.
}
The switching node area connected to LX and inductor
should be minimized for lower EMI.
}
Place the feedback components as close as possible
to the FB pin and keep these components away from
the noisy devices.
}
Connect the GND and Exposed Pad to a strong ground
plane for maximum thermal dissipation and noise
protection.
}
The connection of RISETA should be isolated from other
noisy traces. A short wire is recommended to prevent
EMI and noise coupling.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT5002, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For WQFN40L 5x5 packages, the thermal resistance, θJA, is 36°C/
W on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (36°C/W) = 2.778W for
WQFN-40L 5x5 package
Maximum Power Dissipation (W) 1
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT5002 package, the derating
curve in Figure 4 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
3.20
Four-Layer PCB
2.80
2.40
2.00
1.60
1.20
0.80
0.40
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. Derating Curves for RT5002 Package
www.richtek.com
36
DS5002-00
November 2011
RT5002
LX should be connected to Inductor by wide
and short trace, keep sensitive compontents
away from this trace.
VOUT_CH1
SYS
Place the feedback components as
close as possible to the FB pin and
keep away from noisy devices.
GND
C1
VOUT_CH2
C3
C24
GND
R2
C21
R1
SYS
L1
C2
D5
D4
C10
C9
L2
Bypass
Cap
29
3
28
27
26
GND
6
25
7
24
8
23
41
22
9
21
10
11 12 13 14 15 16 17 18 19 20
WAKE
FB2
TSSEL
SYS
L5
C14
LX5
VOUT_CH5
PVD5
FB5
R9
C13
C12
EN1234
LX3
PVD3
R10
L3
FB3
SYS
GND
ISETA
TS
VP
SDA
SCL
PVD6
LX6
VOUT6
FB6
VREF
C8
30
2
5
R8
GND
C5
R5
The RISETA connection copper area
should be minimized and kept far away
from noise sources.
GND
VOUT_CH6
SYS
GND
C6
R11
C15
R16
RNTC
C7
R6
R12
D1
VOUT_CH3
GND
L6
RISETA
R17
C4
R4
1
4
R3
GND
40 39 38 37 36 35 34 33 32 31
GND
INT
FB1
VDDM
D2
FB7
VOUT_CH7
PVD7
L7
C19
LX7
GND
SYS L4 BATS
C20
LX4
VOUT_CH4
SYS PVD4
R7
FB4
C11
D3
C22
LX1
PVD1
RTCPWR
VIN
SYS
SYS
BAT
BAT
PVD2
LX2
R13
C18
C17
C16
Input/Output capacitors must be
placed as close as possible to the
Input/Output pins.
GND
Connect the Exposed
Pad to a ground plane.
Figure 5. PCB Layout Guide
DS5002-00
November 2011
www.richtek.com
37
RT5002
Protection
Type
SYS
Threshold (Typical)
Refer to Electrical
spec.
UVLO
SYS < 1.3V
PMU Shutdown.
No-delay
OVP
VDDM > 6V
Automatic reset at
VDDM < 5.75V
100ms
UVLO
VDDM < 2.4V
PMU Shutdown.
No-delay
Current
limit
N-MOSFET current >
3A
PVD1 OVP
PVD1 > 6V
VDDM
CH1
Step-Up
Protection Methods
IC
Shutdown
Delay Time
PVD1 UVP
FB1 UVP
PVD1 < (VSYS − 0.8V)
or PVD1 < 1.28V after
soft-start end.
FB1 < 0.4V after
pre-charge
FB1 Over
Load (OL)
FB1 < 0.7V
Current
limit
P-MOSFET current >
1.8A
CH2
Step-Down FB2 UVP
FB2 < 0.4V after
soft-start end.
FB2 Over
Load
FB2 < 0.7V
Current
limit
P-MOSFET current >
1.6A
CH3
Step-Down FB3 UVP
FB3 < 0.4V after
soft-start end.
FB3 Over
Load
FB3 < 0.7V
Current
limit
P-MOSFET current >
1.6A
CH4
Step-Down FB4 UVP
FB4 Over
Load
FB4 < 0.4V after
soft-start end.
FB4 < 0.7V
N-MOSFET off,
P-MOSFET off.
Automatic reset at
next clock cycle.
N-MOSFET off,
P-MOSFET off.
N-MOSFET off,
P-MOSFET off.
N-MOSFET off,
P-MOSFET off
PMU Shutdown
when OL occur each
cycle until 100ms.
N-MOSFET off,
P-MOSFET off.
Automatic reset at
next clock cycle.
N-MOSFET off,
P-MOSFET off.
PMU Shutdown
when OL occur each
cycle until 100ms.
N-MOSFET off,
P-MOSFET off.
Automatic reset at
next clock cycle.
N-MOSFET off,
P-MOSFET off.
PMU Shutdown
when OL occur each
cycle until 100ms.
N-MOSFET off,
P-MOSFET off.
Automatic reset at
next clock cycle.
N-MOSFET off,
P-MOSFET off.
PMU Shutdown
when OL occur each
cycle until 100ms.
Reset Method
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
No-delay
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
No-delay
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
To be continued
www.richtek.com
38
DS5002-00
November 2011
RT5002
Protection
Type
CH5
Step-Up
CH6
Async
Inverting
Threshold (Typical)
Refer to Electrical
spec.
VIN
Protection Methods
N-MOSFET off,
P-MOSFET off.
Automatic reset at next
clock cycle.
N-MOSFET off,
P-MOSFET off.
N-MOSFET off,
P-MOSFET off.
PMU Shutdown when
OL occur each cycle
until 100ms.
N-MOSFET off,
P-MOSFET off.
P-MOSFET off.
Automatic reset at next
clock cycle.
Current
limit
N-MOSFET current >
1.2A
PVD5 OVP
PVD5 > 22V
FB5 UVP
FB5 < 0.6V after
soft-start end.
FB5 Over
Load
FB5 < 1.1V
PVD5 UVP
PVD5 < (VSYS −0.2V)
Current
limit
P-MOSFET current >
1.5A
PVD6 OVP
PVD6 < -13V
P-MOSFET off.
No-delay
FB6 UVP
FB6 > 1.2V
P-MOSFET off.
100ms
FB6 Over
Load
FB6 > 0.74V
Current
limit
N-MOSFET current >
0.8A
CH7
WLED
Thermal
IC
Shutdown
Delay Time
PMU Shutdown when
OL occur each cycle
until 100ms.
N-MOSFET off,
P-MOSFET off.
Automatic reset at next
clock cycle.
PVD7 OVP
PVD7 > 15V
N-MOSFET off,
P-MOSFET off.
Shutdown CH7 by self
Thermal
shutdown
Temperature > 155°C
All channels stop
switching
No-delay
100ms
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
100ms
VDDM power reset or
EN1234 pin set to low
No-delay
No-delay
VDDM power reset
and Reg0x00[4 to 0] =
00000 reset or
EN1234 pin set to low
VDDM power reset or
EN1234 pin set to low
Protection
Type
Threshold (Typical)
Refer to Electrical Spec.
VIN UVLO
VIN < 3.3V
No-charge
No-delay
No latch
VIN OVP
VIN > 6.5V
No-charge
No-delay
No latch
DS5002-00
November 2011
Protection
Methods
100ms
Reset Method
Charger Shutdown
Delay Time
Reset Method
www.richtek.com
39
RT5002
Outline Dimension
D
SEE DETAIL A
D2
L
1
E2
E
e
b
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.150
0.250
0.006
0.010
D
4.950
5.050
0.195
0.199
D2
3.250
3.500
0.128
0.138
E
4.950
5.050
0.195
0.199
E2
3.250
3.500
0.128
0.138
e
L
0.400
0.350
0.016
0.450
0.014
0.018
W-Type 40L QFN 5x5 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
www.richtek.com
40
DS5002-00
November 2011