DRF1200 1000V, 13A, 30MHz MOSFET Driver Hybrid The DRF1200 hybrid includes a high power gate driver and the power MOSFET. The driver output can be configured as Inverting and NonInverting. It was designed to provide the system designer increased flexibility and lowered cost over a non-integrated solution. D IN DRIVER 13A MOSFET FEATURES S TYPICAL APPLICATIONS • Switching Frequency: DC TO 30MHz • Switching Speed 3-4ns • Class C, D and E RF Generators • Low Pulse Width Distortion • BVds = 1Kv • Switch Mode Power Amplifiers • Ids = 13A Max • Pulse Generators • Rds(on) ≤ 0.90 Ohm • Ultrasound Transducer Drivers • PD = 624W • Acoustic Optical Modulators • Single Power Supply • 1V CMOS Schmitt Trigger Input 1V Hysteresis • Inverting Non-Inverting Select • RoHS Compliant Driver Absolute Maximum Ratings Symbol VDD Parameter Min Typ Supply Voltage IN, FN Input Single Voltages IO PK Output Current Peak TJMAX Operating Temperature Max 15 -.7 to +5.5 Unit V 8 A 175 °C Driver Specifications Parameter Min Typ Max VDD Supply Voltage 10 15 IN Input Voltage 3 5.5 Unit V IN(R) Input Voltage Rising Edge 3 IN(F) Input Voltage Falling Edge 3 IDDQ Quiescent Current 2 mA Output Current 8 A Ciss Input Capacitance 3 RIN Input Parallel Resistance 1 IO ns MΩ VTH(on) Input, Voltage Threshold Low (See truth table) 0.8 1.1 VTH(off) Input, Voltage Threshold High (See truth table) 1.9 2.2 TDLY Time Delay (throughput) 38 tr Rise Time 7.5 tf Fall Time 7.5 Microsemi Website - http://www.microsemi.com V ns ns 050-4913 Rev G 5-2011 Symbol DRF1200 Driver Output Characteristics Symbol Parameter Min Typ Max Unit Cout Output Capacitance 2500 pF Rout Output Resistance .8 Ω Lout Output Inductance 3 nH FMAX Operating Frequency CL = 3000nF + 50Ω 30 FMAX Operating Frequency RL = 50Ω 50 MHz Driver Thermal Characteristics Symbol Parameter Min Typ RθJC Thermal Resistance Junction to Case 1.5 RθJHS Thermal Resistance Junction to Heat Sink 2.5 TJSTG Storage Temperature PDJHS Maximum Power Dissipation @ TSINK = 25°C 60 PDJC Total Power Dissipation @ TC = 25°C 100 Max Unit °C/W °C -55 to 150 W MOSFET Absolute Maximum Ratings Symbol BVDSS ID RDS(on) Tjmax Parameter Min Drain Source Voltage 1000 Typ Max V Continuous Drain Current THS = 25°C 13 Drain-Source On State Resistance Unit 0.90 Operating Temperature A Ω 175 °C Max Unit MOSFET Dynamic Characteristics Symbol Parameter Min Typ Ciss Input Capacitance 2000 Coss Output Capacitance 165 Crss Reverse Transfer Capacitance 75 pF MOSFET Thermal Characteristics Symbol Parameter Min Typ RθJC Thermal Resistance Junction to Case 0.095 RθJHS Thermal Resistance Junction to Heat Sink 0.25 TJSTG Storage Temperature -55 to 150 PDHS Maximum Power Dissipation @ TSINK = 25°C 600 PDC Total Power Dissipation @ TC = 25°C 1580 Max Unit °C/W °C W Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-4913 Rev G 5-2011 Figure 1, DRF1200 Simplified Circuit Diagram The Simplified DRF1200 Circuit Diagram is illustrated above. By including the driver high speed by-pass capacitor (C1), the contribution to the internal parasitic loop inductance of the driver output is greatly reduced. This, coupled with the tight geometry of the hybrid, allows optimal gate drive to the MOSFET. This low parasitic approach, coupled with the Schmitt trigger input (IN), Kelvin signal ground (SG) and the AntiRing Function, provide improved stability and control in Kilowatt to Multi-Kilowatt, high Frequency applications. Both the FN and IN pins are referenced to the Kelvin ground (SG.) The signal is then applied to the intermediate drivers and level shifters; this section contains proprietary circuitry designed specifically for the ring abatement. The power drivers provide high current to the gate of the MOSFETS. DRF1200 The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high. Truth Table *Referenced to SG FN (pin 3)* IN (pin 4)* MOSFET HIGH HIGH ON HIGH LOW OFF LOW HIGH OFF LOW LOW ON Figure 2, DRF1200 Test Circuit The Test Circuit illustrated above was used to evaluate the DRF1200 (available as an evaluation Board DRF12XX / EVALSW.) The input control signal is applied to the DRF1200 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal ground currents. 050-4913 Rev G 5-2011 The +VDD inputs (2,6) are by-passed (C1, C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate load. RL set for IDM at VDS max this load is used to evaluate the output performance of the DRF1201. DRF1200 Pin Assignments Pin 1 Ground Pin 2 +Vdd Pin 3 FN Pin 4 IN Pin 5 SG Pin 6 +Vdd Pin 7 Ground Pin 8 Source Pin 9 Drain Pin 10 Source 050-4913 Rev G 5-2011 All dimensions are ± .005 Figure 3, DRF1200 Mechanical Outline