DRF1201 1000V, 26A, 30MHz MOSFET Driver Hybrid The DRF1201 hybrid includes a high power gate driver and the power MOSFET. The driver output can be configured as Inverting and NonInverting. It was designed to provide the system designer increased flexibility and lowered cost over a non-integrated solution. FEATURES TYPICAL APPLICATIONS • Switching Frequency: DC TO 30MHz • Switching Speed 3-4ns • Class C, D and E RF Generators • Low Pulse Width Distortion • BVds = 1Kv • Switch Mode Power Amplifiers • Ids = 26A avg. • Pulse Generators • Rds(on) ≤ .55 Ohm • Ultrasound Transducer Drivers • PD = 1100W • Acoustic Optical Modulators • Single Power Supply • 1V CMOS Schmitt Trigger Input 1V Hysteresis • Inverting Non-Inverting Select • RoHS Compliant Driver Absolute Maximum Ratings Symbol VDD Parameter Min Typ Supply Voltage IN, FN Input Single Voltages IO PK Output Current Peak TJMAX Operating Temperature Max 15 -.7 to +5.5 Unit V 8 A 175 °C Max Unit Driver Specifications Parameter Min Typ VDD Supply Voltage 10 15 IN Input Voltage 3 5.5 V IN(R) Input Voltage Rising Edge 3 IN(F) Input Voltage Falling Edge 3 IDDQ Quiescent Current 2 mA Output Current 8 A Ciss Input Capacitance 3 RIN Input Parallel Resistance 1 IO ns MΩ VT(ON) Input, Low to High Out (See Truth Table) 0.8 1.1 VT(OFF) Input, High to Low Out (See Truth Table) 1.9 2.2 TDLY Time Delay (throughput) 38 tr Rise Time 5 tf Fall Time 5 TD Prop. Delay 35 Microsemi Website - http://www.microsemi.com V ns ns 050-4972 Rev C 8-2009 Symbol DRF1201 Driver Output Characteristics Symbol Parameter Cout Output Capacitance Rout Output Resistance Min Lout Output Inductance FMAX Operating Frequency CL = 3000nF + 50Ω 30 FMAX Operating Frequency RL = 50Ω 50 Typ Max Unit 2500 pF .8 Ω 3 nH MHz Driver Thermal Characteristics Symbol Parameter Min Typ RθJC Thermal Resistance Junction to Case 1.5 RθJHS Thermal Resistance Junction to Heat Sink 2.5 TJSTG Storage Temperature Max °C/W °C -55 to 150 PDJHS Maximum Power Dissipation @ TSINK = 25°C 60 PDJC Total Power Dissipation @ TC = 25°C 100 Unit W MOSFET Absolute Maximum Ratings Symbol BVDSS ID Parameter Min Drain Source Voltage 1000 Typ Drain-Source On State Resistance Tjmax Operating Temperature Unit V Continuous Drain Current THS = 25°C RDS(on) Max 26 0.55 A Ω 175 °C Max Unit MOSFET Dynamic Characteristics Symbol Parameter Min Typ Ciss Input Capacitance 2000 Coss Output Capacitance 165 Crss Reverse Transfer Capacitance 75 pF MOSFET Thermal Characteristics Symbol Parameter Min Typ RθJC Thermal Resistance Junction to Case 0.53 RθJHS Thermal Resistance Junction to Heat Sink 0.141 TJSTG Storage Temperature PDHS Maximum Power Dissipation @ TSINK = 25°C 1060 PDC Total Power Dissipation @ TC = 25°C 2830 -55 to 150 Max Unit °C/W °C W Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-4972 Rev C 8-2009 Figure 1, DRF1201 Simplified Circuit Diagram The Simplified DRF1201 Circuit Diagram is illustrated above. By including the driver high speed by-pass capacitor (C1), the contribution to the internal parasitic loop inductance of the driver output is greatly reduced. This, coupled with the tight geometry of the hybrid, allows optimal gate drive to the MOSFET. This low parasitic approach, coupled with the Schmitt trigger input (IN), Kelvin signal ground (SG) and the AntiRing Function, provide improved stability and control in Kilowatt to Multi-Kilowatt, high Frequency applications. Both the FN and IN pins are referenced to the Kelvin ground (SG.) The signal is then applied to the intermediate drivers and level shifters; this section contains proprietary circuitry designed specifically for the ring abatement. The power drivers provide high current to the gate of the MOSFETS. DRF1201 The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high. Truth Table *Referenced to SG FN (pin 3)* IN (pin 4)* MOSFET HIGH HIGH ON HIGH LOW OFF LOW HIGH OFF LOW LOW ON Figure 2, DRF1201 Test Circuit The Test Circuit illustrated above was used to evaluate the DRF1201 (available as an evaluation Board DRF12XX / EVALSW.) The input control signal is applied to the DRF1201 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal ground currents. Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved. 050-4972 Rev C 8-2009 The +VDD inputs (2,6) are by-passed (C1, C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate load. RL set for IDM at VDS max this load is used to evaluate the output performance of the DRF1201. DRF1201 Pin Assignments Pin 1 Ground Pin 2 +Vdd Pin 3 FN Pin 4 IN Pin 5 SG Pin 6 +Vdd Pin 7 Ground Pin 8 Source Pin 9 Drain Pin 10 Source 0.300 1.500 GAPS - 0.090" , 2 PLCS 0.275 0.200 0.370 0.200 10 9 8 0.038 0.275 0.125 R0.150 4 PLCS 0.125 0.750 1.000 0.520 0.0045 Ø0.125 4 PLCS 0.250 0.250 1 0.275 LARGE LEADS - 0.200", 2 PLCS 2 3 4 5 6 7 GAPS - 0.050", 6 PLCS SMALL LEADS - 0.040", 3 PLCS MEDIUM LEADS - 0.065", 2 PLCS All dimensions are ± .005 050-4972 Rev C 8-2009 0.300 Figure 3, DRF1201 Mechanical Outline .005" TYP. HALF HARD COPPER GOLD PLATED