5-V Low-Drop Voltage Regulator TLE 4261-2 Features • • • • • • • • • • • • • • High accuracy 5 V ± 2% Very low-drop voltage Very low quiescent current Low starting-current consumption Proof against reverse polarity Input voltage up to 42 V Overvoltage protection up to 65 V (≤ 400 ms) Short-circuit-proof External setting of reset delay Integrated watchdog circuit Wide temperature range Overtemperature protection Suitable for automotive use EMC proofed (100 V/m) Type Ordering Code Package ▼ TLE 4261-2 Q67000-A9110 P-TO220-7-1 ▼ TLE 4261-2 G Q67000-A9140 P-DSO-20-6 (SMD) ▼ TLE 4261-2 GL Q67006-A9193 P-TO220-7-8 (SMD) P-TO220-7-1 P-DSO-20-6 ▼ Please also refer to the new pin compatible device TLE 4271 P-TO220-7-8 Functional Description TLE 4261-2 is a high accuracy 5-V low-drop voltage regulator in a P-TO220-7 or in a PDSO package. The maximum input voltage is 42 V (65 V/≤ 400 ms). The device can produce an output current of more than 500 mA. It is short-circuit-proof and incorporates temperature protection that disables the circuit at impermissibly high temperatures. Semiconductor Group 1 1998-11-01 TLE 4261-2 Application Description The IC regulates an input voltage VI in the range 6 V < VI < 40 V to VQrated = 5.0 V. A reset signal is generated for an output voltage VO of < 4.75 V. The reset delay can be set with an external capacitor. A connected microprocessor is monitored by the integrated watchdog circuit; if pulses are missing, the reset output is set low. The pulse repetition rate can be set within wide limits with the capacitor for reset delay. If this input is connected to a voltage of > 6 V, the watchdog function is deactivated. The device also features an inhibit input, which is activated by a voltage of > 6 V and then works on this input through internal hysteresis up to approx. 3 V. A voltage of < 2 V on the inhibit input turns off the regulator, current drain then dropping to max. 50 µA. Design Notes for External Components The input capacitor CI causes a low-resistant powerline and limits the rise times of the input voltage. The IC is protected against rise times up to 100 V/µs. It is possible to damp the tuned circuit consisting of supply inductance and input capacitance with a resistor of approx. 1 Ω in series to CI. The output capacitor maintains the stability of the regulating loop. Stability is guaranteed with a rating of 22 µF min. at an ESR of 3 Ω max. in the operating temperature range. Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and controls the base of the series PNP transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the output voltage drops below 95.5% of its typical value for more than 2 µs, a reset signal is triggered on pin 3 and an external capacitor discharged on pin 5. The reset signal is not cancelled until the voltage on the capacitor has exceeded the upper switching threshold VDT. A positive-edge-triggered watchdog circuit monitors the connected microprocessor and will likewise trigger a reset if pulses are missing. The IC can be disabled by a low level on the inhibit input and the current consumption drops to < 50 µA. The IC also incorporates a number of circuits for protection against: • • • • Overload Overvoltage Overtemperature Reverse polarity Semiconductor Group 2 1998-11-01 TLE 4261-2 Pin Configuration (top view) TLE 4261-2 1 VΙ 2 3 4 5 6 TLE 4261-2 GL 7 INH GND Watch QRES DRES VQ AEP00592 Pin Definitions and Functions Pin No. Symbol Function 1 VI Input voltage; block a capacitor directly to ground on the IC. The capacitor rating will depend on the vihicle electric system. Oscillation of the output voltage can be damped by a resistor of approx. 1 Ω in series with the input capacitor. 2 INH Inhibit; switches off the IC when low. 3 QRES Reset output; open collector output controlled by the reset delay. 4 GND Ground 5 DRES Reset delay; wired to ground using a capacitor. 6 Watch Watchdog; monitors the microprocessor when active. 7 VQ 5-V output; block to ground using a capacitor of ≥ 22-µF. ESR is ≤ 3 Ω in the operating temperature range. Semiconductor Group 3 1998-11-01 TLE 4261-2 TLE 4261-2 G N.C. N.C. QRES GND GND GND GND N.C. DRES N.C. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 INH N.C. VΙ GND GND GND GND N.C. VQ Watch AEP01182 Pin No. Symbol Function 18 VI Input voltage; block a capacitor directly to ground on the IC. The capacitor rating will depend on the vihicle electric system. Oscillation of the output voltage can be damped by a resistor of approx. 1 Ω in series with the input capacitor. 20 INH Inhibit; switches off the IC when low. 3 QRES Reset output; open collector output controlled by the reset delay. 4 -7, 14 - 17 GND Ground 9 DRES Reset delay; wired to ground using a capacitor. 11 Watch Watchdog; monitors the microprocessor when active. 12 VQ 5-V output; block to ground using a capacitor of ≥ 22-µF. ESR is ≤ 3 Ω in the operating temperature range. 1, 2, 8, 10, 13, 19 N.C. Not connected Semiconductor Group 4 1998-11-01 TLE 4261-2 Overvoltage Monitoring Input Saturation Control and Protection Temperature Sensor 1 (18) 7 Output (12) Control Amplifier Adjustment BANDGAP Reference Buffer + RESET Generator - 5 (9) 3 (3) RESET Delay RESET Output Watchdog Inhibit (20) 2 (4-7) (14-17) 4 Inhibit GND (11) 6 Watchdog AEB00002 Block Diagram Semiconductor Group 5 1998-11-01 TLE 4261-2 Absolute Maximum Ratings TJ = – 40 to 150 °C Parameter Symbol Limit Values Unit Remarks min. max. VI VI II – 42 42 V – – 65 V t ≤ 400 ms – 1.6 A – V2 I2 – 0.3 42 V – – 5 mA – VR IR – 0.3 42 V – – – – internally limited IGND – 0.5 A – VD ID – 0.3 42 V – – – – internally limited Differential voltage VI – VQ – 5.25 VI V – Current IQ – A – Input Input voltage Input current Inhibit Voltage Current Reset Output Voltage Current Ground Current Reset Delay Voltage Current Output Semiconductor Group 6 1.4 1998-11-01 TLE 4261-2 Absolute Maximum Ratings (cont’d) TJ = – 40 to 150 °C Parameter Symbol Limit Values Unit Remarks min. max. Tj Tstg – 150 °C – – 50 150 °C – VI 1) Tj – 32 V – – 40 150 °C – RthSA RthSC – 65 (70)2) K/W – – 3 (15)2) K/W – Temperature Junction temperature Storage temperature Operating Range Input voltage Junction temperature Thermal Resistance System-air System-case 1) see diagram 2) Figures in parenthesis refer to TLE 4261-2 G. Semiconductor Group 7 1998-11-01 TLE 4261-2 Characteristics VI = 13.5 V; Tj = 25 °C; V5 ≥ 6 V (unless otherwise specified) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Normal Operation Output voltage VQ 4.9 5.0 5.1 V Output current IQ – – 50 µA Output current IQ Iq 500 1000 – mA – – 3.5 mA Current consumption Iq = II – IQ Iq – – 10 mA Current consumption Iq = II – IQ Iq – 5.0 65 mA Current consumption Iq = II – IQ Iq – 40 80 mA Drop voltage – 0.35 0.5 V – 0.2 0.3 V – 15 35 mV Supply-voltage regulation VDR VDR ∆VQ ∆VQ – 15 50 mV Supply-voltage regulation ∆VQ – 5 25 mV Ripple rejection SVR – 54 – dB Temperature drift of output αVQ voltage – 2× – 10–4 Current consumption Iq = II – IQ Drop voltage Load regulation Semiconductor Group 8 IQ = 100 mA – 40 °C ≤ Tj ≤ 125 °C 0 V ≤ VI ≤ 2 V; V2 = VI; – 40 °C ≤ Tj ≤ 125 °C VI = 17 V to 28 V IQ = 0 mA, VW >6 V 6 V ≤ VI ≤ 28 V IQ = 150 mA 6 V ≤ VI ≤ 28 V IQ = 500 mA VI ≤ 6 V IQ = 500 mA VI = 4.5 V; IQ = 0.5 A VI = 4.5 V; IQ = 0.15 A 25 mA ≤ IQ ≤ 500 mA VI ≤ 6 V to 28 V; IQ = 100 mA VI ≤ 6 V to 16 V; IQ = 100 mA f = 100 Hz; Vr = 0.5 VSS 1/°C – 1998-11-01 TLE 4261-2 Characteristics (cont’d) VI = 13.5 V; Tj = 25 °C; V5 ≥ 6 V (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max. I1 I2 V2 – – 50 µA – – 100 µA V2 = 2 V; IQ = 0 V2 = 6 V 5.0 5.5 6.0 V IC turned ON V2 2.0 2.7 3.7 V IC turned OFF Switching threshold VRT 94 95.5 97 % in % of VQ; IQ > 500 mA; VI = 6 V Saturation voltage, reset output VR – 0.25 0.40 V IR = 1 mA Reverse current IR ID VST VDT VC – – µA tD tt Inhibit Operation Current consumption Current consumption Switching threshold for inhibit Switching threshold for inhibit Reset Generator Charge current Switching threshold Delay switching threshold Saturation voltage, delay output Delay time Delay time Semiconductor Group 18.75 25 31.25 µA VR = 5 V VC = 1.5 V 0.9 1 1.1 V – 2.25 2.50 2.75 V – – – 100 mV VI = 4.5 V and Id – 10 – ms CD = 100 nF – 2 – µs – 9 1 1998-11-01 TLE 4261-2 Characteristics (cont’d) VI = 13.5 V; Tj = 25 °C; V5 ≥ 6 V (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max. VW ICD VCD TW 5.2 5.6 6.0 V – 5.6 7.5 9.4 µA VC = 1.5 V 2.95 3.05 3.15 V – – 35 – ms CD = 100 nF VIOFF ∆VI IQS IQR 41 43 45 V IQ < 1 mA – 6.5 – V – – – 50 µA – – 1.5 mA VQ = 0 V; VI = 45 V VQ = 5 V; VI and V2 Watchdog Turn-OFF voltage Discharge current Switching voltage Pulse intervall General Data Turn-Off voltage Turn-Off hysteresis Leakage current Reverse output current open Semiconductor Group 10 1998-11-01 TLE 4261-2 Input 6 V to 40 V 470 nF 1 7 2 5 TLE 4261-2 6 From Microcontroller Output 22 µF 100 k Ω 100 nF 3 RESET 4.7 k Ω 4 From µC AES01455 KL15 7 V to 18 V Application Circuit ΙΙ 7 Ι Q / Ι SC 1 1000 µF 22 µF 470 nF TLE 4261-2 4.7 kΩ VQ Ι3 VΙ + VR V2 2 VC 3 5 Ιd CD 100 nF 4 Ι GND VDr = VΙ -VQ 6 ΙR VR VW AES01508 V SVR = 20 log R ∆VQ Test Circuit Semiconductor Group 11 1998-11-01 TLE 4261-2 Time Responce in Watchdog Condition V Wmin > 6 V VW V ΙOFF ∆V Ι < V ΙOFF VΙ 3.3 V ∆V RT <t t V V Q RT dV Ι D = dt C D V DT VC V ST tD VR Overvoltage OverSpike voltage Overtemperature Undervoltage Secondary Spike Shortcircuit on Output AET00593 Timing with Watchdog OFF Semiconductor Group 12 1998-11-01 TLE 4261-2 Drop Voltage versus Output Current VDr Output Voltage versus Input Voltage AED00586 800 mV 700 AED00027 12 VQ V 10 VΙ = 4.5 V RL =10 Ω 600 8 500 6 T j = 125 C 400 300 4 200 T j = 25 C 2 100 0 0 100 200 300 400 mA 0 600 0 2 8 6 4 ΙQ VΙ Current Consumption versus Input Voltage Current Consumption versus Output Current AED00026 120 V 10 Ιq Ι q mA AED00588 80 mA 70 100 VΙ = 13.5 V 60 R L =10 Ω 80 50 40 60 30 40 20 20 0 10 0 0 10 20 30 40 V 50 100 200 300 400 mA 600 ΙQ VΙ Semiconductor Group 0 13 1998-11-01 TLE 4261-2 Charge Current ID and Discharge Current ICD versus Temperature Ι Switching Voltage VCD and VST versus Temperature AED01322 40 µA 35 V V Ι = 13.5 V V C = 1.5 V 30 25 AED01323 4 V V Ι = 13.5 V V Cd 3 Ιd 2 20 15 V ST 10 1 Ι Cd 5 0 -40 0 40 80 0 -40 120 C 160 Tj Pulse Interval TW versus Temperature 0 40 80 Output Voltage versus Temperature AED01324 1.6 ms T W 1.4 120 C 160 Tj AED00028 5.20 VQ V 5.10 V Ι = 13.5 V C d = 100 nF 1.2 VΙ = 13.5 V 5.00 1.0 0.8 4.90 0.6 4.80 0.4 4.70 0.2 0 -40 0 Semiconductor Group 40 80 4.60 -40 120 C 160 Tj 0 40 80 120 C 160 j 14 1998-11-01 TLE 4261-2 Current Consumption of Inhibit at the Switching Point versus Temperature Output Current versus Input Voltage AED01325 120 AED00594 1.2 Ι Q mA µA Ι 20 100 1.0 T j = 25 C 80 0.8 60 0.6 ON 0.4 40 20 0 -40 0.2 OFF 0 0 80 40 120 C 160 Tj 10 20 30 40 V 50 VΙ Input Step Responce ∆VΙ 0 Load Step Responce AED00595 2 V 1 ∆Ι Q AED00596 mA 500 t R = t F ~_ 1 µs 0 25 40 ∆VQ mV 20 200 ∆VQ mV 100 C Q = 22 µs 0 0 -20 -40 -10 C Q = 22 µs -100 0 10 20 30 µs -200 -10 50 t Semiconductor Group 0 10 20 30 µs 50 t 15 1998-11-01 TLE 4261-2 Package Outlines P-TO220-7-1 (Plastic Transistor Single Outline) 10 +0.4 10.2 -0.2 1 x 45˚ +0.1 1.27 +0.1 8.6 ±0.3 15.4 ±0.3 8.8 -0.2 2.6 7 10.2 ±0.3 1 16 ±0.4 19.5 max 2.8 3.75 4.6 -0.2 0.4 +0.1 1.27 0.6 +0.1 1) 4.5 ±0.4 0.6 M 7x 8.4 ±0.4 1) 0.75 -0.15 at dam bar (max 1.8 from body) 1) 0.75 -0.15 im Dichtstegbereich (max 1.8 vom Körper) GPT05108 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mm Semiconductor Group 16 1998-11-01 TLE 4261-2 P-TO220-7-8 (Plastic Transistor Single Outline) 4.6 1.27 10.2 0.2 8.0 2.6 8.8 1.5 3.5 10.1 1) 0.6 1.27 0.4 6 x 1.27 = 7.62 GPT05874 1) shear and punch direction burr free surface Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 17 Dimensions in mm 1998-11-01 TLE 4261-2 1.27 0.35 x 45˚ 7.6 -0.2 1) 0.23 +0.0 9 8˚ ma x 2.65 max 2.45 -0.2 0.2 -0.1 P-DSO-20-6 (Plastic Dual Small Outline) 0.4 +0.8 0.35 +0.15 2) 0.2 24x 20 0.1 10.3 ±0.3 11 GPS05094 1 12.8 1) 10 -0.2 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 18 Dimensions in mm 1998-11-01