UT63M143 5962-07242

REVISIONS
LTR
DATE (YR-MO-DA)
APPROVED
A
Correct Receiver input voltage range in section 1.3, Receiver differential
voltage in section 1.4 and Output voltage swing (Vo) per MIL-STD-1760 and
footnotes 9/ in the table IA. - MAA
DESCRIPTION
09-03-10
Thomas M. Hess
B
Correct physical dimension of case outline Y in figure 1. Update Boilerplate
paragraphs to current requirement of MIL-PRF-38535 - MAA
10-09-29
Thomas M. Hess
C
Correct transformer coil ratio, in Figure 9. - PHN
15-10-07
Thomas M. Hess
REV
SHEET
REV
C
C
C
C
C
C
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C
C
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SHEET
15
16
17
18
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REV STATUS
REV
C
C
C
C
C
C
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C
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C
C
C
C
C
OF SHEETS
SHEET
1
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PMIC N/A
PREPARED BY
Phu H. Nguyen
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
CHECKED BY
Phu H. Nguyen
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Thomas M. Hess
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, DUAL CHANNEL,
BUS TRANSCEIVER, TTL INPUT/OUTPUT,
MONOLITHIC SILICON
08-07-01
AMSC N/A
REVISION LEVEL
C
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
5962-07242
1 OF 27
5962-E010-16
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part
or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
H
07242
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
V
X
X
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
Circuit function
01
UT63M143
Dual channel, bus transceiver, TTL input/output,
MIL-STD-1553 A/B compatible.
02
UT63M143
Dual channel, bus transceiver, TTL input/output,
MIL-STD-1760 compatible.
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Descriptive designator
See figure 1
See figure 1
Terminals
Package style
36
24
Dual in-line package
Dual flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
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REVISION LEVEL
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2
1.3 Absolute maximum ratings. 1/
Supply voltage range (VDD) ........................................................................................................... -0.3 V to +7.0 V
Input voltage range (Receiver) ..................................................................................................... +8.0 VP-P
Logic input voltage range ............................................................................................................. -0.3 V to VDD +0.3 V
Receiver common mode input voltage range .............................................................................. -5.0 V to +5.0 V
Maximum package power dissipation @ TC = 125°C .................................................................. 7.1 W 2/
Thermal impedance, junction to case (θJC): .................................................................................. 7.0 °C/W
Storage temperature range (TSTG) ................................................................................................ -65°C to 150°C
Maximum junction temperature (TJ) ............................................................................................. 175°C
1.4 Recommended operating conditions.
Supply voltage range ................................................................................................................... +3.15 V to 3.45 V
Logic input voltage range ............................................................................................................. 0 V to VDD
Receiver differential voltage @ RXIN & RXIN ............................................................................. 0.4 to 3.0 VPP,L-L
Receiver common mode voltage range ....................................................................................... ±4.0 V
Driver peak output current ........................................................................................................... 960 mA
Serial data rate ............................................................................................................................ 0.3 to 1.0 MHz
Driver typical output current ......................................................................................................... 600 mA
Case operating temperature range (TC) ........................................................................................ -55°C to 125°C
1.5 Radiation features.
Maximum total dose available (dose rate = 50 – 300 rads(Si)/s) ............................ ≥1 x 10 Rads(Si)
Single event phenomenon (SEP):
No SEU at effective LET (see 4.4.4.4): ................................................................ 3/
No SEL at effective LET (see 4.4.4.4):................................................................. ≤111 MeV/(mg/cm2)
Dose rate upset (20 ns pulse) ................................................................................... 5/
Dose rate survivability............................................................................................... 5/
Dose rate latch-up ................................................................................................... 5/
6
4/
________
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this
specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
2/
VDD = 3.45 V, TC = 125°C, PDMAX = (TJMAX – TCMAX)/θJC, per MIL-STD-883, method 1012, section 3.4.1. Applications that
dissipate more than the specified amount of power must reduce the case temperature to ensure the maximum junction
temperature is not violated.
3/
This device has no storage elements to upset.
4/
Limits are guaranteed by design or process, but not production tested unless specified by the customer through the
purchase order or contract.
5/
When characterized as a result of the procuring activities request, the condition will be specified.
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REVISION LEVEL
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3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883
MIL-STD-1553
MIL-STD-1760
MIL-STD-1835
-
Test Method Standard Microcircuits.
Digital time division command/response multiplex data bus.
Aircraft/Store Electrical Interconnector System.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103
MIL-HDBK-780
MIL-HDBK-1553
-
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
Multiplex Application handbook.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document form a part of this document to the extent specified herein. Unless
otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of Semiconductor Devices.
(Copies of this document is available online at http://www.astm.org/ or from ASTM International, P. O. Box C700, 100 Barr
Harbor Driver, West Conshohocken, PA 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.
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3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Transmit operating mode. The transmit operating mode shall be as specified on figure 3.
3.2.4 Block diagram. The block diagram shall be as specified on figure 4.
3.2.5 Typical transmitter and receiver waveforms. The typical transmitter and receiver waveforms shall be as specified on
figure 5.
3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 6.
3.2.7 Transceiver test circuit with load. The transceiver test circuit with load shall be as specified on figure 7-9.
3.2.8 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table IA and shall apply over the
full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of
product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent,
and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore
documentation shall be made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 89 (see MIL-PRF-38535, appendix A).
STANDARD
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DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
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SHEET
5
TABLE IA. Electrical performance characteristics. 1/
Test
Conditions
-55°C ≤ TC ≤ +125°C
3.15 V ≤ VDD ≤ 3.45 V
Device type: All
unless otherwise specified
Symbol
Low level input voltage
VIL
High level input voltage
VIH
Group A
subgroups
Pin: RXEN, TXIHB, TXIN, TXIN
M, D, P, L , R, F, G, H
II
Pin: RXEN, TXIHB, TXIN, TXIN
M, D, P, L , R, F, G, H
VIN = VDD or VSS
VOL
Pin: RXEN 2/,TXIHB, TXIN, TXIN
M, D, P, L , R, F, G, H
IOL = +4 mA
Input current
Low level output voltage
Limits
Unit
Min
1, 2, 3
Max
0.8
1
1, 2, 3
2.0
1
1, 2, 3
2.0
-10
1
1, 2, 3
-10
V
0.8
10
μA
10
0.55
V
Pin: RXOUT, RXOUT
M, D, P, L , R, F, G, H
High level output
voltage
VOH
IDD
Output capacitance
1
1, 2, 3
0.55
2.4
Pin: RXOUT, RXOUT
Supply current to Vdd
Input capacitance
IOH = -0.4 mA
4/
4/
CIN
COUT
M, D, P, L , R, F, G, H
0% duty cycle (non-transmitting)
1
1, 2, 3
2.4
25% duty cycle (f = 1 MHz)
1, 2, 3
200
50% duty cycle (f = 1 MHz)
1, 2, 3
387
87.5% duty cycle (f = 1 MHz)
1, 2, 3
670
100% duty cycle (f = 1 MHz) 3/
1, 2, 3
761
f = 1 MHz at 0 V, See 4.4.1.c
4
15
pF
Pin: RXEN, TXIHB, TXIN, TXIN
f = 1 MHz at 0 V, See 4.4.1.c
4
20
pF
V
14.5
mA
Pin: RXOUT, RXOUT
Common mode input
voltage 3/
Input threshold voltage
(no response)
VIC
VTH
Direct-coupled stub; see figure 8, point A.
input 1.2 VP-P, 200 ns rise/fall time ±25 ns,
f = 1 MHz
M, D, P, L , R, F, G, H
1,2,3
-5
5
1
-5
5
Transformer-coupled stub;
see figure 9, point A
input at f = 1 MHz, rise/fall time 200 ns at
1,23
0.20
1,2,3
0.28
(Receiver output 0 → 1 transition)
3/
Direct-coupled stub; see figure 8, point A.
input at f = 1 MHz, rise/fall time 200 ns at
(Receiver output 0 → 1 transition)
VPP,L-L
5/
See footnotes at end of table.
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REVISION LEVEL
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TABLE IA. Electrical performance characteristics - Continued. 1/
Test
Symbol
Input threshold voltage
(response)
VTH
Conditions
-55°C ≤ TC ≤ +125°C
3.15 V ≤ VDD ≤ 3.45 V
Device type: All
unless otherwise specified
Transformer-coupled stub; see figure 9, point A,
input at f = 1 MHz, rise/fall time 200 ns at
(Receiver output 0 → 1 transaction)
Direct-couple stub; see figure 8, point A
input at f = 1 MHz, rise/fall time 200 ns at
(Receiver output 0 → 1 transaction)
Common mode rejection
ratio 3/ 6/
Min
Max
0.86
14.0
1.20
20.0
VPP,L-L
1,23
3/
1,2,3
7/
5/
VO
3/
3/ 9/
Output noise voltage
differential
VNS
Output symmetry
VOS
Output voltage distortion
(overshoot or ring)
Pass/
Fail
1,2,3
MIL-STD-1553B
MIL-STD-1760
Unit
CMRR
Output voltage swing per:
MIL-STD-1553B 3/
MIL-STD-1553A
Limits
Group A
subgroups
VDIS
Terminal input impedance
3/
TIZ
Transformer-coupled stub, see figure 9, point A
input f = 1 MHz, RL = 70 Ω, device type 01
Direct-coupled stub, see figure 8, point A
input f = 1 MHz, RL = 35 Ω, device type 01
Transformer-coupled stub, see figure 9, point A
input f = 1 MHz, RL = 70 Ω, device type 01
Transformer-coupled stub, see figure 9, point A
input f = 1 MHz, RL = 70 Ω, device type 02
Transformer-coupled stub, see figure 9, point A,
input f = DC to 10 MHz, RL = 70 Ω
3/
Direct-coupled stub, see figure 8, point A;
input f = DC to 10 MHz, RL = 35 Ω 8/
Transformer-coupled stub, see figure 9, point A,
RL = 140 Ω, measurement taken 2.5 μs after end
of transmission 3/
Direct-coupled stub, see figure 8,point A;
RL = 35 Ω, measurement taken 2.5 μs after end
of transmission
10/
Transformer-coupled stub, see figure 9, point A
RL = 70 Ω
3/
Direct-coupled stub, see figure 8,Point A;
RL = 35 Ω
Transformed-coupled stub, see figure 9, point A;
input f = 75 KHz to 1 MHz,
(power on or power off; non-transmitting, RL
removed from circuit)
Direct-couple stub, see figure 8, point A;
input f = 75 KHz to 1 MHz
(power on or power off; non-transmitting, RL
removed from circuit)
1,2,3
18
27
6
9
6
20
20
27
VPP,L-L
14
1,2,3
mVRMSL-L
5
-250
+250
mVPP,
L-L
1,2,3
1,2,3
-90
+90
-900
+900
mVpeak,
L-L
-300
+300
1
1,2,3
kΩ
2
See footnotes at end of table.
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TABLE IA. Electrical performance characteristics - Continued. 1/
Test
Symbol
Transmitter output rise/fall time
tR, tF
Conditions
-55°C ≤ TC ≤ +125°C
3.15 V ≤ VDD ≤ 3.45 V
Device type: All
unless otherwise specified
Input f = 1 MHz 50% duty cycle:
direct-couple RL = 35 Ω output at 10%
Group A
subgroups
9,10,11
Limits
Unit
Min
Max
100
300
ns
through 90% points TXOUT, TXOUT
See figure 6.
RXOUT delay
tRXDD
RXOUT to RXOUT , see figure 5.
-200
200
TXIN skew 11/
tTXDD
TXIN to TXIN , see figure 5.
Direct-couple stub; input f = 1 MHz,
3 VPP (skew INPUT ±150 ns),
rise/fall time 200 ns, see figure 6
-25
25
-150
150
-25
25
Zero crossing distortion
5/
tRZCD
Zero crossing stability
tTZCS
Input TXIN and TXIN should create
transmitter output zero crossing at 500
ns, 1000 ns, 1500 ns, and 2000 ns.
These zero crossing should not deviate
more than ±25 ns. See figure 6.
Transmitter off; delay from
inhibit active
12/
tDXOFF
TXIN and TXIN toggling @ 1 MHz;
TXIHB transitions from logic zero to one,
see figure 6.
100
Transmitter on; delay from
inhibit active 13/
tDXON
TXIN and TXIN toggling @ 1 MHz;
TXIHB transitions from logic one to zero,
see figure 6.
See figure 6.
150
Receiver off time
Receiver on time
Receiver propagation delay
Transmitter propagation delay
1/
2/
3/
4/
5/
6/
7/
8/
9/
10/
11/
12/
13/
tRCVOFF
tRCVON
tRCVPD
tXMITPD
50
50
450
200
Device supplied to this drawing have been characterized through all levels M, D, P, L, R, F, G and H of irradiation.
However, this device only tested at the ‘H’ level. Pre and Post irradiation values are identical unless otherwise specified in
Table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25°C.
RXEN has ~1.2 μA pull up.
Guaranteed by design but not tested.
Guaranteed by device characterization. Capacitance is measured only for initial qualification and after any process or
design changes which may affect input or output capacitance.
Tested functionally.
Pass/fail criteria per the test method described in MIL-HDBK-1553 Appendix A, RT Validation test plan, section 5.1.2.2,
Common Mode Rejection.
Upper limit guaranteed by design but not tested.
Guaranteed by device characterization.
For MIL-STD-1760, Output voltage swing (VO) = 20 VP-P, L-L min.
Test in accordance with method described in MIL-STD-1553B output symmetry, section 4.5.2.1.1.4.
Supplied as a design limit but not guaranteed or tested.
Delay time from transmit inhibit (1.5 V) rising to transmit off (280 mV).
Delay time from not transmit inhibit (1.5 V) falling to transmit on (1.2 V).
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TABLE IB. SEP test limits. 1/ 2/
Device
type
VDD = 3.15 V
Effective LET
no upsets
2
[MeV/(mg/cm )]
Maximum device
cross section
(cm2)
5/
5/
All
1/
Bias for latch-up
test VDD = 3.45 V
no latch-up LET = 3/
[MeV/(mg/cm2)]
≤111
2/
Devices that contain cross coupled resistance must be tested at the
maximum rated TA. For SEP test conditions, see 4.4.4.4 herein.
Technology characterization and model verification supplemented by in-line
data may be used in lieu of end-of-line testing. Test plan must be approved
by TRB and qualifying activity.
3/
Worst case temperature tested for latch up TA = +125°C.
4/
5/
Worst case temperature tested for upset TA = 25°C ±10°C.
This device has no memory storage elements to upset.
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Case X
Symbol
A
b
c
D
e
Inches
Min
Max
.155
.014
.023
.008
.015
1.890
.100 BSC
Millimeters
Min
Max
3.94
0.36
0.58
0.20
0.38
48.00
2.54
Symbol
E
E1
S
L
Inches
Min
Max
.570
.610
.590
.620
.005
.150
Millimeters
Min
Max
14.48
15.49
14.99
15.75
0.13
3.81
Notes:
1. Package material: opaque ceramic.
2. It is recommended that package ceramic be mounted on a heat removal rail in the printed circuit board. A thermally
conductive material should be used.
FIGURE 1. Case outline.
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Case Y
Symbol
Inches
Max
0.095
0.014
0.018
0.006
0.009
0.790
0.810
.050 BSC
0.580
.600
.400
0.063
0.077
Min
A
b
c
D
e
E
L
Q
Millimeters
Min
Max
2.41
0.36
0.46
0.15
0.23
20.07
20.57
1.27 BSC
14.73
15.24
10.16
1.60
1.96
Notes:
3. Package material: opaque ceramic.
4. It is recommended that package ceramic be mounted on a heat removal rail in the printed circuit board. A thermally
conductive material should be used.
FIGURE 1. Case outline - Continued.
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Case X
Terminal
number
1
Terminal
name
TXOUT
Terminal
number
36
2
TXOUT
35
3
4
5
6
7
GND
NC
RXOUT
RXEN
GND
34
33
32
31
30
8
CHANNEL A
Terminal
name
TXIN
TXIN
TXIHB
VDD
NC
GND
RXIN
RXIN
RXOUT
29
9
NC
28
NC
10
TXOUT
27
11
TXOUT
26
TXIN
TXIN
12
13
14
15
16
GND
NC
RXOUT
RXEN
GND
25
24
23
22
21
17
RXOUT
20
RXIN
RXIN
18
NC
19
NC
Terminal
number
1
Terminal
name
CHA
Terminal
number
24
Terminal
name
2
CHA
23
TXIN
TXIN
3
4
5
6
GND
RXOUT
RXEN
RXOUT
22
21
20
19
TXIHB
GND
VDD
GND
7
CHB
18
8
CHB
17
TXIN
TXIN
9
10
11
12
GND
RXOUT
RXEN
16
15
14
13
TXIHB
GND
VDD
GND
CHANNEL B
TXIHB
VDD
NC
GND
Case Y
CHANNEL A
CHANNEL B
RXOUT
Note:
1. The 24 lead flatpack (case Y) internally connects TXOUT TO RXIN (CHA, CHB) and
TXOUT to RXIN ( CHA , CHB ) for each channel.
FIGURE 2. Terminal connections.
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TXIN
TXIN
TXIHB
TXOUT
X
L
L
H
H
X
L
H
L
H
H
X
L
L
X
OFF 1/
OFF 2/
ON
ON
OFF 2/
Notes:
H = High
L = Low
X = Irrelevant.
1. Transmitter output terminals are in the non-transmitting mode
during OFF time.
2. Transmitter output terminals are in the non-transmitting mode
during OFF time, independent of TXIHB status.
FIGURE 3. Transmit operating mode.
FIGURE 4. Block diagram.
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FIGURE 5. Typical transmitter and receiver waveforms.
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FIGURE 6. Switching waveforms and test circuit.
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FIGURE 6. Switching waveforms and test circuit – Continued.
Notes:
1. Direct coupled stub: Terminal is defined as transceiver plus isolation transformer and fault resistor. Point A is
defined in figure 8
2. Transformer Coupled stub: Terminal is defined as transceiver plus isolation transformer. Point A is defined in
figure 9.
FIGURE 7. Transceiver test with load.
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Notes:
1. TP = test point.
2. RL removed for terminal input impedance test.
3. TXOUT and RXIN tied together. TXOUT AND RXIN tied together.
FIGURE 8. Transceiver test with load.
Notes:
1. TP = test point.
2. RL removed for terminal input impedance test.
3. TXOUT and RXIN tied together. TXOUT and RXIN tied together.
FIGURE 9. Transceiver test with load.
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4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device.
c.
Subgroup 4 (CIN and COUT) shall be measured only for initial qualification and after process or design changes which
may affect capacitance. CIN and COUT shall be measured between the designated terminal and VSS at a frequency of 1
MHz. A minimum sample size of five devices with zero rejects shall be required.
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TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-STD-883, method 5005, table I)
Device
class M
1, 7, 9
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
Device
class Q
class V
1, 7, 9
1, 7, 9
1, 2, 3, 7, 8,
9, 10, 11
1/
1, 2, 3, 7, 8,
9, 10, 11
1/
1, 2, 3, 7, 8,
9, 10, 11
2/ 3/
Group A test
requirements (see 4.4)
1, 2, 3, 4, 7,
8, 9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
Group C end-point electrical
parameters (see 4.4)
1, 2, 3, 7, 8
1, 2, 3, 7, 8
1, 2, 3, 7, 8
3/
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
1, 2, 7, 8A
1, 2, 7, 8A
1, 2, 7, 8A
1, 7, 9
1, 7, 9
1, 7, 9
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1, 7 and deltas.
3/ Delta limits, as specified in table IIB herein, shall be required where specified, and the delta values
shall be completed with reference to the zero hour electrical parameter.
TABLE IIB. Burn-in and operating life test, delta parameters (+25°C).
Parameter 1/
Supply current
1/
Symbol
IDD
Condition
TA = 25°C
0% duty cycle
Limits
± 10% of measured value, or 300 μA
whichever is greater
The above parameters shall be recorded before and after the required burn-in and life tests to
determine the delta.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883.
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4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at
TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein.
c.
When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883, test
method 1019 condition A, and as specified herein.
4.4.4.1.1 Accelerated annealing test. Accelerated annealing testing shall be performed on all devices requiring a RHA level
greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall
be the pre-irradiation end-point electrical parameter limits at 25°C ±5°C. Testing shall be performed at initial qualification and
after any design or process changes which may affect the RHA response of the device.
4.4.4.2 Dose rate induced latch-up testing. When required by the customer, dose rate induced latch-up testing shall be
performed in accordance with test method 1020 of MIL-STD-883 and as specified herein (see 1.5 herein). Tests shall be
performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes
which may affect the RHA capability of the process.
4.4.4.3 Dose rate upset testing. When required by the customer, dose rate upset testing shall be performed in accordance
with test method 1021 of MIL-STD-883.
a. Transient dose rate upset testing for class M devices shall be performed at initial qualification and after any design or
process changes which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless
otherwise specified.
b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535. Device parametric parameters that influence upset immunity
shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-PRF-38535.
4.4.4.4 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed
on class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latch-up characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive
0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects are allowed.
b.
7
2
The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
c.
The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be ≥ 20 micron in silicon.
e.
The upset test temperature shall be +25°C. The latch-up test temperature shall be at the maximum rated operating
temperature ±10°C.
f.
Bias conditions shall be defined by the manufacturer for the latch-up measurements.
g.
For SEP test limits, see table IB herein.
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4.5 Methods of inspection. Methods of inspection shall be specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit VSS terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime, Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime Columbus will
maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of
drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DLA Land and Maritime-VA.
6.7 Additional information. When specified in the purchase order or contract, a copy of the following additional data shall be
supplied.
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEP).
d. Number of transients (SEP).
e. Occurrence of latch-up (SEP).
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using
chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of
military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number
(PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962
H
07242
Federal
stock class
designator
\
RHA
designator
(see A.1.2.1)
/
01
V
9
A
Device
type
(see A.1.2.2)
Device
class
designator
(see A.1.2.3)
Die
code
Die
details
(see A.1.2.4)
\/
Drawing number
A.1.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A
dash (-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
Generic number
Circuit function
01
UT63M143
Dual channel, bus transceiver, TTL input/output,
MIL-STD-1553 A/B compatible.
02
UT63M143
Dual channel, bus transceiver, TTL input/output,
MIL-STD-1760 compatible.
A.1.2.3 Device class designator.
Device class
Q or V
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding
pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product
and variant supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type
Figure number
01
02
A-1
A-1
A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type
Figure number
01
02
A-1
A-1
A.1.2.4.3 Interface materials.
Die type
Figure number
01
02
A-1
A-1
A.1.2.4.4 Assembly related information.
Die type
Figure number
01
02
A-1
A-1
A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specifications, standards, and handbooks. The following specification, standards, and handbooks form
a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those
cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARD
MIL-STD-883 - Test Method Standard Microcircuits.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figure A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1
A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein.
A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.6 herein.
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this
document.
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed
in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of
compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this appendix shall
affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the
requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM
plan shall not affect the form, fit, or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum, it shall consist of:
a.
Wafer lot acceptance for Class V product using the criteria defined in MIL-STD-883, method 5007.
b.
100% wafer probe (see paragraph A.3.4 herein).
c.
100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the
alternate procedures allowed in MIL-STD-883, method 5004.
A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4 herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and
logistics purposes.
A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime-VA, P.O. Box 3990, Columbus,
Ohio, 43218-3990 or telephone (614) 692-0547.
A.6.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and MaritimeVA and have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-07242
A
REVISION LEVEL
C
SHEET
25
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
Note: Pad numbers reflect terminal numbers when placed in case outlines X and Y (see figure 1).
FIGURE A-1. Die bonding pad locations and electrical functions.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-07242
A
REVISION LEVEL
C
SHEET
26
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-07242
Die physical dimensions.
Die size:
169 x 188 mils.
Die thickness:
17.5 ±1 mils
Interface materials.
Top metallization:
Thickness:
Si Al Cu
9.0 k Ĺ – 12.5 k Ĺ
Backside metallization:
None
Glassivation.
Type:
Thickness:
PSG with Nitride
9.0 k Ĺ – 11.0 k Ĺ
Substrate:
VSS
Assembly related information.
Substrate potential: Connect die attach pad to the VSS.
Special assembly instructions: TXOUT and TXOUT bond out must be matched within 10 mΩ and
have low resistance of less than 250 mΩ. VDD bond out on bond pads 1, 2, 3, and 22, 23, 24
must be within 10 mΩ and low resistance of less than 250 mΩ
FIGURE A-1. Die bonding pad locations and electrical functions-Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-07242
A
REVISION LEVEL
C
SHEET
27
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 15-10-07
Approved sources of supply for SMD 5962-07242 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime-VA
maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-0724201Q9A
65342
UT63M143-Q DIE
5962-0724201QXA
65342
UT63M143-BQA
5962-0724201QXC
65342
UT63M143-BQC
5962-0724201QYA
65342
UT63M143-CQA
5962-0724201QYC
65342
UT63M143-CQC
UT63M143-V DIE
5962-0724201V9A
65342
5962-0724201VXA
65342
UT63M143-BVA
5962-0724201VXC
65342
UT63M143-BVC
5962-0724201VYA
65342
UT63M143-CVA
5962-0724201VYC
65342
UT63M143-CVC
5962-0724202Q9A
65342
UT63M143-Q DIE
5962-0724202QXA
65342
UT63M143-BQA
5962-0724202QXC
65342
UT63M143-BQC
5962-0724202QYA
65342
UT63M143-CQA
5962-0724202QYC
65342
UT63M143-CQC
5962-0724202V9A
65342
UT63M143-V DIE
5962-0724202VXA
65342
UT63M143-BVA
5962-0724202VXC
65342
UT63M143-BVC
5962-0724202VYA
65342
UT63M143-CVA
5962-0724202VYC
65342
UT63M143-CVC
5962H0724201Q9A
65342
UT63M143-Q DIE
5962H0724201QXA
65342
UT63M143-BQA
5962H0724201QXC
65342
UT63M143-BQC
5962H0724201QYA
65342
UT63M143-CQA
5962H0724201QYC
65342
UT63M143-CQC
5962H0724201V9A
65342
UT63M143-V DIE
5962H0724201VXA
65342
UT63M143-BVA
5962H0724201VXC
65342
UT63M143-BVC
5962H0724201VYA
65342
UT63M143-CVA
5962H0724201VYC
65342
UT63M143-CVC
5962H0724202Q9A
65342
UT63M143-Q DIE
5962H0724202QXA
65342
UT63M143-BQA
5962H0724202QXC
65342
UT63M143-BQC
5962H0724202QYA
65342
UT63M143-CQA
5962H0724202QYC
65342
UT63M143-CQC
See footnotes at end of table
STANDARD MICROCIRCUIT DRAWING BULLETIN-Continue
DATE: 15-10-07
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962H0724202V9A
65342
UT63M143-V DIE
5962H0724202VXA
65342
UT63M143-BVA
5962H0724202VXC
65342
UT63M143-BVC
5962H0724202VYA
65342
UT63M143-CVA
5962H0724202VYC
65342
UT63M143-CVC
1/
The lead finish shown for each PIN representing a hermetic package is the
most readily available from the manufacturer listed for that part. If the desired
lead finish is not listed contact the vendor to determine its availability.
2/
Caution. Do not use this number for item acquisition. Items acquired to this
number may not satisfy the performance requirements of this drawing.
Vendor CAGE
number
65342
Vendor name
and address
Aeroflex Colorado Springs, Inc.
4350 Centennial Boulevard
Colorado Springs, CO 80907-3486
The information contained herein is disseminated for convenience only and the Government
assumes no liability whatsoever for any inaccuracies in the information bulletin.