Satellite-Video IC TDA 6151-5 TDA 6151-5X Preliminary Data Bipolar IC Features ● Adjustable gain for different FM deviations ● Video buffer and special baseband output for the sound processor SDA 6102-5X are available ● Clamping circuit for elimination of "Energy Dispersal" signal ● Built-in video switch for external applied video signal ● Application in satellite receiving systems. P-DIP-20-1 P-DSO-20-1 Type Ordering Code Package TDA 6151-5 Q67000-A5175 P-DIP-20-1 TDA 6151-5X Q67000-A5074 P-DSO-20-1 (SMD) The video circuit for a satellite application consists of a voltage controlled AGC-amplifier, driver for two external de-emphasis networks, followed by a three-stage switch. An additional baseband output is available via a driver. The output signal of the video switch is applied to a video clamping circuit, this clamping circuit removes the energy dispersal signal from the video signal. The clamped signal is applied via a video switch to the SCART-output. Circuit Description The demodulated FM-satellite video signal is fed via a buffer amplifier to a gain controlled amplifier. The gain control is done using an external applied DC-voltage. The output signal of this amplifier is used to drive three separate signal pathes. First of all the baseband is fed via a high pass filter with a cut off frequency of approx. 4 MHz to the input of a SAT-TV-sound processor, e.g. TDA 6160 X. A second output with a buffer amplifier is used to drive two external de-emphasis networks. After passing through the de-emphasis networks the baseband signals are fed into two inputs of the deSemiconductor Group 1 04.95 TDA 6151-5 TDA 6151-5X emphasis selector switch. The third output of the gain controlled amplifier has a direct connection to the de-emphasis selector switch. This allows the selection of the sufficient frequency response of the de-emphasis network or a linear frequency response by passing the de-emphasis networks. The output signal of the de-emphasis selector switch is fed separately via two driver amplifiers to the baseband 1 output and to the baseband 2 output. This baseband 2 output is fed via an external low pass filter to the input of the energy dispersal clamping circuit. This circuit removes the energy dispersal signal from the baseband signal. The clamping circuit can be operated with an internally generated clamping signal or a clamp pulse applied to the IC from an external source. The internal generated clamping pulse can only be used if the incoming baseband signal is a standard CVBS-signal. The clamping pulse is then located in the H-sync pulse period. The impulse width is approx. 2 µs. The external clamping pulse must be active low. The timing of the pulse is not critical. The clamping level used in conjunction with the video signal can be selected according to the operation mode (CVBS- or MAC-mode). The clamping level differs by 1 V. The baseband output (pin 16) and CVBS-output (pin 14) require 75 Ω line drivers implemented as internal drivers followed by a PNP-emitter follower. Pin Configuration (top view) P-DIP-20 Semiconductor Group P-DSO-20 2 TDA 6151-5 TDA 6151-5X Pin Definitions and Functions Pin No. Symbol Function 1 CVBS CVBS-output (controlled) 2 PATH De-emphasis select 3 PATH 2 De-emphasis 2 input 4 GND Ground 5 PATH 1 De-emphasis 1 input 6 H-SEP Sync separator 7 BASEB 2 Baseband output 2 8 LEVSEL Clamping level select 9 BASE IN Baseband input 10 EXSEL Int./ext. clamping select 11 EXTKEY Ext. key pulse input 12 VIDEO IN Ext. video input 13 AVSEL AV select 14 VIDEO OUT Video output 15 VS Supply voltage 16 BASE B1 Baseband output 1 17 GND Ground 18 SOUND Sound output 19 GAIN GAIN adjust 20 CVBS IN CVBS-input Semiconductor Group 3 TDA 6151-5 TDA 6151-5X Block Diagram Semiconductor Group 4 TDA 6151-5 TDA 6151-5X Pin Functions CVBS (Pin 1) SOUND (Pin 18) GAIN (Pin 19) CVBS IN (Pin 20) Semiconductor Group 5 TDA 6151-5 TDA 6151-5X VIDEO IN (Pin 12) VIDEO OUT, BASEB1 (Pin 14, 16) AVSEL (Pin 13) EXTKEY (Pin 11) Semiconductor Group 6 TDA 6151-5 TDA 6151-5X BASE IN (Pin 9) H-SEP (Pin 6) Semiconductor Group BASEB2 (Pin 7) 7 TDA 6151-5 TDA 6151-5X PATH1/PATH2 (Pin 5, 3) LEVSEL (pin 8), EXSEL (Pin 10) Semiconductor Group PATH (Pin 2) 8 TDA 6151-5 TDA 6151-5X Absolute Maximum Ratings TA = 0 to 70 °C All voltage are referred to ground, unless stated otherwise. All currents are designated by the source and sink principle, i.e. if the device pin has to be regarded as a sink (the current flows in the started pin to the internal ground), it has a negative prefix; if the device pin is the source on the other hand (the current flows from VS across the stated pin), it has a positive prefix. Parameter Symbol Limit Values Supply voltage V15 0 15 V Buffer output current (de-emphasis) I1 –3 5 mA min. Unit max. Voltage on sound IF output V18 16 V Video buffer output currents I14, 16 –3 5 mA Setting voltages for gain adjust V2, 19 0 6 V Switching voltages for video switch V13 0 6 V Junction temperature Tj 150 °C Storage temperature Tstg Thermal resistance system air Rth SA – 40 125 °C 65/77* K/W Operating Range Supply voltage V15 10.8 13.2 V Input frequency range f20 10 Hz** 15 MHz Frequency range of sound IF output coupling stage f18 4 10 MHz 3 -dB band width of baseband output B16 10 Ambient temperature in operation TA 0 * SMD Package ** Depending on the used coupling capacitors Semiconductor Group 9 MHz 70 °C TDA 6151-5 TDA 6151-5X DC-Characteristics TA = 25 °C; VS = 12 V Parameter Symbol Limit Values Unit min. typ. max. Current consumption I15 26 38 50 mA Input voltage V20 3 3.3 3.6 V Test Condition Input current I20 3.5 5 6.5 µA ∆V20 = 0,15 V Output voltage of de-emphasis buffer V1 3.75 4.15 4.55 V V20 = 0 VPP Quiescent current of de-emphasis output I1 – 2.5 – 3.7 – 4.8 mA V1 = V1 + 350 mV Resistive load of de-emphasis output R1/4 1.5 Sound IF output current I18 350 Input current on de-emphasis inputs I3,5 Output voltages of baseband buffer V16 Quiescent current of baseband buffer kΩ µA V18 = 12 V ±5 µA ∆V3,5 = ± 0.15 V VS – 3.9 VS VS – 3.25 – 2.6 V V19 = 5 V, V20 = 0 VPP, V3,5 = V1 I16 – 2.5 – 3.2 – 4.2 mA V16 = V16 + 350 mV Output voltage at low pass output V7 3.35 4.15 4.95 V V19 = 0 V, V20 = 0 VPP, V3,5 = V1 Quiescent current at low pass output I7 – 2.3 – 3.0 – 3.9 mA V7 = V7 + 350 mV Resistive load of low pass output R7/4 1.5 500 650 kΩ Input current of clamping circuit I9 3.5 6 10 µA V9 = 3 V, 5 V > V8 > 2 V Output voltage of video buffer V14 VS – 3.9 VS – 3.2 VS – 2.5 V 5 V > V13 > 2 V, V12 = 0 VPP Quiescent current of video buffer I14 – 2.0 – 2.7 – 3.4 mA V14 = 12 V 0.4 1 µA 5 V 25 3 dB dB Input current ext. CVBS-input I12 0.13 Setting voltage for deviation V19 0 Gain Gain (see diagram) V1/20 V1/20 17 0 Semiconductor Group 21 1.5 10 V19 = 0 V, V19 = 5 V TDA 6151-5 TDA 6151-5X DC-Characteristics (cont’d) Parameter Switching level for de-emphasis L = de-emphasis 2 M (or open) = de-emphasis 1 H = linear Symbol Limit Values typ. max. 0 2.3 4.0 2.8 1 3.3 5 V V V 1 5 V V – 100 330 µA µA 0 1 V 2 5 V 0 1 V 2 5 V V2 Switching level for video switch V13 L = RF-mode H (or open) = external 0 2 Input current of the switches H L I2,13,8,10 – 300 100 Switching level for setting the clamping level L = high level (Mac operation) H (or open) = low clamping level (CVBS operation) V8 Switching level for setting the clamping mode L = external clamping (Mac operation) H (or open) = internal (CVBSoperation) V10 Semiconductor Group Unit min. 11 – 200 200 Test Condition TDA 6151-5 TDA 6151-5X AC-Characteristics TA = 25 °C; VS = 12 V Parameter Symbol Limit Values Input voltage range V20 0.2 Input impedance R20 22 Sound IF-output frequency range (– 3 dB) f18 4 MHz V20 = 1 V, R18/15 = 200 Ω Sound IF-output upper frequency limit (– 3 dB) f18 10 MHz V20 = 1 V, R18/15 = 200 Ω Output voltage V18 30 mVPP TT20 = 130 mVPP R18/15 = 200 Ω G1/18 – 17 – 26 – 80 dB dB dB R18/15 = 200 Ω Output voltage of de-emphasis buffer V1 2 VPP V20 = 1 VPP V19 = 4,4 V Output voltage of baseband buffer V16 2 VPP V7 = 3 VPP Output voltage V7 3 VPP V1 = 2.4 VPP Gain V7/3;5 14 dB Gain V16/3;5 10 dB Gain V7/1 2 dB linear path (de-emphasis) Suppression of the energy dispersal signal EDR dB V20 = 1 VPP measured at the synch pulse VPP V9 = 2 VPP min. Gain 10 MHz 4 MHz 400 kHz typ. max. 1 VPP 31 42 kΩ 46 Output voltage video buffer V14 2 Gain AV-input video buffer V14/12 2 Gain (clamping input video buffer) V14/9 0 External clamping pulse L = active H (or open) = inactive Semiconductor Group 0 2 12 Unit Test Condition V12 = 1 VPP dB 1 5 V V V9 = 1 VPP (without triangular signal) TDA 6151-5 TDA 6151-5X Test Circuit Semiconductor Group 13 TDA 6151-5 TDA 6151-5X Application Circuit Semiconductor Group 14 TDA 6151-5 TDA 6151-5X Semiconductor Group 15