SAF7167AHW YUV-to-RGB digital-to-analog converter Rev. 01 — 29 June 2004 Product data sheet 1. General description The SAF7167AHW is a mixed-mode designed IC containing a video data path, keying control block, analog mixer, and a voltage output amplifier, capable of converting digital video data to analog RGB video, and then mixing video and external analog RGB inputs. The video data path contains a data re-formatter, YUV-to-RGB colour space matrix as well as triple DACs for video data processing. An analog mixer performs multiplexing between DAC outputs of the video path and external analog RGB inputs. The final analog outputs are buffered with built-in voltage output amplifiers to provide the direct driving capability for a 150 Ω load. See the overall block diagram. The operation of SAF7167AHW is controlled via the I2C-bus. 2. Features ■ ■ ■ ■ ■ ■ ■ On-chip mixing of digital video data and analog RGB signals Supports video input format of YUV 4 : 2 : 2, 4 : 1 : 1, 2 : 1 : 1 and RGB 5 : 6 : 5 Video input rate up to 66 MHz Allows for both binary and twos complement video input data Triple 8-bit DACs for video output Built-in voltage output amplifier Provides keying control with external key and internal 8-bit, 2 × 8-bit and 3 × 8-bit pixel colour key ■ Programmable via the I2C-bus ■ 5 V CMOS device; HTQFP48 package. 3. Quick reference data Table 1: Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDDD digital supply voltage 4.75 5.0 5.25 V VDDA analog supply voltage 4.75 5.0 5.25 V Tamb ambient temperature −40 - +85 °C SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 4. Ordering information Table 2: Ordering information Type number Package SAF7167AHW Name Description Version HTQFP48 plastic thermal enhanced thin quad flat package; 48 leads; body 7 × 7 × 1 mm; exposed die pad SOT545-1 5. Block diagram VDDD VSSD 7 YUV[7:0] UV[7:0] HREF SDA SCL RES_N 8 VSSA2 VDDA2 26 B_IN R_IN G_IN C_REF(H) VSSA1 VDDA1 27 35 34 36 29 31 33 MIXER OPAMP MIXER OPAMP MIXER OPAMP 32 R_OUT 38 to 45 8 46 to 48, 1 to 5 8 REFORMATTER YUVTORGB MATRIX 8-BIT DAC (3×) MUX 30 G_OUT 9 22 23 24 I 2 C-BUS CONTROL SAF7167AHW CLOCK GENERATOR 28 B_OUT KEYING CONTROL 8 11 12 25, 37 6 10 21 13 to 20 001aaa390 AP SP n.c. VCLK PCLK EXTKEY P[7:0] Fig 1. Block diagram. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 2 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 6. Pinning information 37 n.c. 38 YUV[7] 39 YUV[6] 40 YUV[5] 41 YUV[4] 42 YUV[3] 43 YUV[2] 44 YUV[1] 45 YUV[0] 46 UV[7] 47 UV[6] 48 UV[5] 6.1 Pinning UV[4] 1 36 C_REF(H) UV[3] 2 35 VDDA1 UV[2] 3 34 VSSA1 UV[1] 4 33 R_IN UV[0] 5 32 R_OUT VCLK 6 VDDD 7 VSSD 8 29 B_IN HREF 9 28 B_OUT 31 G_IN SAF7167AHW 30 G_OUT RES_N 24 SCL 23 SDA 22 EXTKEY 21 P[0] 20 P[1] 19 P[2] 18 P[3] 17 P[4] 16 25 n.c. P[5] 15 26 VSSA2 SP 12 P[6] 14 27 VDDA2 AP 11 P[7] 13 PCLK 10 001aaa391 Fig 2. Pin configuration. 6.2 Pin description Table 3: Pin description Symbol Pin Type [1] Description UV[4] 1 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[3] 2 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[2] 3 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[1] 4 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[0] 5 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data VCLK 6 I video clock input VDDD 7 S digital supply voltage VSSD 8 S digital ground HREF 9 I horizontal reference input signal PCLK 10 I pixel clock input AP 11 I test pin, normally connected to ground SP 12 I test pin, normally connected to ground 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 3 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 3: Pin description …continued Symbol Pin Type [1] Description P[7] 13 I pixel bus input 7 (for keying control) P[6] 14 I pixel bus input 6 (for keying control) P[5] 15 I pixel bus input 5 (for keying control) P[4] 16 I pixel bus input 4 (for keying control) P[3] 17 I pixel bus input 3 (for keying control) P[2] 18 I pixel bus input 2 (for keying control) P[1] 19 I pixel bus input 1 (for keying control) P[0] 20 I pixel bus input 0 (for keying control) EXTKEY 21 I external key signal input SDA 22 I/O I2C-bus data line SCL 23 I I2C-bus clock line RES_N 24 I resetting the I2C-bus (active LOW) n.c. 25 - not connected VSSA2 26 S analog ground 2 VDDA2 27 S analog supply voltage 2 B_OUT 28 O analog blue signal output B_IN 29 I analog blue signal input G_OUT 30 O analog green signal output G_IN 31 I analog green signal input R_OUT 32 O analog red signal output R_IN 33 I analog red signal input VSSA1 34 S analog ground 1 VDDA1 35 S analog supply voltage 1 C_REF(H) 36 S de-coupling capacitor for internal reference voltage (2.25 V) n.c. 37 - not connected YUV[7] 38 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[6] 39 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[5] 40 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[4] 41 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[3] 42 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[2] 43 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[1] 44 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data YUV[0] 45 I digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 4 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 3: Pin description …continued Symbol Pin Type [1] Description UV[7] 46 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[6] 47 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data UV[5] 48 I digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R input data [1] I = input; I/O = input or output; O = output; S = supply. 7. Functional description The SAF7167AHW contains a video data path, 3 analog mixers and voltage output amplifiers for the RGB channels respectively, a keying control block as well as an I2C-bus control block. 7.1 Video data path The video data path includes a video data re-formatter, a YUV-to-RGB colour space conversion matrix, and triple 8-bit DACs. 7.1.1 Re-formatter The re-formatter de-multiplexes the different video formats YUV 4 : 1 : 1, 4 : 2 : 2 or 2 : 1 : 1 to internal YUV 4 : 4 : 4, which can then be processed by the RGB matrix. The pixel byte sequences of those video input formats are shown in Table 4 to Table 7. Table 4: Pixel byte sequence of 4 : 2 : 2 Input Pixel byte sequence of 4 : 2 : 2 YUV0 (LSB) Y0 Y0 Y0 Y0 Y0 Y0 YUV1 Y1 Y1 Y1 Y1 Y1 Y1 YUV2 Y2 Y2 Y2 Y2 Y2 Y2 YUV3 Y3 Y3 Y3 Y3 Y3 Y3 YUV4 Y4 Y4 Y4 Y4 Y4 Y4 YUV5 Y5 Y5 Y5 Y5 Y5 Y5 YUV6 Y6 Y6 Y6 Y6 Y6 Y6 YUV7 (MSB) Y7 Y7 Y7 Y7 Y7 Y7 UV0 (LSB) U0 V0 U0 V0 U0 V0 UV1 U1 V1 U1 V1 U1 V1 UV2 U2 V2 U2 V2 U2 V2 UV3 U3 V3 U3 V3 U3 V3 UV4 U4 V4 U4 V4 U4 V4 UV5 U5 V5 U5 V5 U5 V5 UV6 U6 V6 U6 V6 U6 V6 UV7 (MSB) U7 V7 U7 V7 U7 V7 Y data 0 1 2 3 4 5 UV data 0 0 2 2 4 4 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 5 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 5: Pixel byte sequence of 4 : 1 : 1 Input Pixel byte sequence of 4 : 1 : 1 YUV0 Y0 Y0 Y0 Y0 Y0 Y0 Y0 Y0 YUV1 Y1 Y1 Y1 Y1 Y1 Y1 Y1 Y1 YUV2 Y2 Y2 Y2 Y2 Y2 Y2 Y2 Y2 YUV3 Y3 Y3 Y3 Y3 Y3 Y3 Y3 Y3 YUV4 Y4 Y4 Y4 Y4 Y4 Y4 Y4 Y4 YUV5 Y5 Y5 Y5 Y5 Y5 Y5 Y5 Y5 YUV6 Y6 Y6 Y6 Y6 Y6 Y6 Y6 Y6 YUV7 Y7 Y7 Y7 Y7 Y7 Y7 Y7 Y7 UV0 X X X X X X X X UV1 X X X X X X X X UV2 X X X X X X X X UV3 X X X X X X X X UV4 V6 V4 V2 V0 V6 V4 V2 V0 UV5 V7 V5 V3 V1 V7 V5 V3 V1 UV6 U6 U4 U2 U0 U6 U4 U2 U0 UV7 U7 U5 U3 U1 U7 U5 U3 U1 Y data 0 1 2 3 4 5 6 7 UV data 0 0 0 0 4 4 4 4 Table 6: Pixel byte sequence of 2 : 1 : 1 Input Pixel byte sequence of 2 : 1 : 1 YUV0 U0 Y0 V0 Y0 U0 Y0 V0 Y0 YUV1 U1 Y1 V1 Y1 U1 Y1 V1 Y1 YUV2 U2 Y2 V2 Y2 U2 Y2 V2 Y2 YUV3 U3 Y3 V3 Y3 U3 Y3 V3 Y3 YUV4 U4 Y4 V4 Y4 U4 Y4 V4 Y4 YUV5 U5 Y5 V5 Y5 U5 Y5 V5 Y5 YUV6 U6 Y6 V6 Y6 U6 Y6 V6 Y6 YUV7 U7 Y7 V7 Y7 U7 Y7 V7 Y7 Y data X 0 X 2 X 4 X 6 UV data 0 X 0 X 4 X 4 X Table 7: Pixel byte sequence of 5 : 6 : 5 Input Pixel byte sequence of RGB 5 : 6 : 5 UV7 G0 G0 G0 G0 UV6 R4 R4 R4 R4 UV5 R3 R3 R3 R3 UV4 R2 R2 R2 R2 UV3 R1 R1 R1 R1 UV2 R0 R0 R0 R0 UV1 G5 G5 G5 G5 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 6 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 7: Pixel byte sequence of 5 : 6 : 5 …continued Input Pixel byte sequence of RGB 5 : 6 : 5 UV0 G4 G4 G4 G4 YUV7 G3 G3 G3 G3 YUV6 G2 G2 G2 G2 YUV5 G1 G1 G1 G1 YUV4 B4 B4 B4 B4 YUV3 B3 B3 B3 B3 YUV2 B2 B2 B2 B2 YUV1 B1 B1 B1 B1 YUV0 B0 B0 B0 B0 RGB data 0 1 2 3 For RGB 5 : 6 : 5 video inputs, the video data are just directly bypassed to triple DACs. The input video data can be selected to either twos complement (I2C-bus bit DRP = 0) or binary offset (I2C-bus bit DRP = 1). The video input format is selected by I2C-bus bits FMTC[1:0]. The rising edge of HREF input defines the start of active video data. When HREF is inactive, the video output will be blanked. 7.1.2 YUV-to-RGB matrix The matrix converts YUV data, in accordance with ITU-R BT.601, to RGB data with approximately 1.5 LSB deviation to the theoretical values for 8-bit resolution. 7.1.3 Triple 8-bit DACs Three identical DACs for R, G and B video outputs are designed with voltage-drive architecture to provide high-speed operation of up to 66 MHz conversion data rate. Pin C_REF(H) is provided to allow for one external de-coupling capacitor to be connected between the internal reference voltage source and ground. 7.2 Analog mixers and keying control The analog mixers are controlled to switch between the outputs from the video DACs and analog RGB inputs by a keying signal. The analog RGB inputs need to interface with analog mixers in the way of DC-coupling, also these RGB inputs are limited to RGB signals without a sync level pedestal. The keying control can be enabled by setting I2C-bus bit KEN = 1. Two kinds of keying are possible to generate: one is external key (from EXTKEY pin when KMOD[2:0] are all logic 0), and the other is the internal pixel colour key (when KMOD[2:0] are not all logic 0) generated by comparing the input pixel data with the internal I2C-bus register value KD[7:0]. Controlled by KMOD[2:0] bits, there are 4 ways to compare the pixel data (see Table 8). 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 7 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 8: KMOD[2:0] KMOD[2:0] Pixel type Remark 100 8-bit pixel pseudo colour mode 101 2 × 8-bit pixel high colour mode 1 with pixels given at both rising and falling edges of PCLK 110 2 × 8-bit pixel high colour mode 2 with pixels given only at rising edges of PCLK 111 3 × 8-bit pixel true colour mode Since only one control register KD[7:0] provides the data value for pixel data comparison, when at 2 × 8-bit or 3 × 8-bit pixel input modes, it is presumed that all input bytes (lower, middle or higher) of each pixel must be the same as KD[7:0] in order to make graphics colour key active. The polarity of EXTKEY can be selected with KINV. With KINV = 0, EXTKEY = HIGH switches analog mixers to select DAC outputs. Before the internal keying signal switches the analog multiplexers, it can be further delayed up to 7 PCLK cycles with the control bits KDLY[2:0]. 7.3 Voltage output amplifiers Before the analog input enters the analog mixers, it passes through voltage output amplifiers. Level shifters are used internally to provide an offset of 0.2 V and an amplifier gain of 2 for analog inputs to match with the output levels from DACs. After buffering with voltage output amplifiers, the final RGB outputs can drive a 150 Ω load directly (25 Ω internal resistor, 47 Ω external serial resistor, and 75 Ω load resistor) at the monitor side (see Figure 9). The output voltage level of DAC ranges from the lowest level 0.2 V (zero code) to the highest level 1.82 V (all one code). With the digital input YUV video data in accordance with ITU-R BT.601, the RGB output of 8-bit DAC actually ranges from the 16th step (black) to the 235th step (white). Therefore, after the voltage divider with external serial resistor and monitor load resistor, the output voltage range to a monitor is approximately 0.7 V (p-p). 7.4 I2C-bus control Only one control byte is needed for the SAF7167AHW. The I2C-bus format is shown in Table 9. Table 9: S [1] I2C-bus format SLAVE ADDRESS [2] A [3] SUBADDRESS [4] DATA [5] A [3] P [6] [1] S = START condition. [2] SLAVE ADDRESS = 1011 111X; X = R/W control bit. X = 0: order to write. X = 1: order to read (not used for SAF7167AHW). [3] A = acknowledge; generated by the slave. [4] SUBADDRESS = subaddress byte. [5] DATA = data byte. [6] P = STOP condition. 9397 750 12667 Product data sheet A [3] © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 8 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 10: Control data byte Subaddress D7 D6 D5 D4 D3 D2 D1 D0 00 KMOD2 KMOD1 KMOD0 DRP KEN KINV FMTC1 FMTC0 01 0 0 0 0 0 KDLY2 KDLY1 KDLY0 02 KD7 KD6 KD5 KD4 KD3 KD2 KD1 KD0 Table 11: Bit functions in data byte; Table note 1 and Table note 2 Bit Description FMTC[1:0] video format control: 00: YUV 4 : 2 : 2 01: YUV 4 : 1 : 1 10: YUV 2 : 1 : 1/ITU-R BT.656 11: RGB 5 : 6 : 5 KINV key polarity: KINV = 0: pin EXTKEY = HIGH for analog mixer to select DAC outputs KINV = 1: pin EXTKEY = HIGH for analog mixer to select analog RGB inputs KEN key enable: 0 = disable 1 = enable DRP UV input data code: 0 = twos complement 1 = binary offset KMOD[2:0] keying mode: 000: external key 100: 8-bit pixel colour key 101: 2 × 8-bit pixel colour key (with two-edge clock latching for pixel input) 110: 2 × 8-bit pixel colour key (with one-edge clock latching for pixel input) 111: 3 × 8-bit pixel colour key (with one-edge clock latching for pixel input) all other combinations are reserved KDLY[2:0] added keying delay cycles (from 0 to 7 PCLK cycles) KD[7:0] the data value compared for 8, 16 or 24-bit pixel colour key [1] All I2C-bus control bits are initialized to logic 0 after RES_N is activated. [2] PCLK should be active in any event to allow for correct operation of I2C-bus programming. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 9 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 8. Limiting values Table 12: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins and all supply pins connected together. Symbol Parameter Conditions Min Max Unit VDDD digital supply voltage −0.5 +7.0 V VDDA analog supply voltage −0.5 +7.0 V VI(D) digital input voltage −0.5 +7.0 V VI(A) analog input voltage −0.5 +7.0 V Vdiff voltage difference between VSS pins - 100 mV Tstg storage temperature −65 +150 °C Tamb ambient temperature −40 +85 °C Vesd electrostatic discharge voltage: human body model [1] - ±2000 V machine model [2] - ±200 V [1] Class 2 according to EIA/JESD22-114-B. [2] Class B according to EIA/JESD22-115-A. 9. Thermal characteristics Table 13: Symbol Rth(j-a) [1] Thermal characteristics Parameter thermal resistance from junction to ambient Conditions Typ Unit in free air 34 [1] K/W The overall Rth(j-a) value can vary depending on the board layout. To minimize the effective Rth(j-a) all power and ground pins must be connected to the power and ground layers directly. An ample copper area direct under the SAF7167AHW with a number of through-hole plating, which connect to the ground layer (four-layer board: second layer), can also reduce the effective Rth(j-a). Please do not use any solder-stop varnish under the chip. In addition the usage of soldering glue with a high thermal conductance after curing is recommended. 10. Static characteristics Table 14: Static characteristics Tamb = −40 °C to +85 °C. Symbol Parameter VDDD Conditions Min Typ Max Unit digital supply voltage 4.75 5.0 5.25 V VDDA analog supply voltage 4.75 5.0 5.25 V mA IDD(tot) total supply current - 130 - VIH(SDA) HIGH-level input voltage on pin SDA fclk = 27 MHz 3 - VDDD + 0.5 V VIL(SDA) LOW-level input voltage on pin SDA −0.5 - +1.5 V VIH HIGH-level digital input voltage 2 - - V VIL LOW-level digital input voltage - - 0.8 V Vi full-scale analog RGB at input pins - 0.7 - V 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 10 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 14: Static characteristics …continued Tamb = −40 °C to +85 °C. Symbol Parameter Conditions Min Typ Max Unit Vo full-scale analog RGB at output pins with 125 Ω external load 1.250 1.375 1.500 V DNL differential non-linearity error of video output - - 1 LSB INL integral non-linearity error of video output - - 1 LSB 11. Dynamic characteristics Table 15: Dynamic characteristics Tamb = −40 °C to +85 °C. Symbol Parameter Conditions Min Typ Max Unit VCLK fclk video clock rate - - 66 MHz δ duty factor of VCLK 40 50 60 % PCLK fclk pixel clock rate: 8-bit pixel colour key see Figure 4 - - 77.5 MHz 2 × 8-bit pixel colour key; mode 1 see Figure 5 - - 50 MHz 2 × 8-bit pixel colour key; mode 2 see Figure 6 - - 80 MHz 3 × 8-bit pixel colour key see Figure 7 - - 77.5 MHz δ duty factor of PCLK 40 50 60 % tsu1 digital input set-up time to VCLK rising edge 3 - - ns th1 digital input hold time to VCLK rising edge 2 - - ns tsu2 digital input set-up time to PCLK rising edge 0 - - ns th2 digital input hold time to PCLK rising edge 4.2 - - ns tsu3 digital input set-up time to PCLK falling edge −1 - - ns th3 digital input hold time to PCLK falling edge 6 - - ns tsw switching time between video DAC outputs and analog inputs - - 15 ns Tgroup overall group delay from digital video inputs to analog outputs: - 20TVCLK + tPD - ns tr [1] YUV video input mode see Figure 8 RGB video input mode see Figure 8 DAC analog output rise time - 12TVCLK + tPD - ns see Figure 8 [2] - 3.5 - ns tf DAC analog output fall time see Figure 8 [2] - 3.5 - ns ts DAC analog output settling time see Figure 8 [3] - 16.5 - ns see Figure 8 [4] - 20 - ns tPD DAC analog output propagation delay 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 11 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter Table 15: Dynamic characteristics …continued Tamb = −40 °C to +85 °C. Symbol Parameter Conditions Min Typ Max Unit - 2.0 - 160 - - MHz 100 110 - V/µs Analog outputs from analog inputs Gv voltage gain B bandwidth SR slew rate at −3 dB [1] Switching time measured from the 50 % point of the EXTKEY transition edge to the 50 % point of the selected analog output transition. [2] DAC output rise and fall times measured between the 10 % and 90 % points of full-scale transition. [3] DAC settling time measured from the 50 % point of full-scale transition to the output remaining within ±1 LSB. [4] DAC analog output propagation delay measured from the 50 % point of the rising edge of VCLK to the 50 % point of full-scale transition. VCLK t su1 HREF t h1 YUV t su1 UV 001aaa404 Fig 3. Video data input timing. PCLK t su2 t h2 P [7:0] pixel 1 pixel 2 pixel 3 pixel 4 pixel 5 pixel 6 pixel 7 001aaa394 Fig 4. Pixel data input timing; 8-bit pixel colour key. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 12 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter PCLK t su2 t su3 t h2 t h3 P [7:0] pixel 1 pixel 2 pixel 3 001aaa396 Fig 5. Pixel data input timing; 2 × 8-bit pixel colour key; mode 1. PCLK t su2 t h2 P [7:0] pixel 1 pixel 2 pixel 3 001aaa397 Fig 6. Pixel data input timing; 2 × 8-bit pixel colour key; mode 2. PCLK t su2 t h2 P [7:0] pixel 1 pixel 2 001aaa398 Fig 7. Pixel data input timing; 3 × 8-bit pixel colour key. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 13 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter VCLK Tgroup YUV and UV (full-scale transition) ts t PD R_OUT, G_OUT, B_OUT t r, t f 001aaa399 Fig 8. DAC output timing. 12. Application information digital YUV video data inputs 8 38 to 45 YUV[7:0] 36 C_REF(H) 0.1 µF 8 46 to 48, 1 to 5 UV[7:0] to PC monitor analog inputs from VGA R_IN 33 75 Ω 32 R_OUT 47 Ω 75 Ω SAF7167AHW G_IN 31 30 G_OUT 47 Ω 75 Ω 75 Ω B_IN 29 28 B_OUT 47 Ω 75 Ω 75 Ω 001aaa400 cable monitor side Fig 9. Typical application diagram for analog circuits. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 14 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 13. Package outline HTQFP48: plastic thermal enhanced thin quad flat package; 48 leads; body 7 x 7 x 1 mm; exposed die pad SOT545-2 c y exposed die pad side X Dh 36 25 A 24 37 ZE e E HE Eh (A 3) A A2 A1 w M θ bp Lp L pin 1 index 13 48 detail X 1 12 ZD w M bp v M A e D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A UNIT max. mm 1.2 A1 A2 A3 bp c D(1) Dh E(1) Eh e HD HE L Lp v w y 0.15 0.05 1.05 0.95 0.25 0.27 0.17 0.20 0.09 7.1 6.9 4.6 4.4 7.1 6.9 4.6 4.4 0.5 9.1 8.9 9.1 8.9 1 0.75 0.45 0.2 0.08 0.08 ZD(1) ZE(1) 0.9 0.6 0.9 0.6 θ 7° 0° Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC SOT545-2 JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 03-04-07 04-01-29 MS-026 Fig 10. Package outline diagram. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 15 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 14. Soldering 14.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 14.2 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 °C to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: • below 225 °C (SnPb process) or below 245 °C (Pb-free process) – for all BGA, HTSSON..T and SSOP..T packages – for packages with a thickness ≥ 2.5 mm – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called thick/large packages. • below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 16 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 °C and 320 °C. 14.5 Package related soldering information Table 16: Suitability of surface mount IC packages for wave and reflow soldering methods Package [1] Soldering method Wave Reflow [2] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, USON, VFBGA not suitable suitable DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable [4] suitable PLCC [5], SO, SOJ suitable suitable not recommended [5] [6] suitable SSOP, TSSOP, VSO, VSSOP not recommended [7] suitable CWQCCN..L [8], PMFP [9], WQCCN..L [8] not suitable LQFP, QFP, TQFP [1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. [2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 9397 750 12667 Product data sheet not suitable © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 17 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. [5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. [6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. [9] Hot bar soldering or manual soldering is suitable for PMFP packages. 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 18 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 15. Revision history Table 17: Revision history Document ID Release date Data sheet status Change notice Order number Supersedes SAF7167AHW_1 20040629 Product data - 9397 750 12667 - 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 19 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 16. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18. Disclaimers 19. Licenses Purchase of Philips I2C-bus components Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors Purchase of Philips I2C-bus components conveys a license under the Philips’ I2C-bus patent to use the components in the I2C-bus system provided the system conforms to the I2C-bus specification defined by Koninklijke Philips Electronics N.V. This specification can be ordered using the code 9398 393 40011. 20. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 12667 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 29 June 2004 20 of 21 SAF7167AHW Philips Semiconductors YUV-to-RGB digital-to-analog converter 21. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.2 7.3 7.4 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14.5 15 16 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 Video data path. . . . . . . . . . . . . . . . . . . . . . . . . 5 Re-formatter . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 YUV-to-RGB matrix. . . . . . . . . . . . . . . . . . . . . . 7 Triple 8-bit DACs . . . . . . . . . . . . . . . . . . . . . . . . 7 Analog mixers and keying control . . . . . . . . . . . 7 Voltage output amplifiers . . . . . . . . . . . . . . . . . 8 I2C-bus control . . . . . . . . . . . . . . . . . . . . . . . . . 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10 Thermal characteristics. . . . . . . . . . . . . . . . . . 10 Static characteristics. . . . . . . . . . . . . . . . . . . . 10 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Application information. . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Package related soldering information . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information . . . . . . . . . . . . . . . . . . . . 20 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 29 June 2004 Document order number: 9397 750 12667 Published in The Netherlands