NTMFS4854NS D

NTMFS4854NS
SENSEFET® Power MOSFET
25 V, 149 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
•
Accurate, Lossless Current Sensing
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
25 V
Applications
RDS(ON) MAX
ID MAX
2.5 mW @ 10 V
149 A
3.9 mW @ 4.5 V
119 A
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
DRAIN
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
25
V
Gate−to−Source Voltage
VGS
±16
V
ID
24.4
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.31
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
15.2
A
Power Dissipation
RqJA (Note 2)
TA = 85°C
Steady
State
TA = 85°C
0.9
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
149
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
TC = 85°C
86.2
W
IDM
298
A
TJ, TSTG
−55 to
+150
°C
IS
71
A
Drain to Source DV/DT
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 30 V, VGS = 10 V,
IL = 20 Apk, L = 1.0 mH, RG = 25 W)
EAS
200
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Source Current (Body Diode)
MARKING
DIAGRAM
S
1
S
SO−8 FLAT LEAD S
CASE 506BQ
G
A
Y
W
ZZ
(Do Not Connect)
NC
4854NS
SENSE
AYWZZ
KELVIN
K1
(Do Not Connect)
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
107.5
PD
Operating Junction and Storage
Temperature
SENSE SOURCE
11
PD
TA = 25°C,
tp = 10 ms
Kelvin
17.6
TA = 25°C
Pulsed Drain
Current
GATE
ORDERING INFORMATION
Package
Shipping†
NTMFS4854NST1G
SO−8 FL
(Pb−Free)
1500 Tape / Reel
NTMFS4854NST3G
SO−8 FL
(Pb−Free)
5000 Tape / Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 1
1
Publication Order Number:
NTMFS4854NS/D
NTMFS4854NS
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
1.45
Junction−to−Ambient – Steady State (Note 3)
RqJA
54
Junction−to−Ambient – Steady State (Note )
RqJA
138.7
Unit
°C/W
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
25
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
30
VGS = 0 V,
VDS = 20 V
mV/°C
TJ = 25°C
10
TJ = 125°C
200
IGSS
VDS = 0 V, VGS = ±16 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.0
6.8
mV/°C
VGS = 10 V
ID = 15 A
1.5
2.5
VGS = 4.5 V
ID = 15 A
2.5
3.9
VGS = 3.2 V,
ID = 10 A
TJ = 75°C
6.0
10
TJ = 25°C
5.1
8.8
gFS
VDS = 15 V, ID = 15 A
28
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
4830
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1 MHz, VDS = 12 V
1130
550
Total Gate Charge
QG(TOT)
36
Threshold Gate Charge
QG(TH)
4.7
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
pF
VGS = 4.5 V, VDS = 15 V; ID = 30 A
13
66
nC
15
QG(TOT)
VGS = 11.5 V, VDS = 15 V;
ID = 30 A
85
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
20
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
54
38
45
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
7. With 0V potential from sense lead to source lead, i.e. using a virtual ground.
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2
ns
NTMFS4854NS
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
11
tr
td(OFF)
32
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
ns
54
tf
34
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.80
TJ = 125°C
0.65
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 30 A
1.2
V
36
17
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
ns
19
QRR
33
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
0.005
nH
Gate Inductance
LG
1.84
nH
Gate Resistance
RG
1.4
W
PACKAGE PARASITIC VALUES
TA = 25°C
CURRENT SENSE CHARACTERISTICS
Current Sensing Ratio
Iratio
VGS = 5 V, 0-70°C, 5-20 A
374
399
424
Current Sensing Ratio
Iratio
VGS = 5 V, 0-70°C, 1−5 A
362
399
436
Current Sense Temperature Coefficient
(Note 7)
0.006
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
7. With 0V potential from sense lead to source lead, i.e. using a virtual ground.
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3
%/°C
NTMFS4854NS
TYPICAL PERFORMANCE CURVES
TJ = 25°C
120
ID, DRAIN CURRENT (AMPS)
140
3.6 V
3.4 V
100
3.2 V
80
60
3.0 V
40
2.8 V
20
2.6 V
0
1
0.5
1.5
2
3
2.5
4
3.5
4.5
120
100
80
60
TJ = 125°C
40
TJ = 25°C
20
TJ = −55°C
1
2
1.5
3
2.5
3.5
4
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 25°C
ID = 30 A
0.008
0.007
0.006
0.005
0.004
ID = 10 A
0.002
0.001
2
140
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.010
0
160
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.009
0.003
VDS ≥ 10 V
180
0
5
3
4
5
6
7
9
8
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = 4.0 to 10 V
160
0
200
3.8 V
180
10
4.5
0.01
TJ = 25°C
0.009
0.008
0.007
0.006
0.005
VGS = 3.2 V
0.004
VGS = 4.5 V
0.003
0.002
0.001
0
VGS = 10 V
0
20
10
30
40
50
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
ID, DRAIN CURRENT (AMPS)
200
1.8
Each curve is individually normalized to its value at 25°C
1.6
ID = 30 A
VGS = 10 V
1.4
1.2
1.0
ID = 10 A
VGS = 3.2 V
0.8
0.6
−50
−25
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
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4
150
60
NTMFS4854NS
TYPICAL PERFORMANCE CURVES
3000
Coss
2000
0
Crss
0
10
5
15
20
25
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
15
8
10
6
5
2
0
ID = 30 A
TJ = 25°C
0
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
tf
tr
td(on)
10
1
1
10
60
70
20
40
50
30
QG, TOTAL GATE CHARGE (nC)
10
RG, GATE RESISTANCE (W)
1.0
0.1
0.3
100
VGS = 0 V
TJ = 25°C
0.4
10 ms
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.6
0.7
0.8
0.9
1.0
1.1
Figure 9. Diode Forward Voltage vs. Current
VGS(th), THRESHOLD VOLTAGE (V)
I D, DRAIN CURRENT (AMPS)
10
0.5
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
1000
VGS = 20 V
SINGLE PULSE
TC = 25°C
0
90
10
Figure 8. Resistive Switching Time
Variation vs. Gate Resistance
100
80
Figure 7. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
td(off)
100
Qgd
Qgs
4
100
VGS = 11.5 V
VDD = 15 V
ID = 15 A
VGS
VDS
Figure 6. Capacitance Variation
1000
20
QT
10
4000
1000
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
5000
C, CAPACITANCE (pF)
12
VGS = 0 V
TJ = 25°C
Ciss
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
6000
100 ms
1 ms
10 ms
dc
10
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
ID = 250 mA
VGS = VDS
1.0
0.5
−50
Figure 10. Maximum Rated Forward Biased
Safe Operating Area
−25
25
0
50
75
100 125
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Threshold Voltage
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5
150
NTMFS4854NS
R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
TYPICAL CHARACTERISTICS
100
50% (DUTY CYCLE)
10
1.0
0.1
20%
10%
5.0%
2.0%
1.0%
SINGLE PULSE
RqJA = 54°C/W
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, TIME (s)
Figure 12. FET Thermal Response
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6
1.0
10
100
1000
NTMFS4854NS
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P
CASE 506BQ−01
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINAL.
5. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
0.20 C
D
A
B
D1
8
7
6
2X
0.20 C
5
E1 E
PIN ONE
IDENTIFIER
NOTE 7
4X
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
h
K
L
M
N
h
1
2
3
c
4
A1
TOP VIEW
0.10 C
A
DETAIL A
0.10 C
NOTE 4
SIDE VIEW
SEATING
PLANE
NOTE 6
C
DETAIL A
D2
1
8X
M
SOLDERING FOOTPRINT*
4
1.27
PITCH
8X
0.75
L
N
K
e
G
5
8X
BOTTOM VIEW
4X
0.92
E2
4.84
8
MILLIMETERS
MAX
MIN
1.10
0.90
−−−
0.05
0.33
0.51
0.20
0.33
5.15 BSC
4.50
5.10
3.90
4.30
6.15 BSC
5.50
6.10
3.00
3.50
1.27 BSC
0.80
1.20
−−−
12 _
0.20
−−−
0.51
0.71
3.25
3.75
1.80
2.20
4X
0.90
2.00
6.59
3.70
b
0.10
C A B
0.05
c
NOTE 3
0.99
4X
1.00
4.56
5.55
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SENSEFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NTMFS4854NS/D