Off-line SMPS Controller with 600 V Sense CoolMOS on Board TDA16831-4 Preliminary Data CoolSET Overview Features • PWM controller + sense CoolMOS attached in one compact package • 600 V avalanche rugged CoolMOS • Typical RDSon = 0.5 ... 3.5 Ω at Tj = 25 °C • Only 4 active Pins • Standard DIP-8 Package for Output Power ≤40 W • Only few external components required • Low start up current • Current mode control • Input Undervoltage Lockout • Max. Duty Cycle limitation • Thermal Shutdown • Modulated Gate Drive for low EMI P-DIP-8-6 P-DSO-14-11 Type Ordering Code Package TDA 16831 Q67000-A9420 P-DIP-8-6 TDA 16832 Q67000-A9422 P-DIP-8-6 TDA 16833 Q67000-A9389 P-DIP-8-6 TDA 16834 samples P-DIP-8-6 TDA 16831G Q67000-A9421 P-DSO-14-11 TDA 16832G Q67000-A9423 P-DSO-14-11 TDA 16833G Q67000-A9419 P-DSO-14-11 Data Sheet 1 1999-12-10 TDA 16831-4 Device Output Power Range/ Required Heatsink1) Output Power Range/ Required Heatsink1) Vin = 85-270 VAC Vin = 190-265 VAC TDA 16831 10 W / no heatsink 10 W / no heatsink TDA 16832 20 W / 6 cm2 20 W / no heatsink TDA 16833 2 40 W / no heatsink 2 30 W / 3 cm TDA 16834 40 W / 3 cm 40 W / no heatsink TDA 16831G 10 W / no heatsink 10 W / no heatsink TDA 16832G 20 W / 8 cm2 20 W / no heatsink TDA 16833G 20 W / no heatsink 40 W / 3 cm2 1) TA = 70 °C Data Sheet 2 1999-12-10 TDA 16831-4 Pin Configurations N.C. 1 8 GND FB 2 7 V CC N.C. 3 6 N.C. D 4 5 D AEP02782 Figure 1 TDA 16831/2/3/4 P-DIP-8-6 for Applications with Pout ≤ 40 W: TDA 16831/2/3/4 Pin Symbol Function 1 N.C. Not Connected 2 FB PWM Feedback Input 3 N.C. Not Connected 4 D 600 V Drain CoolMOS 5 D 600 V Drain CoolMOS 6 N.C. Not Connected 7 VCC PWM Supply Voltage 8 GND PWM GND and Source of CoolMOS Data Sheet 3 1999-12-10 TDA 16831-4 GND FB N.C. N.C. D D D 1 2 3 4 5 6 7 14 13 12 11 10 9 8 GND V CC N.C. N.C. D D D AEP02783 Figure 2 TDA 16831G/2G/3G P-DSO-14-11 for Applications with Pout ≤ 20 W: TDA 16831G/2G/3G Pin Symbol Function 1 GND PWM GND and CoolMOS Source 2 FB PWM Feedback Input 3 N.C. Not Connected 4 N.C. Not Connected 5, 6, 7 D 600 V Drain CoolMOS 8, 9, 10 D 600 V Drain CoolMOS 11 N.C. Not Connected 12 N.C. Not Connected 13 VCC PWM Supply Voltage 14 GND PWM GND and Source of CoolMOS Data Sheet 4 1999-12-10 Figure 3 Data Sheet Block Diagram FB uvlo Drain bandgap bias RFB tempshutdown Vcc Vref pwmcomp pwmss biaspwm sst logpwm pwmop rlogpwm slogpwm biaspwm pwmrmp R Q S Q gtdrv 5 alogpwm v04sst v04sst osc csshutdown tff kippl 3 J Rsense slogpwm kippl 5 K pwmpls 1999-12-10 TDA 16831-4 GND TDA 16831-4 Circuit Description Oscillator (osc) The TDA 16831-4 is a current mode pulse width modulator with integrated sense CoolMOS transistor. It fulfills the requirements of minimum external control circuitry for a flyback application. The oscillator is generating a frequency twice the switching frequency fswitch = 100 kHz. Resistor, capacitor and current source which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor is internally trimmed, in order to achieve a very accurate switching frequency. Temperature coefficient of switching frequency is very low ( see page 19). Current mode control means that the current through the MOS transistor is compared with a reference signal derived from the output voltage of the flyback application. The result of that comparison determines the on time of the MOS transistor. Divider Flip Flop (tff) To minimize external circuitry the sense resistor which gives information about MOS current is integrated. The oscillator resistor and capacitor which determine the switching frequency are integrated, too. Special efforts have been made to compensate temperature dependency and to minimize tolerances of this resistor. Tff is a flip flop which divides the oscillator frequency by one half to create the switching frequency. The maximum duty cycle is set to Dmax = 0.5. Current Sense Amplifier (pwmop) The positive input of the pwmop is applied to the internal sense resistor. With the internal sense resistor (Rsense) the sensed current coming from the CoolMOS is converted into a sense voltage. The sense voltage is amplified with a gain of 32 dB. The amplified sense voltage is connected to the negative input of the pwm comparator. Each time when the CoolMOS transistor is switched on, a current spike is superposed to the true current information. To eliminate this current spike the sense voltage is smoothed via an internal resistor capacitor network with a time constant of Td1 = 100 ns. This is the first leading edge blanking and only a small spike is left. To reduce this small spike the current sense amplifier is creating a virtual ramp at the output. This is done by a second resistor capacitor network with Td2 = 100 ns and an op-offset of 0.8 V which is seen at the output of the amplifier. When gate drive is The circuit in detail: (see Figure 3) Start Up Circuit (uvlo) Uvlo is monitoring the external supply voltage VCC. When VCC is exceeding the on threshold VCCH = 12 V, the bandgap, the bias circuit and the soft start circuit are switched on. When VCC is falling below the off-threshold VCCL = 9 V the circuit is switched off. During start up the current consumption is about 30 µA. Bandgap (bg) The bandgap generates an internal very accurate reference voltage of 5.5 V to supply the internal circuits. Current Source (bias) The bias circuit provides the internal circuits with constant current. Data Sheet 6 1999-12-10 TDA 16831-4 Logic (logpwm) switched off the output capacitor is discharged via pulse signal pwmpls. The oscillator signal slogpwm sets the RS-flipflop. The gate drive circuit is switched on, when capacitor voltage exceeds the internal threshold of 0.4 V. This leads to a linear ramp, which is created by the output of the amplifier. Therefore duty cycle of 0 % is possible. The amplifier is compensated through an internal compensation network. The logic logpwm comprises a RS-flip-flop and a NAND-gate. The NAND-gate insures that CoolMOS transistor is only switched on when sosta is on and pwmin has exceeded minimum threshold and pwmin is below pwmrmp and currentshutdown is off and tempshutdown is off and tff sets the starting impulse. CoolMOS transistor is switched off when pwmrmp exceeds pwmin or duty cycle exceeds 0.5 or pwmcs exceeds Imax or silicium temperature exceeds Tmax or uvlo is going below threshold. The RS flip flop ensures that with every frequency period only one switch on can occur (double pulse suppression). The transfer function of the amplifier can be described as Ki V -----o = ----------------------------------- ; p = jω Vi p × (1 + T × p) Gate Drive (gtdrv) Gtdrv is the driver circuit for the CoolMOS and is optimized to minimize EMI influences and to provide high circuit efficiency. This is done by smoothing the switch on slope when reaching the CoolMOS threshold. Leading switch on spike is minimized then. When CoolMOS is witched off, the falling slope of the gate driver is slowed down when reaching 2 V. So an overshoot below ground can't occur. Also gate drive circuit is designed to eliminate cross conduction of the output stage. the step response is described with -t on ----------ö æ T V o = V i × K i × ç t on – T + T × e ÷ è 40 K i = -----t on T = 850 ns Comparator (pwmcomp) The comparator pwmcomp compares the amplified current signal pwmrmp of the CoolMOS with the reference signal pwmin. Pwmin is created by an external optocoupler or external transistor and gives the information of the feedback circuitry. When the pwmrmp exceeds the reference signal pwmin the comparator switches the CoolMOS off. Data Sheet Current Shut Down (cssd) Current shut down circuit switches the CoolMOS immediately off when the sense current is exceeding an internal threshold of 100 mV at Rsense. 7 1999-12-10 TDA 16831-4 Tempshutdown (tsd) Tempshutdown switches the CoolMOS off when junction temperature of the PWM controller is exceeding an internal threshold. Data Sheet 8 1999-12-10 TDA 16831-4 kippl, f = 200 kHz (oscillator) pwmpls, f = 100 kHz (tff) slogpwm (tff) VFB pwmrmp (pwmop) Gate Start at 0.4 V op-offset = 0.8 V alogpwm (pwmcomp) rlogpwm (pwmcomp) gtrdrv Q (logpwm) AED02766 Figure 4 Data Sheet Signal Diagram 9 1999-12-10 TDA16831-4 Electrical Characteristics Absolute Maximum Ratings Parameter Symbol Limit Values min. max. Unit Remarks Zener Voltage 1) page 11 Beware of Pmax 2) Supply Voltage VCC – 0.3 VZ V Supply + Zener Current ICCZ VDS IAC 0 20 mA 600 V VFB Tj Tstg RthSA RthSA – 0.3 5.5 V – 40 150 °C – 50 150 °C 90 125 K/W P-DIP-8-6 K/W P-DSO-14-11 Drain Source Voltage Avalanche Current Voltage at FB Junction Temperature Storage Temperature Thermal Resistance System-Air 1) 2) Icsthmax t = 100 ns Be aware that VCC capacitor is discharged before IC is plugged into the application board. Power dissipation should be observed. Operating Range Parameter Supply Voltage Junction Temperature Data Sheet Symbol VCC Tj Limit Values Unit Remarks min. max. VCCH VZ V – 25 120 °C 10 1999-12-10 TDA 16831-4 Supply Section -25 °C < Tj < 120 °C, VCC = 15 V Parameter Symbol Limit Values min. typ. Quiescent Current Supply Current Active Supply Current Active Supply Current Active VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis VCC Zener Clamp Controller Thermal Shutdown Thermal Hysteresis ICCL ICCHA ICCHA ICCHA VCCH VCCL VCCHY VZ TjSD TjHy 25 4.5 6 7 8.5 16 120 Unit Test Conditions max. 80 6 7.5 8.5 µA mA mA mA TDA 16831/2/G TDA 16833/G TDA 16834 12 12.5 V 9 V 3 V 17.5 19 V 135 2 150 °C °C TDA 16831/2/3/G/4 Oscillator Section -25 °C < Tj < 120 °C, VCC = 15 V Parameter Symbol Accuracy f Temperature Coefficient TK f Data Sheet Limit Values min. typ. max. 90 110 100 1000 11 Unit Test Conditions kHz ppm/°C 1999-12-10 TDA16831-4 PWM Section Parameter Symbol Duty Cycle D Limit Values min. typ. max. 0 0.5 Trans Impedance ∆VFB / ∆IDrain 2) ZPWM 4 2 1.3 2 70 ZPWM ZPWM OP Gain Bandwidth 1) OP Phase Margin 1) Bw Phim VFB Operating Range min. Level VFBmin VFB Operating Range max. Level VFBmax Feedback Resistance RFB Temperature Coefficient RFB RFBTK Internal Reference Voltage Vrefint Temperature Coefficient Vrefint Vreftk 0.45 3.5 3.0 3.7 600 5.3 5.5 0.2 Unit Test Conditions V/A TDA16831/G V/A TDA16832/G V/A TDA16833/G/4 MHz degree 0.85 V 4.8 V 4.9 KΩ for D = 0 Ics = 0.95 Icsth ppm/°C 5.7 V mV/°C 1) Guaranteed by design 2) For discontinuous mode the VFB is described by: -ton V FB -t on ----------ö ----------ö æ T T I PK æ 1 2 = Z PWM × -------- × ç t on – T 1 + T 1 × e ÷ + 0.6 × ç 1 – e ÷ ç ÷ ç ÷ t on è è T1 = 850 ns; T2 = 200 ns Data Sheet 12 1999-12-10 TDA 16831-4 i Output Section Parameter Symbol Limit Values min. typ. max. Drain Source Breakdown Voltage V(BR)DSS 600 V Drain Source On-Resistance RDson RDson RDSon RDson RDSon RDson Isource Current Limit Threshold Time Constant Icsth Rise Time Fall Time Data Sheet Icsth Icsth Icsth Icsth tcsth trise tfall 0.5 25 0.9 1.8 2.9 2.9 300 70 50 13 TA = 25 °C: TDA 16831/2/G TDA 16833/G TDA 16834 9 2.7 1.6 Ω Ω Ω -25<TA<120 °C: TDA 16831/2/G TDA 16833/G TDA 16834 50 µA VGS = 0 pF A TDA 16833 tDR = 100 ns A A A A ns TDA 16831/G TDA 16832/G TDA 16833/G TDA 16834 Icsthmax 0.6 1.2 2.2 2.2 TA = 25 °C Ω Ω Ω 3.5 1 0.5 Zero Gate Voltage Drain Current IDSS Output Capacitance COSS Avalanche Current IAR Unit Test Conditions 1.4 2.7 4.8 4.8 ns ns 1999-12-10 TDA 16831-4 Application Circuit Vcc Drain TDA18831-4 CoolMOS FB PWM Controller AC 85...270VAC GND Figure 5 Data Sheet TDA 16831G/2G/3G: 4 Active Pins, Version without Soft Start 14 1999-12-10 TDA 16831-4 Quiescent Current versus Temperature Supply Current Active versus Temperature AED02767 30 I CCL I CCH µA 5.5 20 5 15 4.5 10 4 5 3.5 0 25 50 75 TDA 16833 mA 25 0 -25 AED02768 6 3 -25 ˚C 125 TDA 16831/2 0 25 50 75 T T Turn On/Off Supply Voltage versus Temperature Turn On/Off Hysteresis AED02769 12.5 VCC V 12 ˚C 125 AED02770 2.9 VCCHY VCCH V 2.85 11.5 2.8 11 10.5 2.75 10 2.7 9.5 VCCL 9 2.65 8.5 8 -25 0 25 50 75 2.6 -25 ˚C 125 25 50 75 ˚C 125 T T Data Sheet 0 15 1999-12-10 TDA 16831-4 VCC Zener Clamp Switching Frequency versus Temperature AED02771 19 VZ AED02772 110 f kHz V 18.5 106 104 18 102 17.5 100 98 17 96 94 16.5 92 16 -25 0 25 50 75 90 -25 ˚C 125 0 25 50 75 ˚C 125 T T Maximum Duty Cycle versus Temperature TDA 16831/2/3/G/4 Operational Amplifier Phase and Amplitude versus Frequency AED02773 50 % AED02774 40 Grad ϕ A dB Duty-cycle 30 49 -40 A /dB 48.5 -60 20 -80 48 10 47.5 -100 ϕ /Grad -120 47 0 -140 46.5 46 -160 -10 -180 45.5 45 -25 0 25 50 75 -20 0 10 ˚C 125 10 1 10 2 kHz 10 4 -200 f T Data Sheet 0 16 1999-12-10 TDA 16831-4 Feedback Voltage Operating Range versus Temperature VFB Feedback Voltage versus Feedback Current AED02775 5 V AED02776 6 VFB For I CS = 0.95 I CSTH V 5 4 3.5 4 3 3 2.5 Temp = 25 2 2 1.5 Temp = 130 1 1 For D = 0 0.5 0 -25 0 25 50 75 0 ˚C 125 0 0.5 1 1.5 I FB T RDSon versus Temperature TDA 16833 Output Capacitance COSS versus VDS AED02777 8 mA AED02778 100 COSS pF RDSON Ω 7 80 6 70 5 60 TDA 16831 50 4 40 3 30 2 20 TDA 16833 1 0 -25 10 0 25 50 75 0 40 ˚C 125 60 70 80 V 100 VDS T Data Sheet 50 17 1999-12-10 TDA 16831-4 Isource Current Limit Threshold Icsth Normalized Overcurrent Shutdown versus Drain Current Slope versus Temperature I CSTH A TDA 16833 3 AED02780 I Drain 6 I CSTH AED02779 3.5 5 TDA 16831 2.5 4 TDA 16832 2 3 1.5 TDA 16832 TDA 16833 2 TDA 16831 1 1 0.5 0 -25 0 0 25 50 75 ˚C 125 T Data Sheet 18 0 2 4 6 A / µ s 10 dI dt 1999-12-10 TDA 16831-4 Package Outlines GPD05583 P-DIP-8-6 (Plastic Dual In-line Package) Data Sheet 19 1999-12-10 TDA16831-4 GPS09222 P-DSO-14-11 (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Data Sheet 20 Dimensions in mm 1999-12-10 TDA 16831-4 TDA 16831-4 Revision History: Current Version: 1999-11-08 Previous Version: Page Page (in previous (in current Version) Version) Subjects (major changes since last revision) Published by Infineon Technologies AG i. Gr., Bereichs Kommunikation, St.-Martin-Strasse 53 D-81541 München © Infineon Technologies AG1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologiesis an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 21 1999-12-10