IRF IRLR4343PBF

PD - 95394A
DIGITAL AUDIO MOSFET
IRLR4343PbF
IRLU4343PbF
IRLU4343-701PbF
Features
Advanced Process Technology
Key Parameters Optimized for Class-D Audio
Amplifier Applications
l Low RDSON for Improved Efficiency
l Low Qg and Qsw for Better THD and Improved
Efficiency
l Low Qrr for Better THD and Lower EMI
l 175°C Operating Junction Temperature for
Ruggedness
l Repetitive Avalanche Capability for Robustness and
Reliability
l Multiple Package Options
l Lead-Free
l
Key Parameters
l
VDS
RDS(ON) typ. @ VGS = 10V
RDS(ON) typ. @ VGS = 4.5V
Qg typ.
TJ max
55
42
57
28
175
V
m:
m:
nC
°C
D
D-Pak
IRLR4343
I-Pak
IRLU4343
I-Pak Leadform 701
IRLU4343-701
Refer to page 10 for package outline
G
S
Description
This Digital Audio HEXFET® is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest
processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery
and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD
and EMI. Additional features of this MosFET are 175°C operating junction temperature and repetitive avalanche capability.
These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier
applications.
Absolute Maximum Ratings
Max.
Units
55
±20
V
26
19
A
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
80
79
W
39
0.53
W/°C
-40 to + 175
°C
–––
N
Parameter
VDS
VGS
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
PD @TC = 100°C
TJ
TSTG
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
c
Power Dissipation
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Clamping Pressure
h
Thermal Resistance
g
Parameter
RθJC
Junction-to-Case
RθJA
RθJA
Junction-to-Ambient (PCB Mounted)
Junction-to-Ambient (free air)
g
gj
Typ.
Max.
–––
1.9
–––
–––
50
110
Units
°C/W
Notes  through Š are on page 10
www.irf.com
1
12/8/04
IRLR/U4343PbF & IRLU4343-701PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Conditions
Min.
Typ. Max. Units
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
55
–––
–––
–––
15
42
–––
–––
50
VGS(th)
Gate Threshold Voltage
–––
1.0
57
–––
65
–––
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
-4.4
–––
–––
2.0
IGSS
Gate-to-Source Forward Leakage
–––
–––
–––
–––
25
100
Gate-to-Source Reverse Leakage
Forward Transconductance
–––
8.8
–––
–––
-100
–––
Total Gate Charge
Pre-Vth Gate-to-Source Charge
–––
–––
28
3.5
42
–––
Gate-to-Drain Charge
Gate Charge Overdrive
–––
–––
9.5
15
–––
–––
Turn-On Delay Time
Rise Time
–––
–––
5.7
19
–––
–––
Turn-Off Delay Time
Fall Time
–––
–––
23
5.3
–––
–––
Input Capacitance
Output Capacitance
–––
–––
740
150
–––
–––
Reverse Transfer Capacitance
Effective Output Capacitance
–––
–––
59
250
–––
–––
ƒ = 1.0MHz,
See Fig.5
VGS = 0V, VDS = 0V to -44V
Internal Drain Inductance
–––
4.5
–––
Between lead,
6mm (0.25in.)
BVDSS
∆ΒVDSS/∆TJ
RDS(on)
gfs
Qg
Qgs
Qgd
Qgodr
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
LD
V VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 4.7A
VGS = 4.5V, ID = 3.8A
e
e
V
mV/°C
µA VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 25V, ID = 19A
VDS = 44V
VGS = 10V
ID = 19A
See Fig. 6 and 19
VDD = 28V, VGS = 10V
Internal Source Inductance
–––
7.5
e
ID = 19A
ns
RG = 2.5Ω
VGS = 0V
pF
nH
LS
VDS = VGS, ID = 250µA
–––
VDS = 50V
D
G
from package
and center of die contact
S
f
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
i
Avalanche Current
Repetitive Avalanche Energy
d
Typ.
Max.
Units
–––
160
mJ
See Fig. 14, 15, 17a, 17b
i
A
mJ
Diode Characteristics
Parameter
IS @ TC = 25°C Continuous Source Current
ISM
VSD
trr
Qrr
2
(Body Diode)
Pulsed Source Current
c
Min.
Typ. Max. Units
–––
–––
A
–––
–––
Conditions
MOSFET symbol
26
80
(Body Diode)
Diode Forward Voltage
–––
–––
1.2
V
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
52
100
78
150
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 19A, VGS = 0V
TJ = 25°C, IF = 19A
di/dt = 100A/µs
e
e
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IRLR/U4343PbF & IRLU4343-701PbF
1000
1000
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.5V
2.3V
100
BOTTOM
10
2.3V
1
≤ 60µs PULSE WIDTH
Tj = 25°C
100
BOTTOM
10
2.3V
1
≤ 60µs PULSE WIDTH
Tj = 175°C
0.1
0.1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000.0
ID, Drain-to-Source Current (Α)
1
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
TJ = 25°C
100.0
T J = 175°C
10.0
1.0
VDS = 30V
≤ 60µs PULSE WIDTH
0.1
0
2
4
6
8
10
ID = 19A
VGS = 10V
2.0
1.5
1.0
0.5
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
10000
20 40 60 80 100 120 140 160 180
Fig 4. Normalized On-Resistance vs. Temperature
20
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
1000
0
T J , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
C, Capacitance (pF)
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.5V
2.3V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
Ciss
Coss
Crss
100
ID= 19A
VDS= 44V
VDS= 28V
VDS= 11V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 19
0
10
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
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0
10
20
30
40
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
3
IRLR/U4343PbF & IRLU4343-701PbF
1000
1000.0
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100.0
TJ = 175°C
10.0
1.0
TJ = 25°C
100
100µsec
10
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
10msec
1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
1.8
1
10
100
1000
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
2.0
VGS(th) Gate threshold Voltage (V)
30
ID , Drain Current (A)
25
20
15
10
5
1.5
ID = 250µA
1.0
0
0.5
25
50
75
100
125
150
175
-75 -50 -25
T J , Junction Temperature (°C)
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
0.05
τJ
0.02
0.01
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
τ
Ri (°C/W)
1.359
0.5409
τi (sec)
0.00135
0.003643
Ci= τi/Ri
Ci= i/Ri
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
www.irf.com
700
200
EAS, Single Pulse Avalanche Energy (mJ)
RDS(on), Drain-to -Source On Resistance ( mΩ)
IRLR/U4343PbF & IRLU4343-701PbF
ID = 19A
150
100
T J = 125°C
50
T J = 25°C
0
2.0
4.0
6.0
8.0
ID
2.4A
3.3A
BOTTOM 19A
TOP
600
500
400
300
200
100
0
10.0
25
VGS, Gate-to-Source Voltage (V)
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13. Maximum Avalanche Energy Vs. Drain Current
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
180
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 19A
EAR , Avalanche Energy (mJ)
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
t av = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
5
IRLR/U4343PbF & IRLU4343-701PbF
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
InductorInductor
Curent
Current
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
15V
LD
VDS
DRIVER
L
VDS
+
VDD -
D.U.T
RG
+
V
- DD
IAS
VGS
20V
tp
D.U.T
A
VGS
0.01Ω
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Unclamped Inductive Test Circuit
V(BR)DSS
Fig 18a. Switching Time Test Circuit
VDS
tp
90%
10%
VGS
td(on)
I AS
Fig 17b. Unclamped Inductive Waveforms
tr
td(off)
tf
Fig 18b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1 Qgs2
Fig 19a. Gate Charge Test Circuit
6
Qgd
Qgodr
Fig 19b Gate Charge Waveform
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IRLR/U4343PbF & IRLU4343-701PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120
WIT H AS S EMBLY
LOT CODE 1234
AS S EMB LED ON WW 16, 1999
IN T HE AS S EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IF IER
LOGO
Note: "P" in as s embly line pos ition
indicates "Lead-F ree"
IRF U120
12
916A
34
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INT ERNAT IONAL
RE CT IF IER
LOGO
IRF U120
12
AS S EMBLY
LOT CODE
www.irf.com
34
DAT E CODE
P = DES IGNAT ES LEAD-F REE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 16
A = AS S EMBLY S ITE CODE
7
IRLR/U4343PbF & IRLU4343-701PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120
WIT H AS S EMBLY
LOT CODE 5678
AS S EMB LE D ON WW 19, 1999
IN T HE AS S EMBLY LINE "A"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFU120
919A
56
78
AS S EMBLY
LOT CODE
Note: "P" in as s embly line
pos ition indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT E RNAT IONAL
RE CT IF IER
LOGO
PART NUMBER
IRFU120
56
AS S EMBLY
L OT CODE
8
78
DAT E CODE
P = DES IGNAT E S LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEE K 19
A = AS S EMB LY S IT E CODE
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IRLR/U4343PbF & IRLU4343-701PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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9
IRLR/U4343PbF & IRLU4343-701PbF
I-Pak Leadform Option 701 Package Outline
‰
Dimensions are shown in millimeters (inches)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 0.93mH,
RG = 25Ω, IAS = 19A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ This only applies for I-Pak, LS of D-Pak is
measured between lead and center of die contact
… Rθ is measured at TJ of approximately 90°C.
† Contact factory for mounting information
‡ Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information
ˆ When D-Pak mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
‰ Refer to D-Pak package for Part Marking, Tape and Reel information.
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/