PD - 9.1268F IRF7506 HEXFET® Power MOSFET Generation V Technology l Ultra Low On-Resistance l Dual P-Channel MOSFET l Very Small SOIC Package l Low Profile (<1.1mm) l Available in Tape & Reel l Fast Switching Description l S1 G1 S2 G2 1 8 2 7 3 6 4 5 D1 VDSS = -30V D1 D2 D2 RDS(on) = 0.27Ω T o p V iew Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The new Micro8 package, with half the footprint area of the standard SO-8, provides the smallest footprint available in an SOIC outline. This makes the Micro8 an ideal device for applications where printed circuit board space is at a premium. The low profile (<1.1mm) of the Micro8 will allow it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards. MICRO8 Absolute Maximum Ratings Parameter ID @ TA = 25°C ID @ TA = 70°C IDM PD @TA = 25°C VGS dv/dt TJ, TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range Max. Units -1.7 -1.4 -9.6 1.25 10 ± 20 5.0 -55 to + 150 A W mW/°C V V/ns °C Thermal Resistance Ratings Parameter RθJA Maximum Junction-to-Ambient Typ. Max. Units ––– 100 °C/W All Micro8 Data Sheets reflect improved Thermal Resistance, Power and Current -Handling Ratings- effective only for product marked with Date Code 505 or later . 8/25/97 IRF7506 Electrical Characteristics @ TJ = 25°C (unless otherwise specified) ∆V(BR)DSS/∆TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS I GSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -30 ––– ––– ––– -1.0 0.92 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– -0.039 ––– ––– ––– ––– ––– ––– ––– ––– 7.5 1.3 2.5 9.7 12 19 9.3 180 87 42 Max. Units Conditions ––– V VGS = 0V, ID = -250µA ––– V/°C Reference to 25°C, ID = -1mA 0.27 VGS = -10V, ID = -1.2A Ω 0.45 VGS = -4.5V, ID = -0.60A ––– V VDS = VGS , ID = -250µA ––– S VDS = -10V, ID = -0.60A -1.0 VDS = -24V, VGS = 0V µA -25 VDS = -24V, VGS = 0V, TJ = 125°C -100 VGS = -20V nA 100 VGS = 20V 11 ID = -1.2A 1.9 nC VDS = -24V 3.7 VGS = -10V, See Fig. 6 and 9 ––– VDD = -15V ––– ID = -1.2A ns ––– RG = 6.2Ω ––– RD = 12Ω, See Fig. 10 ––– VGS = 0V ––– pF VDS = -25V ––– ƒ = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units ––– ––– -1.25 ––– ––– -9.6 ––– ––– ––– ––– 30 37 -1.2 45 55 A V ns nC Conditions D MOSFET symbol showing the G integral reverse p-n junction diode. S TJ = 25°C, IS = -1.2A, VGS = 0V TJ = 25°C, I F = -1.2A di/dt = -100A/µs Notes: Repetitive rating – pulse width limited by max. junction temperature (see fig. 11) ISD ≤ -1.2A, di/dt ≤ -140A/µs, VDD ≤ V(BR)DSS , TJ ≤ 150°C Pulse width ≤ 300µs – duty cycle ≤ 2% Surface mounted on FR-4 board, t ≤ 10sec. IRF7506 10 10 VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTT OM - 3.0V 1 -3.0 V 20 µs P U LSE W IDTH TJ = 25 °C A 0.1 0.1 VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTT OM - 3.0V TOP -I D , D ra in -to -S o u rc e C u rre n t (A ) -I D , D ra in -to -S o u rc e C u rre n t (A ) TOP 1 1 -3.0V 20 µs P U LSE W IDTH TJ = 15 0°C A 0.1 10 0.1 1 -VD S , D rain-to-S ource V oltage (V ) Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 2.0 R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d ) -I D , D rain -to- S our ce C urr ent ( A ) 10 T J = 2 5 °C T J = 1 5 0 °C 1 V DS = -1 0 V 2 0 µ s P U L S E W ID T H 0.1 3.0 4.0 5.0 6.0 -VG S , Ga te-to-S o urce V oltage (V ) Fig 3. Typical Transfer Characteristics 10 -VD S , D rain-to-S ource V oltage (V ) 7.0 A I D = -1.2A 1.5 1.0 0.5 VG S = -10 V 0.0 -60 -40 -20 0 20 40 60 80 A 100 120 140 160 T J , Junction T emperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRF7506 V GS C is s C rs s C os s = = = = 20 0V , f = 1MH z C gs + C g d , Cds SH OR TED Cgd C ds + C gd -V G S , G a te -to -S o u rce V o lta g e (V ) C , C a p a c ita n c e (p F ) 400 300 C iss C os s 200 C rs s 100 0 10 V DS = -24 V V DS = -15 V 16 12 8 4 FO R TEST C IR C U IT SEE F IGU R E 9 0 A 1 I D = -1.2 A 100 0 -VD S , Drain-to-Source V oltage (V) 4 6 8 10 A 12 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 10 100 OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n) -I D , D ra in C u rre n t (A ) -I S D , R e ve rs e D ra in C u rre n t (A ) 2 TJ = 1 50 °C TJ = 25 °C 1 VG S = 0 V 0.1 0.4 0.6 0.8 1.0 1.2 -VS D , S ource-to-Drain V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage A 1.4 10 10µ s 10 0µs 1 1 ms T A = 25 °C T J = 15 0°C S ing le Pulse 0.1 1 10m s A 10 -V D S , D rain-to-S ource Voltage (V ) Fig 8. Maximum Safe Operating Area 100 IRF7506 RD VDS QG VGS -10V QGS D.U.T. RG QGD + VG VDD -10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Charge Fig 9a. Basic Gate Charge Waveform Fig 10a. Switching Time Test Circuit Current Regulator Same Type as D.U.T. td(on) 12V tr t d(off) tf VGS 50KΩ .2µF 10% .3µF D.U.T. +VDS VGS 90% -3mA IG VDS ID Current Sampling Resistors Fig 9b. Gate Charge Test Circuit Fig 10b. Switching Time Waveforms Thermal Response (Z thJA ) 1000 100 D = 0.50 0.20 10 0.10 0.05 PDM 0.02 0.01 1 0.1 0.00001 t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 100 IRF7506 Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • dv/dt controlled by RG • I SD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [ VDD] Forward Drop Inductor Curent Ripple ≤ 5% *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 12. For P-Channel HEXFETS [ ISD] IRF7506 Package Outline Micro8 Outline Dimensions are shown in millimeters (inches) LE A D A S S IG N M E N T S 3 - B - D D D D 8 7 8 7 6 3 IN C H E S D IM D D1 D1 D2 D2 6 5 8 7 6 5 5 S IN G L E H E 0 .2 5 (.0 1 0 ) -A - M A M DUAL 1 2 3 4 1 2 3 4 1 2 3 4 S1 G 1 S2 G 2 S S S G e 6X M IL L IM E T E R S M IN MAX M IN M AX A .0 3 6 .0 4 4 0 .9 1 1 .1 1 A1 .0 0 4 .0 0 8 0 .1 0 0 .2 0 B .0 1 0 .0 1 4 0 .2 5 0 .3 6 C .0 0 5 .0 0 7 0 .1 3 0 .1 8 D .1 1 6 .1 2 0 2 .9 5 3 .0 5 e .0 2 5 6 B A S IC 0 .6 5 B A S IC e1 .0 1 2 8 B A S IC 0 .3 3 B A S IC E .1 1 6 .1 2 0 2 .9 5 3 .0 5 H .1 8 8 .1 9 8 4 .7 8 5 . 03 L .0 1 6 .0 2 6 0 .4 1 0. 6 6 θ 0° 6° 0° 6° e 1 R E C O M M E N D E D F O O T P R IN T θ 1 .0 4 ( .0 4 1 ) 8X A - C B 0 .1 0 (.0 0 4 ) A 1 8X 0 .0 8 (.0 0 3 ) M C L 8X A S B S 0 .3 8 8 X ( .0 1 5 ) C 8X 3 .2 0 ( .1 2 6 ) 4 .2 4 5 .2 8 ( .1 6 7 ) ( . 2 08 ) N OT ES : 1 D IM EN SION IN G A ND T OLE RA N C IN G P ER AN SI Y14 .5M -1982. 0. 6 5 6 X ( .0 2 5 6 ) 2 C O N TR OLL IN G D IM EN SION : INC H . 3 D IM EN SION S DO N OT IN C LU D E M OLD F LAS H . Part Marking Information Micro8 A D AT E C O D E ( YW W ) Y = L AS T D IG IT O F YEA R W W = W E EK E XAM PL E : T H IS IS AN IR F 75 0 1 4 51 7501 PA R T N U M B ER TO P IRF7506 Tape & Reel Information Micro8 Dimensions are shown in millimeters (inches) T E R M IN AL N U M B E R 1 12 .3 ( .48 4 ) 11 .7 ( .46 1 ) 8 .1 ( . 31 8 ) 7 .9 ( . 31 2 ) F EE D D IR E C T IO N N O TE S : 1 . O U TLIN E CO N FO R M S TO E IA -48 1 & EIA- 541 . 2 . C O NTRO L LIN G D IM E NSIO N : MILL IM ETE R. 3 30. 00 (12 .99 2) M A X. 14 .40 ( .56 6 ) 12 .40 ( .48 8 ) NO TE S : 1. C O N T R O LLIN G D IM EN SIO N : M ILL IM E T ER . 2. O U T LIN E C O N F O R M S T O E IA -481 & EIA -54 1. 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