PD - 95854
IRL3705Z
IRL3705ZS
IRL3705ZL
AUTOMOTIVE MOSFET
Features
l
l
l
l
l
l
Logic Level
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
HEXFET® Power MOSFET
D
VDSS = 55V
RDS(on) = 8.0mΩ
G
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
ID = 75A
S
D2Pak
IRL3705ZS
TO-220AB
IRL3705Z
TO-262
IRL3705ZL
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally limited)
EAS (Tested )
IAR
EAR
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
86
61
75
340
130
0.88
± 16
120
180
See Fig.12a, 12b, 15, 16
c
d
c
h
g
i
Thermal Resistance
Parameter
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient (PCB Mount)
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i
i
j
Units
A
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300 (1.6mm from case )
10 lbf in (1.1N m)
y
y
Typ.
Max.
Units
°C/W
–––
1.14
0.50
–––
–––
62
–––
40
1
3/3/04
IRL3705Z/S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
gfs
IDSS
IGSS
Min. Typ. Max. Units
55
–––
–––
–––
–––
1.0
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.055
6.5
–––
–––
–––
–––
–––
–––
–––
–––
40
12
21
17
240
26
83
–––
–––
8.0
11
12
3.0
–––
20
250
200
-200
60
–––
–––
–––
–––
–––
–––
–––
4.5
–––
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
LS
Internal Source Inductance
–––
7.5
–––
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
2880
420
–––
–––
–––
–––
–––
–––
220
1500
330
510
–––
–––
–––
–––
Conditions
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 52A
mΩ VGS = 5.0V, ID = 43A
VGS = 4.5V, ID = 30A
V VDS = VGS, ID = 250µA
V VDS = 25V, ID = 52A
µA VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA VGS = 16V
VGS = -16V
ID = 43A
nC VDS = 44V
VGS = 5.0V
VDD = 28V
ns ID = 43A
RG = 4.3 Ω
VGS = 5.0V
e
e
e
e
e
nH
pF
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = 25V
D
G
S
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
75
ISM
(Body Diode)
Pulsed Source Current
–––
–––
340
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
16
7.4
1.3
24
11
2
c
Conditions
MOSFET symbol
A
V
ns
nC
D
showing the
integral reverse
G
p-n junction diode.
TJ = 25°C, IS = 52A, VGS = 0V
TJ = 25°C, IF = 43A, VDD = 28V
di/dt = 100A/µs
e
S
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRL3705Z/S/L
1000
1000
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
1
2.8V
0.1
BOTTOM
10
2.8V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
0.01
0.1
1
10
100
0.1
1000
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
120
Gfs, Forward Transconductance (S)
1000
ID, Drain-to-Source Current (Α)
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
T J = 175°C
100
10
TJ = 25°C
1
VDS = 15V
≤60µs PULSE WIDTH
T J = 25°C
100
80
60
T J = 175°C
40
20
V DS = 8.0V
0
0.1
0
2
4
6
8
10
12
14
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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16
0
20
40
60
80
100
120
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
3
IRL3705Z/S/L
100000
6.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 52A
C, Capacitance(pF)
C oss = Cds + C gd
10000
Ciss
1000
Coss
Crss
VDS= 44V
VDS= 28V
VDS= 11V
5.0
4.0
3.0
2.0
1.0
100
0.0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
10
20
30
40
QG Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000
1000.00
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
TJ = 175°C
100.00
100
T J = 25°C
10.00
100µsec
10
VGS = 0V
10msec
1
1.00
0.0
0.5
1.0
1.5
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
2.0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRL3705Z/S/L
100
90
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
Limited By Package
ID, Drain Current (A)
80
70
60
50
40
30
20
10
0
ID = 43A
VGS = 5.0V
1.5
1.0
0.5
25
50
75
100
125
150
-60 -40 -20 0
175
T C , Case Temperature (°C)
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
τJ
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
R1
R1
τJ
τ1
R2
R2
τC
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
τ
Ri (°C/W)
0.5413
τi (sec)
0.000384
0.5985
0.002778
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3705Z/S/L
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
VGS
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
500
15V
ID
5.7A
8.5A
BOTTOM 52A
TOP
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGD
3.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
VGS(th) Gate threshold Voltage (V)
QGS
2.5
2.0
ID = 250µA
1.5
1.0
DUT
0
0.5
1K
-75 -50 -25
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage vs. Temperature
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IRL3705Z/S/L
100
Duty Cycle = Single Pulse
Avalanche Current (A)
0.01
10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
0.05
0.10
1
0.1
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
150
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 52A
125
100
75
50
25
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
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175
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRL3705Z/S/L
D.U.T
Driver Gate Drive
+
+
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRL3705Z/S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
14.09 (.555)
13.47 (.530)
IGBTs, CoPACK
2 - DRAIN
1- GATE
3 - SOURCE
2- DRAIN
3- SOURCE
4 - DRAIN
4- DRAIN
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
1.40 (.055)
3X
1.15 (.045)
LEAD ASSIGNMENTS
HEXFET
1 - GATE
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
0.55 (.022)
0.46 (.018)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
(;$03/( 7+,6,6$1,5)
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
Note: "P" in assembly line
position indicates "Lead-Free"
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
www.irf.com
3$57180%(5
'$7(&2'(
<($5 :((.
/,1(&
9
IRL3705Z/S/L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
7+,6,6$1,5)6:,7+
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(/
1RWH3LQDVVHPEO\OLQH
SRVLWLRQLQGLFDWHV/HDG)UHH
10
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
)6
'$7(&2'(
<($5 :((.
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IRL3705Z/S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
1- GATE
IGBT
2- COLLECTOR
TO-262 Part Marking Information
/
/
,5
1
$
,6
,6
7+
(
3/
0
;$
(
(5
),
7,
(&
5
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1
2
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/(
%
(0
66
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7,
$
1
5
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0
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11
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IRL3705Z/S/L
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11).
avalanche performance.
Limited by TJmax, starting TJ = 25°C, L = 0.09mH This value determined from sample failure population. 100%
RG = 25Ω, IAS = 52A, VGS =10V. Part not
tested to this value in production.
recommended for use above this value.
This is only applied to TO-220AB pakcage.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
This is applied to D2Pak, when mounted on 1" square PCB (FR Coss eff. is a fixed capacitance that gives the
4 or G-10 Material). For recommended footprint and soldering
same charging time as Coss while VDS is rising
techniques refer to application note #AN-994.
from 0 to 80% VDSS .
Rθ is measured at TJ of approximately 90°C.
Repetitive rating; pulse width limited by
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/04
12
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