PD - 9.1329B
IRLIZ34N
HEXFET® Power MOSFET
l
l
l
l
l
l
Logic-Level Gate Drive
Advanced Process Technology
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. = 4.8mm
Fully Avalanche Rated
D
VDSS = 55V
RDS(on) = 0.035Ω
G
Description
ID = 22A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
Units
22
15
110
37
0.24
±16
110
16
3.7
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
4.1
65
°C/W
8/25/97
IRLIZ34N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
–––
–––
1.0
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.065
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.9
100
29
21
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.035
VGS = 10V, ID = 12A
0.046
Ω
VGS = 5.0V, ID = 12A
0.060
VGS = 4.0V, ID = 10A
2.0
V
VDS = VGS, I D = 250µA
–––
S
VDS = 25V, ID = 16A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
25
ID = 16A
5.2
nC VDS = 44V
14
V GS = 5.0V, See Fig. 6 and 13
–––
VDD = 28V
–––
ID = 16A
ns
–––
RG = 6.5Ω, VGS = 5.0V
–––
RD = 1.8Ω, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
from package
7.5 –––
and center of die contact
880 –––
VGS = 0V
220 –––
pF
VDS = 25V
94 –––
ƒ = 1.0MHz, See Fig. 5
12 –––
ƒ = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
–––
–––
22
–––
–––
110
–––
–––
–––
–––
76
190
1.3
110
290
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 12A, VGS = 0V
TJ = 25°C, IF = 16A
di/dt = 100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
t=60s, ƒ=60Hz
Uses IRLZ34N data and test conditions
D
G
S
IRLIZ34N
10000
10000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTT OM 2.0V
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.75V
2.50V
BOTTOM 2.25V
TOP
TOP
100
1000
ID , D ra in -to -S o u rc e C u rre n t (A )
I D , D ra in -to -S o u rc e C u rre n t (A )
1000
10
1
0.1
2.0 V
0.01
2 0µ s PU LS E W ID TH
T J = 2 5°C
A
0.001
0.1
1
10
100
10
1
2 .0V
0.1
0.01
2 0µ s PU L SE W ID TH
T J = 1 75 °C
0.001
0.1
100
Fig 1. Typical Output Characteristics
3.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
I D , D r ain- to-S ourc e C urre nt (A )
T J = 2 5 °C
100
TJ = 1 7 5 ° C
10
1
0.1
V DS = 2 5 V
2 0µ s PU L SE W ID TH
3
4
5
6
7
8
9
V G S , G ate-to -S ource V olta ge (V )
Fig 3. Typical Transfer Characteristics
A
100
Fig 2. Typical Output Characteristics
1000
2
10
V D S , Drain-to-S ource Voltage (V )
V D S , Drain-to-Source V oltage (V)
0.01
1
10
A
I D = 27 A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
-60 -40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRLIZ34N
15
V GS
C iss
C rs s
C iss C oss
C , C a p a cita n c e (p F )
1200
= 0 V,
f = 1 MH z
= C gs + C gd , Cd s SH O R TED
= C gd
= C ds + C gd
V G S , G a te -to -S o u rce V o lta g e (V )
1400
1000
800
C os s
600
400
C rs s
200
0
1
10
100
A
I D = 1 6A
V D S = 44 V
V D S = 28 V
12
9
6
3
FOR TE ST C IR CU IT
SE E FIG U RE 13
0
0
4
V D S , Drain-to-Source Voltage (V )
12
16
20
24
28
A
32
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
I D , D ra in C u rre n t (A )
I S D , R e v e rse D ra in C u rre n t (A )
8
100
T J = 17 5°C
TJ = 2 5°C
10
100
10µ s
1 00µs
10
1m s
VG S = 0 V
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
V S D , S ource-to-Drain Voltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.0
T C = 25 °C
T J = 17 5°C
S ing le Pulse
1
1
10m s
A
10
V D S , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
100
IRLIZ34N
25
RD
VDS
VGS
20
D.U.T.
ID , Drain Current (A)
RG
+
-VDD
15
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
5
VDS
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( ° C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10%
VGS
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response
(Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
0.01
0.00001
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
IRLIZ34N
D.U.T.
RG
+
V
- DD
IAS
5.0 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
250
L
VDS
TOP
BO TTOM
200
ID
6 .6A
11A
16 A
150
100
50
V D D = 2 5V
0
25
tp
50
A
75
100
125
150
Starting TJ , Junction T emperature (°C)
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRLIZ34N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRLIZ34N
Package Outline
TO-220 FullPak Outline
Dimensions are shown in millimeters (inches)
1 0.60 (.417)
1 0.40 (.409)
ø
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
-A 3.70 (.145)
3.20 (.126)
16.00 (.630)
15.80 (.622)
2.80 (.110)
2.60 (.102)
LE AD AS SIGN M EN T S
1 - GA TE
2 - D R AIN
3 - SO U RC E
7.10 (.2 80)
6.70 (.2 63)
1.15 (.045)
M IN .
1
2
N OT ES :
1 D IME N SION IN G & T OLE R AN C IN G
PER A NS I Y 14.5M , 1982
3
2 C ON T R OLLIN G D IM EN SION : IN CH .
3.30 (.130)
3.10 (.122)
-B 13.70 (.540)
13.50 (.530)
C
3X
1.40 (.055)
1.05 (.042)
3X
3X
0.90 (.0 35 )
0.70 (.0 28 )
0.25 (.010)
M
A M
B
2.54 (.100)
2X
0.48 (.019)
0.44 (.017)
2 .85 (.112)
2 .65 (.104)
A
D
B
M IN IM U M C RE EPA GE
D IS TA NC E BET W EE N
A-B-C -D = 4.80 (.189)
Part Marking Information
TO-220 FullPak
E XAM PLE : T HIS IS A N IRF I840G
W ITH AS SE MBLY
LOT CODE E401
A
INT ER NAT IONA L
RE CTIF IER
LOGO
PA RT NU MBE R
IRF I840G
E 401 9 24 5
AS SE MBLY
LOT COD E
D ATE CODE
(YYW W )
YY = YE AR
W W = W E EK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97