IRF JANSR2N7261U

PD - 91806B
RADIATION HARDENED
POWER MOSFET
SURFCACE MOUNT(LCC-18)
IRHE7130
JANSR2N7261U
100V, N-CHANNEL
REF: MIL-PRF-19500/601
®
™
RAD Hard HEXFET TECHNOLOGY
Product Summary
Part Number Radiation Level R DS(on)
IRHE7130
100K Rads (Si)
0.18Ω
IRHE3130
300K Rads (Si)
0.18Ω
IRHE4130
600K Rads (Si)
0.18Ω
IRHE8130
1000K Rads (Si) 0.18Ω
ID
8.0A
8.0A
8.0A
8.0A
QPL Part Number
JANSR2N7261U
JANSF2N7261U
JANSG2N7261U
JANSH2N7261U
LCC-18
HEXFET® technol-
International Rectifier’s RADHard
ogy provides high performance power MOSFETs for
space applications. This technology has over a decade of proven performance and reliability in satellite
applications. These devices have been characterized for both Total Dose and Single Event Effects (SEE).
The combination of low Rdson and low gate charge
reduces the power losses in switching applications
such as DC to DC converters and motor control. These
devices retain all of the well established advantages
of MOSFETs such as voltage control, fast switching,
ease of paralleling and temperature stability of electrical parameters.
Features:
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Single Event Effect (SEE) Hardened
Low RDS(on)
Low Total Gate Charge
Proton Tolerant
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
ID @ VGS = 12V, TC = 25°C
ID @ VGS = 12V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
Storage Temperature Range
Package Mounting Surface Temperature
Weight
Units
8.0
5.0
32
25
0.20
±20
130
—
—
5.5
-55 to 150
A
W
W/°C
V
mJ
A
mJ
V/ns
o
300 ( for 5s)
0.42 (Typical )
C
g
For footnotes refer to the last page
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1
7/3/01
IRHE7130
Pre-Irradiation
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min
BVDSS
Drain-to-Source Breakdown Voltage
∆BV DSS /∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Typ Max Units
100
—
—
V
—
0.10
—
V/°C
—
—
2.0
2.5
—
—
—
—
—
—
—
—
0.18
0.185
4.0
—
25
250
Ω
IGSS
IGSS
Qg
Q gs
Qgd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.1
100
-100
50
12
20
25
55
55
45
—
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
1100
310
55
—
—
—
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
nC
VGS = 12V, ID =5.0A ➃
VGS = 12V, ID = 8.0A
VDS = VGS, ID = 1.0mA
VDS > 15V, IDS = 5.0A ➃
VDS= 80V ,VGS=0V
VDS = 80V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =12V, ID =8.0A
VDS = 50V
ns
VDD = 50V, ID =8.0A
VGS =12V, RG = 7.5Ω
V
S( )
Ω
Electrical Characteristics
µA
nA
Measured from the center of drain
pad to center of source pad
nH
VGS = 0V, VDS = 25V
f = 1.0MHz
pF
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
ISM
VSD
t rr
Q RR
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
ton
Forward Turn-On Time
—
—
—
—
—
—
—
—
—
—
8.0
32
1.5
350
3.0
Test Conditions
A
V
nS
µC
Tj = 25°C, IS = 8.0A, VGS = 0V ➃
Tj = 25°C, IF = 8.0A, di/dt ≤ 100A/µs
VDD ≤ 50V ➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
R thJC
RthJ-PCB
Junction-to-Case
Junction-to-PC Board
Min Typ Max Units
—
—
—
19
5.0
—
°C/W
Test Conditions
Soldered to a copper clad PC board
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
2
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Pre-Irradiation
Radiation Characteristics
IRHE7130
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ➄➅
Parameter
BVDSS
V/5JD
IGSS
IGSS
IDSS
RDS(on)
RDS(on)
VSD
100K Rads(Si)
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source" ➃
On-State Resistance (TO-3)
Static Drain-to-Source" ➃
On-State Resistance (LCC-18)
Diode Forward Voltage" ➃
Min
Max
100
2.0
—
—
—
—
300 - 1000K Rads (Si)
Test Conditions
U
nits
Units
Min
Max
—
4.0
100
-100
25
0.18
100
1.25
—
—
—
—
—
4.5
100
-100
50
0.24
µA
Ω
—
0.18
—
0.24
Ω
VGS = 12V, ID =5.0A
—
1.5
—
1.5
V
VGS = 0V, IS = 8.0A
VGS = 0V, ID = 1.0mA
VGS = VDS, ID = 1.0mA
VGS = 20V
VGS = -20 V
VDS=80V, VGS =0V
VGS = 12V, ID =5.0A
V
nA
1. Part numbers IRHE7130, (JANSR2N7261U)
2. Part number IRHE8130,I RHE3130, and IRHE4130(JANSF2N7261U, JANSG2N7261U, JANSH2N7261U)
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
Cu
Br
LET
MeV/(mg/cm ))
28
36.8
VDS(V)
Range
@VGS=0V @VGS=-5V@VGS=-10V@VGS=-15V@VGS=-20V
(µm)
43
100
100
100
80
60
39
100
90
70
50
—
Energy
(MeV)
285
305
120
100
VDS
80
Cu
60
Br
40
20
0
0
-5
-10
-15
-20
-25
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHE7130
Post-Irradiation
Pre-Irradiation
Fig 1. Typical Response of Gate Threshhold Fig 2. Typical Response of On-State Resistance
Vs. Total Dose Exposure
Voltage Vs. Total Dose Exposure
Fig 3. Typical Response of Transconductance
Vs. Total Dose Exposure
4
Fig 4. Typical Response of Drain to Source
Breakdown Vs. Total Dose Exposure
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Post-Irradiation
Pre-Irradiation
Fig 5. Typical Zero Gate Voltage Drain
Current Vs. Total Dose Exposure
IRHE7130
Fig 6. Typical On-State Resistance Vs.
Neutron Fluence Level
Fig 8a. Gate Stress of
VGSS Equals 12 Volts During
Radiation
Fig 7. Typical Transient Response
of Rad Hard HEXFET During 1x1012
Rad (Si)/Sec Exposure
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Fig 8b. VDSS Stress Equals
80% of BVDSS During Radiation
5
RadiationPost-Irradiation
Characteristics
Pre-Irradiation
IRHE7130
Note: Bias Conditions during radiation: V/5 = 12 Vdc, V,5 = 0 Vdc
Fig 9. Typical Output Characteristics
Pre-Irradiation
Fig 10. Typical Output Characteristics
Post-Irradiation 100K Rads (Si)
Fig 11. Typical Output Characteristics
Post-Irradiation 300K Rads (Si)
Fig 12. Typical Output Characteristics
Post-Irradiation 1 Mega Rads (Si)
6
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Radiation Characteristics
Pre-Irradiation
IRHE7130
Note: Bias Conditions during radiation: V/5 = 0 Vdc, V,5 = 80 Vdc
Fig 13. Typical Output Characteristics
Pre-Irradiation
Fig 14. Typical Output Characteristics
Post-Irradiation 100K Rads (Si)
Fig 15. Typical Output Characteristics
Post-Irradiation 300K Rads (Si)
Fig 16. Typical Output Characteristics
Post-Irradiation 1 Mega Rads (Si)
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IRHE7130
Fig 17. Typical Output Characteristics
Fig 19. Typical Transfer Characteristics
8
Pre-Irradiation
Fig 18. Typical Output Characteristics
Fig 20. Normalized On-Resistance
Vs. Temperature
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Pre-Irradiation
IRHE7130
29
Fig 21. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 22. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 23. Typical Source-Drain Diode
Forward Voltage
Fig 24. Maximum Safe Operating
Area
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IRHE7130
Pre-Irradiation
VDS
VGS
RD
D.U.T.
RG
+
-VDD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 26a. Switching Time Test Circuit
VDS
90%
10%
VGS
Fig 25. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 26b. Switching Time Waveforms
Fig 27. Maximum Effective Transient Thermal Impedance, Junction-to-Case
10
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Pre-Irradiation
IRHE7130
15V
L
VDS
D.U.T
RG
V/5
20V
IAS
DRIVER
+
- VDD
A
0.01Ω
tp
Fig 28a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
Fig 28c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 28b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
12 V
QGS
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 29a. Basic Gate Charge Waveform
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D.U.T.
IG
ID
Current Sampling Resistors
Fig 29b. Gate Charge Test Circuit
11
IRHE7130
Pre-Irradiation
Foot Notes:
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ VDD = 25V, starting TJ = 25°C, L=4.1mH
Peak IL = 8.0A, VGS =12V
➂ ISD ≤ 8.0A, di/dt ≤ 140A/µs,
VDD ≤ 100V, TJ ≤ 150°C
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
➄ Total Dose Irradiation with VGS Bias.
12 volt VGS applied and VDS = 0 during
irradiation per MIL-STD-750, method 1019, condition A.
➅ Total Dose Irradiation with VDS Bias.
80 volt VDS applied and VGS = 0 during
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — LCC-18
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Data and specifications subject to change without notice. 07/01
12
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