IPD50N10S3L-16 OptiMOS®-T Power-Transistor Product Summary V DS 100 V R DS(on),max 15 mΩ ID 50 A Features PG-TO252-3-11 • N-channel - Enhancement mode • Automotive AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green product (RoHS compliant) • 100% Avalanche tested Type Package Marking IPD50N10S3L-16 PG-TO252-3-11 QN10L16 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current ID Conditions Value T C=25°C, V GS=10V 50 T C=100°C, V GS=10V1) 38 Unit A Pulsed drain current1) I D,pulse T C=25°C 200 Avalanche energy, single pulse1) E AS I D=25A 330 mJ Avalanche current, single pulse I AS 50 A Gate source voltage2) V GS ±20 V Power dissipation P tot 100 W Operating and storage temperature T j, T stg -55 ... +175 °C T C=25 °C IEC climatic category; DIN IEC 68-1 Rev. 1.1 55/175/56 page 1 2008-04-09 IPD50N10S3L-16 Parameter Symbol Values Conditions Unit min. typ. max. - - 1.5 minimal footprint - - 62 6 cm2 cooling area3) - - 40 Thermal characteristics1) Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0V, I D= 1mA 100 - - Gate threshold voltage V GS(th) V DS=V GS, I D=60µA 1.2 1.7 2.4 Zero gate voltage drain current I DSS V DS=80V, V GS=0V, T j=25°C - 0.01 0.1 - 1 10 V DS=80V, V GS=0V, T j=125°C1) V µA Gate-source leakage current I GSS V GS=16V, V DS=0V - - 100 nA Drain-source on-state resistance R DS(on) V GS=4.5V, I D=50A - 15.3 19.9 mΩ V GS=10 V, I D=50 A - 12.5 15.0 Rev. 1.1 page 2 2008-04-09 IPD50N10S3L-16 Parameter Symbol Values Conditions Unit min. typ. max. - 3215 4180 - 730 950 Dynamic characteristics1) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 63 95 Turn-on delay time t d(on) - 10 - Rise time tr - 5 - Turn-off delay time t d(off) - 29 - Fall time tf - 5 - Gate to source charge Q gs - 9 12 Gate to drain charge Q gd - 8 12 Gate charge total Qg - 49 64 Gate plateau voltage V plateau - 3.7 - V - - 50 A - - 200 0.6 1 1.2 V - 97 - ns - 178 - nC V GS=0V, V DS=25V, f =1MHz V DD=20V, V GS=10V, I D=50A, R G=3.5Ω pF ns Gate Charge Characteristics1) V DD=80V, I D=50A, V GS=0 to 10V nC Reverse Diode Diode continous forward current1) IS Diode pulse current1) I S,pulse Diode forward voltage V SD V GS=0V, I F=50A, T j=25°C Reverse recovery time1) t rr V R=50V, I F=I S, di F/dt =100A/µs Reverse recovery charge1) Q rr 1) Defined by design. Not subject to production test. 2) Qualified with VGS = +20/-5V. T C=25°C 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.1 page 3 2008-04-09 IPD50N10S3L-16 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 6 V 120 60 100 50 80 40 I D [A] P tot [W] 1 Power dissipation 60 30 40 20 20 10 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 101 1 µs 100 0.5 I D [A] Z thJC [K/W] 10 µs 100 100 µs 0.1 10-1 0.05 0.01 10 10-2 1 ms single pulse 10-3 1 0.1 1 10 100 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.1 10-6 page 4 2008-04-09 IPD50N10S3L-16 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 50 200 10 V 5V 3V 160 R DS(on) [mΩ] 120 I D [A] 4.5 V 40 4.5 V 4V 80 30 5V 20 3.5 V 40 4V 3.5 V 10 V 3V 0 10 0 1 2 3 4 5 6 0 40 80 V DS [V] 120 160 I D [A] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 50 A; V GS = 10 V parameter: T j 30 160 -55 °C 25 °C 25 120 R DS(on) [mΩ] I D [A] 175 °C 80 20 15 40 10 0 1 2 3 4 5 V GS [V] Rev. 1.1 5 -60 -20 20 60 100 140 180 T j [°C] page 5 2008-04-09 IPD50N10S3L-16 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 2.5 Ciss 2 C [pF] 300 µA V GS(th) [V] 60 µA 1.5 103 Coss 1 102 Crss 0.5 101 0 -60 -20 20 60 100 140 0 180 5 10 15 20 25 30 V DS [V] T j [°C] 11 Typical forward diode characteristicis 12 Typ. avalanche characteristics IF = f(VSD) I A S= f(t AV) parameter: T j parameter: T j(start) 100 103 25 °C 100 °C 102 150 °C I F [A] I AV [A] 10 101 175 °C 25 °C 0.6 0.8 1 100 0.1 0 0.2 0.4 1 1.2 1.4 V SD [V] Rev. 1.1 0.1 1 10 100 1000 t AV [µs] page 6 2008-04-09 IPD50N10S3L-16 13 Typical avalanche energy 14 Typ. drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D = 1 mA parameter: I D 115 600 12.5 A 500 110 300 V BR(DSS) [V] E AS [mJ] 400 25 A 105 100 200 50 A 95 100 90 0 25 75 125 -55 175 -15 T j [°C] 25 65 105 145 T j [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 50 A pulsed parameter: V DD 10 V GS 9 Qg 8 20 V 80 V 7 V GS [V] 6 5 V g s(th) 4 3 2 Q g (th) Q sw 1 Q gs 0 0 10 20 30 40 Q gate Q gd 50 Q gate [nC] Rev. 1.1 page 7 2008-04-09 IPD50N10S3L-16 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2008 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non‑infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.1 page 8 2008-04-09 IPD50N10S3L-16 Revision History Version Rev. 1.1 Changes Date 1.1 Page 1: VGS changed from ±16V 08.04.2008 to ±20V 1.1 08.04.2008 Page 3: Footnote 2) added 1.1 Page 1: EAS changed from 264mJ 09.04.2008 to 330mJ page 9 2008-04-09