INFINEON BF1005W

BF1005...
Silicon N-Channel MOSFET Tetrode
• For low noise, high gain controlled
input stages up to 1 GHz
• Operating voltage 5V
• Integrated biasing network
Drain
AGC
HF
Input
G2
G1
GND
HF Output
+ DC
EHA07215
ESD: Electrostatic discharge sensitive device, observe handling precaution!
Type
Package
Pin Configuration
Marking
BF1005
SOT143
1=S
2=D
3=G2
4=G1
-
-
MZs
BF1005R
SOT143R
1=D
2=S
3=G1
4=G2
-
-
MZs
BF1005W*
SOT343
1=D
2=S
3=G1
4=G2
-
-
MZ
* on request only
Maximum Ratings
Parameter
Symbol
Value
Drain-source voltage
VDS
Continuous drain current
ID
25
Gate 1/ gate 2-source current
±IG1/2SM
10
Gate 1 (external biasing)
+VG1SE
3
Total power dissipation
Ptot
8
Unit
V
mA
V
mW
TS ≤ 76 °C, BF1005, BF1005R
200
TS ≤ 94 °C, BF1005W
200
Storage temperature
Tstg
-55 ... 150
Channel temperature
Tch
150
°C
Note:
It is not recommended to apply external DC-voltage on Gate 1 in active mode.
1
Feb-18-2004
BF1005...
Thermal Resistance
Parameter
Symbol
Channel - soldering point 1)
Rthchs
Value
Unit
K/W
BF1005, BF1005R
≤ 370
BF1005W
≤ 280
Electrical Characteristics
Parameter
Symbol
Values
Unit
min.
typ.
max.
V(BR)DS
12
-
-
+V(BR)G1SS
8
-
12
±V (BR)G2SS
8
-
13
+IG1SS
-
100
-
µA
±IG2SS
-
-
50
nA
IDSS
-
-
1.5
mA
IDSO
8
10
16
VG2S(p)
-
1
-
DC Characteristics
Drain-source breakdown voltage
V
ID = 650 µA, VG1S = 0 , VG2S = 0
Gate1-source breakdown voltage
+IG1S = 10 mA, V G2S = 0 , VDS = 0
Gate2 source breakdown voltage
±IG2S = 10 mA, VG1S = 0 , V DS = 0
Gate1-source leakage current
VG1S = 0 , VG2S = 6 V
Gate 2 source leakage current
±V G2S = 8 V, VG1S = 0 , V DS = 0
Drain current
VDS = 5 V, VG1S = 0 , VG2S = 4 V
Operating current (selfbiased)
VDS = 5 V, VG2S = 4 V
Gate2-source pinch-off voltage
V
VDS = 5 V, I D = 100 µA
1For calculation of R
thJA please refer to Application Note Thermal Resistance
2
Feb-18-2004
BF1005...
Electrical Characteristics
Parameter
AC Characteristics
Symbol
Values
Unit
min.
typ.
max.
20
24
-
mS
Cg1ss
-
2.1
2.5
pF
Cdss
-
1.3
-
17
19
-
dB
-
1.6
2.5
dB
40
50
-
(verified by random sampling)
Forward transconductance
gfs
VDS = 5 V, V G2S = 4.5 V
Gate1 input capacitance
VDS = 5 V, V G2S = 4 V, f = 1 MHz
Output capacitance
VDS = 5 V, V G2S = 4 V, f = 100 MHz
Power gain (self biased)
Gp
VDS = 5 V, V G2S = 4 V, f = 800 MHz
Noise figure
F
VDS = 5 V, V G2S = 4 V, f = 800 MHz
∆G p
Gain control range
VDS = 5 V, V G2S = 4V ...0V, f = 800 GHz
3
Feb-18-2004
BF1005...
Total power dissipation Ptot = ƒ(TS)
BF1005, BF1005R
Total power dissipation Ptot = ƒ(TS)
BF1005W
220
220
mA
180
180
160
160
P tot
P tot
mW
140
140
120
120
100
100
80
80
60
60
40
40
20
20
0
0
15
30
45
60
75
90 105 120 °C
0
0
150
15
30
45
60
75
90 105 120 °C
TS
150
TS
Drain current ID = ƒ(VG2S)
Insertion power gain
|S21|² = ƒ(VG2S)
10
dB
12
mA
0
10
-5
|S21|²
9
ID
8
7
-10
-15
-20
6
-25
5
-30
4
-35
3
-40
2
-45
1
-50
0
0
0.5
1
1.5
2
2.5
3
3.5
4
V
-55
0
5
VG2S
0.5
1
1.5
2
2.5
3
3.5
4
V
5
VG2S
4
Feb-18-2004
BF1005...
Gate 1 input capacitance Cg1ss= ƒ(Vg2s)
f = 200MHz
Forward transfer admittance
|Y21| = ƒ(VG2S)
26
mS
pF
3
22
2.4
18
Cg1ss
|Y 21|
20
16
2.2
2
1.8
14
1.6
12
1.4
10
1.2
1
8
0.8
6
0.6
4
0.4
2
0
0
0.2
0.5
1
1.5
2
2.5
3
3.5
V
4
0
0.5
5
VG2S
1
1.5
2
2.5
3
3.5
4
4.5
V
5.5
VG2S
Output capacitance C dss = ƒ(VG2S)
f = 200MHz
pF
3
2.4
Cdss
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
0.5
1
1.5
2
2.5
3
3.5
4
V
5
VG2S
5
Feb-18-2004