PD - 95517 SMPS MOSFET IRFP15N60LPbF HEXFET® Power MOSFET Applications • Zero Voltage Switching SMPS • Telecom and Server Power Supplies • Uninterruptible Power Supplies • Motor Control applications • Lead-Free VDSS RDS(on) typ. Trr typ. ID 385mΩ 600V 130ns Features and Benefits • SuperFast body diode eliminates the need for external diodes in ZVS applications. • Lower Gate charge results in simpler drive requirements. • Enhanced dv/dt capabilities offer improved ruggedness. • Higher Gate voltage threshold offers improved noise immunity . 15A TO-247AC Absolute Maximum Ratings Parameter Max. Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM 9.7 PD @TC = 25°C Power Dissipation 280 W 2.3 ±30 W/°C V 10 -55 to + 150 V/ns 15 c VGS Linear Derating Factor Gate-to-Source Voltage d dv/dt TJ Peak Diode Recovery dv/dt TSTG Storage Temperature Range A 60 Operating Junction and °C Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 screw 1.1(10) N•m (lbf•in) Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current ––– ––– 15 ISM (Body Diode) Pulsed Source Current ––– ––– 60 showing the integral reverse p-n junction diode. TJ = 25°C, IS = 15A, VGS = 0V c MOSFET symbol A (Body Diode) VSD Diode Forward Voltage ––– ––– 1.5 V trr Reverse Recovery Time ––– 130 200 ns ––– 240 360 ––– 450 670 ––– 1080 1620 Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ton Forward Turn-On Time www.irf.com ––– 5.8 8.7 nC D G f S TJ = 25°C, IF = 15A TJ = 125°C, di/dt = 100A/µs f T = 25°C, I = 15A, V = 0V f T = 125°C, di/dt = 100A/µs f J S GS J A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 1 07/07/04 IRFP15N60LPbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V(BR)DSS Drain-to-Source Breakdown Voltage 600 ––– ––– V Conditions VGS = 0V, ID = 250µA ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.39 ––– V/°C Reference to 25°C, ID = 1mA RDS(on) Static Drain-to-Source On-Resistance ––– 385 460 VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 mΩ V VDS = VGS, ID = 250µA IDSS Drain-to-Source Leakage Current ––– ––– 50 µA VDS = 600V, VGS = 0V ––– ––– 2.0 mA VDS = 480V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 30V Gate-to-Source Reverse Leakage ––– ––– -100 Internal Gate Resistance ––– 0.79 ––– Ω f = 1MHz, open drain IGSS RG VGS = 10V, ID = 9.0A f VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units S Conditions gfs Qg Forward Transconductance 8.3 ––– ––– VDS = 50V, ID = 9.0A Total Gate Charge ––– ––– 100 Qgs Gate-to-Source Charge ––– ––– 30 Qgd Gate-to-Drain ("Miller") Charge ––– ––– 46 td(on) Turn-On Delay Time ––– 20 ––– tr Rise Time ––– 44 ––– td(off) tf Turn-Off Delay Time Fall Time ––– ––– 28 5.5 ––– ––– RG = 1.8Ω VGS = 10V, See Fig. 11a & 11b Ciss Input Capacitance ––– 2720 ––– VGS = 0V Coss Output Capacitance ––– 260 ––– Crss Reverse Transfer Capacitance ––– 20 ––– Coss eff. Effective Output Capacitance ––– 120 ––– Coss eff. (ER) Effective Output Capacitance ––– 100 ––– ID = 15A nC VDS = 480V VGS = 10V, See Fig. 7 & 15 f VDD = 300V ns ID = 15A f VDS = 25V pF ƒ = 1.0MHz, See Fig. 5 VGS = 0V,VDS = 0V to 480V g (Energy Related) Avalanche Characteristics Symbol EAS Parameter Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy c d c Typ. ––– Max. 320 Units mJ ––– 15 A ––– 28 mJ Units Thermal Resistance Typ. Max. RθJC Symbol Junction-to-Case Parameter ––– 0.44 RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– RθJA Junction-to-Ambient ––– 40 Notes: Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) Starting TJ = 25°C, L = 2.9mH, RG = 25Ω, IAS = 15A, dv/dt = 10V/ns. (See Figure 12a) ISD ≤ 15A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. 2 °C/W Pulse width ≤ 300µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% VDSS . www.irf.com IRFP15N60LPbF 1000 100 100 10 BOTTOM VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 1 5.0V 0.1 0.01 10 BOTTOM VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V 5.0V 1 0.1 20µs PULSE WIDTH Tj = 150°C 20µs PULSE WIDTH Tj = 25°C 0.001 0.01 0.1 1 10 100 0.1 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 10 100 Fig 2. Typical Output Characteristics 1000 3.0 100 T J = 150°C 10 1 T J = 25°C 0.1 VDS = 50V 20µs PULSE WIDTH 0.01 ID = 15A 2.5 VGS = 10V 2.0 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (Α) 1 VDS, Drain-to-Source Voltage (V) 1.5 1.0 0.5 0.0 4 6 8 10 12 14 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 16 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C) Fig 4. Normalized On-Resistance vs. Temperature 3 IRFP15N60LPbF 100000 10000 20 Coss = Cds + Cgd Ciss Energy (µJ) C, Capacitance(pF) 25 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd 1000 Coss 100 Crss 15 10 5 10 0 1 1 10 100 0 1000 VDS, Drain-to-Source Voltage (V) 200 300 400 500 600 700 VDS, Drain-to-Source Voltage (V) Fig 6. Typ. Output Capacitance Stored Energy vs. VDS Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 12.0 100.00 ID= 15A VDS= 480V VDS= 300V 10.0 ISD, Reverse Drain Current (A) VGS , Gate-to-Source Voltage (V) 100 VDS= 120V 8.0 6.0 4.0 2.0 T J = 150°C 10.00 T J = 25°C 1.00 VGS = 0V 0.0 0.10 0 10 20 30 40 50 60 Q G Total Gate Charge (nC) Fig 7. Typical Gate Charge vs. Gate-to-Source Voltage 4 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig 8. Typical Source-Drain Diode Forward Voltage www.irf.com IRFP15N60LPbF ID, Drain-to-Source Current (A) 1000 16 OPERATION IN THIS AREA LIMITED BY R DS(on) 14 12 ID, Drain Current (A) 100 10 100µsec 1msec 1 Tc = 25°C Tj = 150°C Single Pulse 10 8 6 4 2 10msec 0.1 0 1 10 100 1000 10000 25 VDS, Drain-to-Source Voltage (V) VGS RG RD 100 125 150 Fig 10. Maximum Drain Current vs. Case Temperature VDS 90% D.U.T. + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 11a. Switching Time Test Circuit www.irf.com 75 T C , Case Temperature (°C) Fig 9. Maximum Safe Operating Area VDS 50 10% VGS td(on) tr t d(off) tf Fig 11b. Switching Time Waveforms 5 IRFP15N60LPbF Thermal Response ( Z thJC ) 1 D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 0.01 P DM t1 0.001 SINGLE PULSE ( THERMAL RESPONSE ) t2 Notes: 1. Duty factor D = 2. Peak T 0.0001 1E-006 1E-005 0.0001 0.001 0.01 t1 / t 2 J = P DM x Z thJC +TC 0.1 t1 , Rectangular Pulse Duration (sec) Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case VGS(th) Gate threshold Voltage (V) 5.0 4.5 4.0 3.5 ID = 250µA 3.0 2.5 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) Fig 13. Threshold Voltage vs. Temperature 6 www.irf.com 1 IRFP15N60LPbF EAS , Single Pulse Avalanche Energy (mJ) 600 ID TOP 6.7A 9.5A BOTTOM 15A 500 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 14a. Maximum Avalanche Energy vs. Drain Current 15V V(BR)DSS DRIVER L VDS D.U.T RG + - VDD IAS 20V tp tp A 0.01Ω I AS Fig 14b. Unclamped Inductive Test Circuit Fig 14c. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50KΩ 12V VGS V .2µF .3µF D.U.T. QGS + V - DS QGD VG VGS 3mA IG ID Current Sampling Resistors Fig 15a. Gate Charge Test Circuit www.irf.com Charge Fig 15b. Basic Gate Charge Waveform 7 IRFP15N60LPbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T + - - + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET® Power MOSFETs 8 www.irf.com IRFP15N60LPbF TO-247AC Package Outline Dimensions are shown in millimeters (inches) TO-247AC Part Marking Information EXAMPLE: THIS IS AN IRFPE30 WIT H ASS EMBLY LOT CODE 5657 ASS EMBLED ON WW 35, 2000 IN THE ASS EMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" PART NUMBER INT ERNATIONAL RECT IFIER LOGO IRFPE30 56 035H 57 AS S EMBLY LOT CODE DATE CODE YEAR 0 = 2000 WEEK 35 LINE H TO-247AC package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 www.irf.com 9