Chapter VI: In-Amp and Diff Amps Applications

Chapter VI
IN-AMP AND DIFF AMP APPLICATIONS CIRCUITS
Composite In-Amp Circuit Has Excellent High
Frequency CMR
The primary benefit of an in-amp circuit is that it
provides common-mode rejection.While the AD8221
and AD8225 both have an extended CMR frequency
range, most in-amps fail to provide decent CMR at
frequencies above the audio range.
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Figure 6-2. CMR of the Circuit in Figure 6-1 at 20 kHz
90
80
OUT3
70
OUT1
60
50
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OUT3
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40
100
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OUT1
OUTPUT SIGNAL
(1mV/DIV)
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UNCORRECTED
CMRR ERROR
(10mV/DIV)
CMRR (dB)
The circuit in Figure 6-1 is a composite instrumentation
amplifier with a high common-mode rejection ratio. It
features an extended frequency range over which the
instrumentation amplifier has good common-mode
rejection (Figure 6-2). The circuit consists of three instrumentation amplifiers. Two of these, U1 and U2, are
correlated to one another and connected in antiphase. It
is not necessary to match these devices because they are
correlated by design. Their outputs, OUT1 and OUT2,
drive a third instrumentation amplifier that rejects common-mode signals and amplifiers’ differential signals.
The overall gain of the system can be determined by
adding external resistors. Without any external resistors,
the system gain is 2 (Figure 6-3).The performance of the
circuit with a gain of 100 is shown in Figure 6-4.
VCM
COMMON-MODE
SIGNAL,
3.5V p-p @ 20kHz
(1V/DIV)
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1k
10k
FREQUENCY (Hz)
100k
Figure 6-3. CMRR vs. Frequency at a Gain of 2
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Figure 6-1. A Composite Instrumentation Amplifier
6-1
115
+VS
+
105
OUT3
CMRR (dB)
OUT1
U1
AD623
REF
–
OUT1
VDM
95
+
AD7825
+IN
–VS
VCM
85
+
DIGITAL
DATA
OUTPUT
–IN
+VS
+
+VS
VREF GND
OUT2
U2
AD623
REF
–
–VS
–VS
75
100
1k
10k
FREQUENCY (Hz)
Figure 6-5. The OUT1 and OUT2 signals of
the first stage can directly drive an analogto-digital converter, allowing the ADC to
reject the common-mode signal.
100k
Figure 6-4. CMR of the System at a Gain of 100
Since U1 and U2 are correlated, their common-mode
errors are the same. Therefore, these errors appear as
common-mode input signal to U3, which rejects
them. In fact, if it is necessary, OUT1 and OUT2 can
directly drive an analog-to-digital converter (ADC).
The differential-input stage of the ADC will reject the
common-mode signal, as seen in Figure 6-5.
STRAIN GAGE MEASUREMENT USING AN
AC EXCITATION
Strain gage measurements are often plagued by offset
drift, 1/f noise, and line noise. One solution is to use an
ac signal to excite the bridge, as shown in Figure 6-6.The
AD8221 gains the signal and an AD630AR synchronously
demodulates the waveform. What results is a dc output
proportional to the strain on the bridge. The output
signal is devoid of all dc errors associated with the in-amp
and the detector, including offset and offset drift.
+15V
+15V
350
350
0.1F
350
350
10F
+IN
AD8221
49.9
REF
–IN
0.1F
10F
+15V
9
11
SEL B
+VS
16
RA
17
RINB
19
CHB–
AD630AR
VOUT 13
CHA–
15
RF RINA SEL A –VS RB
1
4.99k
4.99k
2F
2F
2F
COMP 12
20
–15V
4.99k
10
8
14
–15V
Figure 6-6. Using an AC Signal to Excite the Bridge
6-2
OP1177
–15V
In Figure 6-6, a 400 Hz signal excites the bridge. The
signal at the AD8221’s input is an ac voltage. Similarly,
the signal at the input of the AD630 is ac; the signal is dc
at the end of the low-pass filter following the AD630.
The 400 Hz ac signal is rectified and then averaged; dc
errors are converted in an ac signal and removed by the
AD630. Ultimately, a precision dc signal is obtained.
The AD8221 is well suited for this application because
its high CMRR over frequency ensures that the signal
of interest, which appears as a small difference voltage
riding on a large sinusoidal common-mode voltage, is
gained and the common-mode signal is rejected. In
typical instrumentation amplifiers, CMRR falls off at
about 200 Hz. In contrast, the AD8221 continues to
reject common-mode signals beyond 10 kHz.
If an ac source is not available, a commutating voltage
may be constructed using switches. The AD8221’s high
CMRR over frequency rejects high frequency harmonics
from a commutating voltage source.
APPLICATIONS OF THE AD628 PRECISION
GAIN BLOCK
The AD628 can be operated as either a differential/scaling
amplifier or as a pin-strapped precision gain block.
Specifically designed for use ahead of an analog-to-digital
converter, the AD628 is extremely useful as an input
scaling and buffering amplifier. As a differential amplifier,
it can extract small differential voltages riding on large
common-mode voltages up to 120 V. As a prepackaged precision gain block, the pins of the AD628 can
be strapped to provide a wide range of precision gains,
allowing for high accuracy data acquisition with very
little gain or offset drift.
The AD628 uses an absolute minimum of external components. Its tiny MSOP provides these functions in the
smallest size package available on the market. Besides
high gain accuracy and low drift, the AD628 provides a
very high common-mode rejection, typically more than
90 dB at 1 kHz while still maintaining a 60 dB CMRR
at 100 kHz.
The AD628 includes a VREF pin to allow a dc (midscale)
offset for driving single-supply ADCs. In this case, the
VREF pin may simply be tied to the ADC’s reference pin,
which also allows easy ratiometric operation.
Why Use a Gain Block IC?
Real-world measurement requires extracting weak signals
from noisy sources. Even when a differential measurement
is made, high common-mode voltages are often present.
The usual solution is to use an op amp or, better still, an
in-amp, and then perform some type of low-pass filtering
to reduce the background noise level.
The problem with this traditional approach is that a
discrete op amp circuit will have poor common-mode
rejection and its input voltage range will always be less than
the power supply voltage. When used with a differential
signal source, an in-amp circuit using a monolithic IC
will improve common-mode rejection. However, signal
sources greater than the power supply voltage, or signals
riding on high common-mode voltages, cannot handle
C1
+15V
0.1F
CFILTER
4
+VS
10k
DIFFERENTIAL
INPUT SIGNAL
8
100k
AD628
– IN
10k
A1
VIN
1
100k
–VS
2
VOUT
TO ADC
+ IN
A2
+ IN
5
– IN
10k
VCM
7
VREF
RG
3
6
0.1F
RG
–15V
RF
Figure 6-7. Basic Differential Input Connection with Single-Pole LP Filter
6-3
standard in-amps. In addition, in-amps using a single
external gain resistor suffer from gain drift. Finally, lowpass filtering usually requires the addition of a separate
op amp, along with several external components. This
drains valuable board space.
The AD628 eliminates these common problems by
functioning as a scaling amplifier between the sensor,
the shunt resistor, or another point of data acquisition,
as well as the ADC. Its 120 V max input range permits
the direct measurement of large signals or small signals
riding on large common-mode voltages.
convenient gain higher than unity. When configured, the
AD628 may be set to provide circuit gains between 0.1
and 1,000.
Since the gain of A1 is 0.1, the combined gain of A1
and A2 equals
(
Therefore
(10G − 1) =
Standard Differential Input ADC Buffer Circuit
with Single-Pole LP Filter
Figure 6-7 shows the AD628 connected to accept a
differential input signal riding on a very high common-mode voltage. The AD628 gain block has two
internal amplifiers: A1 and A2. Pin 3 is grounded, thus
operating amplifier A1 at a gain of 0.1. The 100 k
input resistors and other aspects of its design allow
the AD628 to process small input signals riding on
common-mode voltages up to 120 V.
The output of A1 connects to the plus input of amplifier
A2 through a 10 k resistor. Pin 4 allows connecting an
external capacitor to this point, providing single-pole
low-pass filtering.
Changing the Output Scale Factor
Figure 6-7 reveals that the output scale factor of the
AD628 may be set by changing the gain of amplifier
A2. This uncommitted op amp may be operated at any
)
VOUT
= G = 0.1 1 + ( RF RG )
VIN
RF
RG
For ADC buffering applications, the gain of A2 should
be chosen so that the voltage driving the ADC is close
to its full-scale input range. The use of external resistors,
RF and RG to set the output scale factor (i.e., gain of A2)
will degrade gain accuracy and drift essentially to the
resistors themselves.
A separate VREF pin is available for offsetting the AD628
output signal, so it is centered in the middle of the ADC’s
input range. Although Figure 6-7 indicates 15 V, the
circuit may be operated from 2.25 V to 18 V dual
supplies. This VREF pin may also be used to allow singlesupply operation; VREF may simply be biased at VS/2.
Using an External Resistor to Operate the AD628 at
Gains Below 0.1
The AD628 gain block may be modified to provide any
desired gain from 0.01 to 0.1, as shown in Figure 6-8.
RG
+15V
0.1F
7
4
CFILTER
+VS
10k
DIFFERENTIAL
INPUT SIGNAL
8
100k
AD628
– IN
10k
A1
VIN
1
100k
+ IN
A2
– IN
10k
VCM
–VS
2
VREF
RG
3
6
0.1F
–15V
Figure 6-8. AD628 Connection for Gains Less Than 0.1
6-4
VOUT
TO ADC
+ IN
5
+15V
C1
0.1F
CFILTER
0.1F
7
4
+VS
10k
DIFFERENTIAL
INPUT SIGNAL
8
100k
AD628
–
IN
10k
A1
VIN
100k
1
+
– IN
–VS
2
5
A2
IN
10k
VCM
VOUT
TO ADC
+ IN
RG
VREF
3
6
C2
0.1F
RG
–15V
RF
Figure 6-9. Differential Input Circuit with Two-Pole Low-Pass Filtering
This connection is the same as the basic wide input range
circuit of Figure 6-7, but with Pins 5 and 6 strapped,
and with an external resistor, RG, connection between
Pin 4 and ground. The pin strapping operates amplifier
A2 at unity gain. Acting with the on-chip 10 k resistor
at the output of A1, RGAIN forms a voltage divider that
attenuates the signal between the output of A1 and the
input of A2. The gain for this connection equals 0.1 VIN
((10 k + RG)/RG).
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Differential Input Circuit with Two-Pole
Low-Pass Filtering
The circuit in Figure 6-9 is a modification of the basic
ADC interface circuit. Here, two-pole low-pass filtering
is added for the price of one additional capacitor (C2).
As before, the first pole of the low-pass filter is set by
the internal 10 k resistor at the output of A1 and the
external capacitor C1. The second pole is created by an
external RC time constant in the feedback path of A2,
consisting of capacitor C2 across resistor R F. Note that
this second pole provides a more rapid roll-off of frequencies above its RC corner frequency (1/(2RC)) than
a single-pole LP filter. However, as the input frequency
is increased, the gain of amplifier A2 eventually drops
to unity and will not be further reduced. So, amplifier
A2 will have a voltage gain set by the ratio of RF/RG at
frequencies below its –3 dB corner and have unity gain
at higher frequencies.
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Figure 6-10. Frequency Response of the
Two-Pole LP Filter
Figure 6-10 shows the filter’s output vs. frequency using
components chosen to provide a 200 Hz –3 dB corner
frequency. There is a sharp roll-off between the corner
frequency and approximately 10 the corner frequency.
Above this point, the second pole starts to become less
effective and the rate of attenuation is close to that of a
single-pole response.
6-5
Table 6-1.
when configured as gain blocks, most common amplifiers
have both gain errors and offset drift.
Two-Pole LP Filter
Input Range: 10 V p-p F.S. for a 5 V p-p Output
RF = 49.9 k, RG = 12.4 k
–3 dB Corner Frequency
200 Hz
1 kHz
5 kHz
10 kHz
Capacitor C2 0.01 F 0.002 F 390 pF 220 pF
Capacitor C1 0.047 F 0.01 F 0.002 F 0.001 F
The gain block circuits of Figures 6-11 to 6-15 overcome
all of these performance limitations, are very inexpensive,
and offer a single MSOP solution. The AD628 provides
this complete function using the smallest IC package
available. Since all resistors are internal to the AD628
gain block, both accuracy and drift are excellent.
Table 6-2.
Two-Pole LP Filter
Input Range: 20 V p-p F.S. for a 5 V p-p Output
RF = 24.3 k, RG = 16.2 k
–3 dB Corner Frequency
200 Hz
1 kHz
5 kHz
In op amp circuits, the usual two resistor gain setting
arrangement has accuracy and drift limitations. Using
standard 1% resistors, amplifier gain can be off by 2%.
The gain will also vary with temperature because each
resistor will drift differently. Monolithic resistor networks
can be used for precise gain setting, but these components
increase cost, complexity, and board space.
10 kHz
Capacitor C2 0.02 F 0.0039 F 820 pF 390 pF
Capacitor C1 0.047 F 0.01 F 0.002 F 0.001 F
Tables 6-1 and 6-2 provide typical filter component
values for various –3 dB corner frequencies and two
different full-scale input ranges. Values have been
rounded off to match standard resistor and capacitor
values. Capacitors C1 and C2 need to be high Q, low
drift devices; low grade disc ceramics should be avoided.
High quality NPO ceramic, Mylar, or polyester film
capacitors are recommended for the lowest drift and
best settling time.
Using the AD628 to Create Precision Gain Blocks
Real-world data acquisition systems require amplifying weak
signals enough to apply them to an ADC. Unfortunately,
All of these pin-strapped circuits (using no external
components) have a gain accuracy better than 0.2%,
with a gain TC better than 50 ppm/°C.
Operating the AD628 as a +10 or –10 Precision
Gain Block
Figure 6-11 shows an AD628 precision gain block IC
connected to provide a voltage gain of +10. The gain
block may be configured to provide different gains by
strapping or grounding the appropriate pin. The gain
block itself consists of two internal amplifiers: a gain of
0.1 difference amplifier (A1) followed by an uncommitted
buffer amplifier (A2).
The input signal is applied between the VREF pin (Pin 3)
and ground. With the input tied to Pin 3, the voltage at
the positive input of A1 equals VIN (100 k/110 k)
which is VIN (10/11). With Pin 6 grounded, the minus
+15V
0.1F
CFILTER
4
+VS
10k
100k
8
100k
1
–
+
AD628
IN
A1
10k
+ IN
A2
IN
– IN
10k
–VS
2
7
3
5
VOUT
RG
VREF
6
0.1F
–15V
VIN
Figure 6-11. Circuit with a Gain of +10 Using No External Components
6-6
input of A2 equals 0 V. Therefore, the positive input of
A2 will be forced by feedback from the output of A2 to
be 0 V as well. The output of A1 then must also be at
0 V. Since the negative input of A1 must be equal to the
positive input of A1, both will equal VIN (10/11).
With Pin 3 grounded, the positive input of A1 is at 0 V,
so feedback will force the negative input of A1 to zero
as well. Since A1 operates at a gain of 1/10 (0.1), the
output of A2 that is needed to force the negative input
of A1 to zero is minus 10 VIN.
This means that the output voltage of A2 (VOUT) will
equal
The two connections will have different input impedances.
When driving Pin 3 (Figure 6-11), the input impedance
to ground is 110 k, while it is approximately 50 G
when driving Pin 6 (Figure 6-12).The –3 dB bandwidth
for both circuits is approximately 110 kHz for 10 mV
and 95 kHz for 100 mV input signals.
VOUT = VIN (10 11) (1 + 100 k 10 k ) =
VIN (10 11) 11 = 10 VIN
The companion circuit in Figure 6-12 provides a gain of
–10. This time the input is applied between the negative
input of A2 (Pin 6) and ground. Operation is exactly the
same, but now the input signal is inverted 180 by A2.
Operating the AD628 at a Precision Gain of +11
The gain of +11 circuit (Figure 6-13) is almost identical to the gain of +10 connection, except that Pin 1 is
strapped to Pin 3, rather than being grounded. This
+15V
0.1F
7
4
CFILTER
+VS
10k
8
1
100k
100k
AD628
– IN
10k
A1
+
+ IN
IN
A2
5
VOUT
– IN
10k
–VS
2
RG
VREF
3
6
0.1F
–15V
VIN
Figure 6-12. Companion Circuit Providing a Gain of –10
7
4
CFILTER
+VS
10k
8
100k
AD628
– IN
10k
A1
1
100k
+
+ IN
IN
A2
– IN
10k
–VS
2
3
RG
VREF
6
VIN
Figure 6-13. A Gain of +11 Circuit
6-7
5
VOUT
connects the two internal resistors (100 k and 10 k)
that are tied in parallel to the plus input of A1. So, this
now removes the 10 k/110 k voltage divider between
VIN and the positive input of A1.Thus modified,VIN drives
the positive input through approximately a 9 k resistor.
Note that this series resistance is negligible compared to
the very high input impedance of amplifier A1. The gain
from Pin 8 to the output of A1 is 0.1.Therefore, feedback
will force the output of A2 to equal 10 VIN. The –3 dB
bandwidth of this circuit is approximately 105 kHz for
10 mV and 95 kHz for 100 mV input signals.
The input signal is applied between the V REF pin
and ground. Because Pins 1 and 8 are grounded, the
input signal runs through a 100 k/110 k input attenuator to the plus input of A1. The voltage equals V IN
(10/11) = 0.909 V IN. The gain from this point to the
output of A1 will equal 1 + (10 k/100 k) = 1.10.
Therefore, the voltage at the output of A1 will equal
V IN (1.10) (0.909) = 1.00. Amplifier A2 is operated
as a unity gain buffer (as Pins 5 and 6 tied together),
providing an overall circuit gain of +1.
Operating the AD628 at a Precision Gain of +1
Figure 6-14 shows the AD628 connected to provide a
precision gain of +1. As before, this connection uses
the gain block’s internal resistor networks for high gain
accuracy and stability.
The circuit of Figure 6-12 can be modified slightly
by applying a small amount of positive feedback to
increase its bandwidth, as shown in Figure 6-15.
The output of amplifier A1 feeds back its positive
input by connecting Pin 4 and Pin 1 together. Now,
Gain = –(10 – 1/11) = –9.91.
Increased BW Gain Block of –9.91 Using Feedforward
+15V
0.1F
CFILTER
10k
100k
8
– IN
7
4
+VS
AD628
10k
+ IN
A1
100k
1
+
IN
–
10k
–VS
2
3
VOUT
A2
IN
5
RG
VREF
6
0.1F
–15V
VIN
Figure 6-14. AD628 Precision Gain of +1
7
4
CFILTER
10k
8
100k
–
AD628
IN
10k
A1
1
100k
+
+VS
+ IN
IN
A2
– IN
10k
–VS
2
VREF
3
RG
6
VIN
Figure 6-15. Precision –10 Gain Block with Feedforward
6-8
5
VOUT
The resulting circuit is still stable because of the large
amount of negative feedback applied around the entire
circuit (from the output of A2 back to the negative
input of A1). This connection actually results in a small
signal –3 dB bandwidth of approximately 140 kHz. This
is a 27% increase in bandwidth over the unmodified
circuit in Figure 6-9. However, gain accuracy is reduced
to 2%.
CURRENT TRANSMITTER REJECTS
GROUND NOISE
Many systems use current flow to control remote instrumentations. The advantage of such a system is its ability
to operate with two remotely connected power supplies,
even if their grounds are not the same. In such cases, it is
necessary for the output to be linear with respect to the
input signal, and any interference between the grounds
must be rejected. Figure 6-16 shows such a circuit.
For this circuit
IOUT =
(VIN
IOUT =
10)
1kΩ
VIN (V )
1 kΩ
The AD629, a difference amplifier with very high
common-mode range, is driven by an input signal Pin 3.
Its transfer function is
VOUT = VIN
Where:
VOUT is measured between Pin 6 and its reference
(Pin 1 and Pin 5), and the input V IN is measured
between Pin 3 and Pin 2. The common-mode signal,
VCM, will be rejected.
In order to reduce the voltage at Pin 6, an inverter
with a gain of 9 is connected between Pin 6 and its
reference. The inverter sets the gain of the transmitter
such that for a 10 V input, the voltage at Pin 6 only
changes by 1 V; yet, the difference between Pin 6 and
its reference is 10 V.
VIN
3
AD629
380k
6
2
380k
20k
21.1k
5
VCM
1
R1
1k
R2
9k
R3
0.1k
IOUT
+15V
VOUT
OP27
R1
1k
–15V
GND1
GROUND INTERFERENCE
GND2
Figure 6-16. Current Transmitter
6-9
Since the gain between the noninverting terminal of the
OP27 and the output of the AD629 is 1, no modulation
of the output current will take place as a function of the
output voltage VOUT. The scaling resistor R3 is 100  to
make 1 mA/V of input signal.
2V
1mV
5ms
OP27 was chosen because, at a noise gain of 10, its
bandwidth does not compromise the transmitter. Figure
6-17 is the transfer function of the output voltage VOUT
vs. the input voltage VIN. Figure 6-18 is a demonstration
of how well the transmitter rejects ground noise.
5V
5V
TOP: GROUND NOISE 2V/DIV
BOTTOM: VOUT ERROR AT FULL-SCALE 1A/DIV
Figure 6-18. Interference Rejection
HIGH LEVEL ADC INTERFACE
The circuit of Figure 6-19 provides an interface between
large level analog inputs as high as 10 V operating on
dual supplies and a low level, differential input ADC,
operating on a single supply.
As shown, two AD628 difference amplifiers are
connected in antiphase.The differential output,V1–V2,
is an attenuated version of the input signal
HORIZONTAL: INPUT 5V/DIV
VERTICAL: OUTPUT 5mA/DIV
Figure 6-17. Transfer Function
V1 − V2 =
5V
7
VB
–IN
+IN
8
1
A1
VREF
AD628
V1 10k
A2
R2
100k
+IN
VA
–IN
1
8
R2
100k
3
OUT
5V
–VS
2
CFLIT
4
6
3
–VS
2
CFLIT
RG
3.32k
AD7450
13.3k
C
4
6
RG
3.32k
R3
10k
5V
AD780
R1
10k
A1
R4
100k
5
R1
10k
VR
VREF
5
VS
R3
10k
R4
100k
(VA − VB )
10k
A2
V2
5
REFERENCE
2.5V
VR
PRECISION
OUT REFERENCE
AD628
7
VS
5V
Figure 6-19. This ADC Interface Circuit Attenuates and Level Shifts a 10 V Differential
Signal While Operating from a Single 5 V Supply
6-10
The difference amplifiers reject the common-mode
voltage on inputs VA and VB. The reference voltage,
VR, which the AD780 develops and the ADC and the
amplifier share, sets the output common-mode voltage.
A single capacitor, C, placed across the CFILT pins, lowpass filters the difference signal, V1 – V2. The –3 dB pole
frequency is fP = 1/(40,000    C). The difference
signal is amplified by 1.5. Thus, the total gain of this
circuit is 3/10.
CH1 A SPECTRUM
0
85dBV
400Hz
Figure 6-20 shows a 10 V input signal (top), the signals at
the output of each AD628 (middle), and the differential
output (bottom). The benefits of this configuration go
beyond simply interfacing with the ADC. The circuit
improves specifications such as common-mode rejection
ratio, offset voltage, drift, and noise by a factor of ÷2
because the errors of each AD628 are not correlated.
Tek RUN: 50k SAMPLES/SEC
12dB/REF –13dBV
Figure 6-21. The Circuit in Figure 6-19 has
an 85 dBV SNR
T
HI RES
T
20V p-p
1
INPUT
20V p-p
T
T
INPUT
20V p-p
SINGLE-ENDED
OUTPUTS
3V p-p
3
200V p-p
DIFFERENTIAL
OUTPUT
6V p-p
M1
80V p-p
1ms/DIV
COMMON-MODE
ERROR OF
DIFFERENTIAL
OUTPUT
COMMON-MODE
ERROR OF
COMMON-MODE
OUTPUT
Figure 6-20. The Waveforms Show a 10 V
Input Signal (top), the Signals at the Output
of Each AD628 (middle), and the Differential
Output (bottom)
Figure 6-22. The Common-Mode Input (top)
Measures 20 V p-p. The common-mode error of
the differential output (middle) is 20 V p-p. The
error of the common-mode output (bottom) is
80 V p-p.
The output demonstrates an 85 dB SNR (Figure 6-21).
The two AD628s interface with an AD7450 12-bit,
differential-input ADC. The AD7450 easily rejects
residual common-mode signals at the output of the
difference amplifiers. Figure 6-22 shows the commonmode error at the output of the AD628.
The topmost waveform is a 10 V, common-mode input
signal. The middle waveform, measuring 150 V, is
the common-mode error measured differentially
from the output of the two AD628s. The bottom
waveform, measuring 80 V, is the common-mode
error that results.
A HIGH SPEED NONINVERTING SUMMING
AMPLIFIER
The schematic in Figure 6-23 is that of a common
summing amplifier with multiple inputs and one singleended output. It is a variation of an inverting amplifier.
Point X is a virtual ground and referred to as a summing
junction. The transfer function for this circuit is
[
]
VO = − ( RF R1) V 1 + ( RF R 2) V 2 + ( RF R 3)V 3
6-11
video applications. The circuit contains three low cost
high speed instrumentation amplifiers. The first two
interface with input signals and their total sum is taken
at the third amplifier’s output with respect to ground.
The inputs are very high impedance and the signal that
appears at the network output is noninverting.
RF
R1
V1
X
IF
I1
VO
R2
V2
I2
Figure 6-25 is the performance photo at 1 MHz.The top
trace is the input signal for all four inputs. The middle
trace is the sum of inputs V1 and V2. The bottom trace
is the output of the system, which is the total sum of all
four inputs.
R3
V3
I3
Figure 6-23. A Traditional Summing Amplifier
This indicates that the output is a weighted sum of the
inputs with the weights being determined by the resistance ratio. If all resistances are equal, the circuit yields
the inverted sum of its inputs.
Note that if we want the result VO = (V1 + V2 + V3), we
need an additional inverter with Gain = –1. Furthermore, this circuit has many disadvantages, such as low
input impedance, different input impedance for positive
and negative inputs, low bandwidth and highly matched
resistors are needed.
Figure 6-24 is the schematic of a high speed summing
amplifier, which can sum up as many as four input voltages without the need for an inverter to change the sign
of the output. This could prove very useful in audio and
1
T
2
VO = −(V 1 + V 2 + V 3)
V1
1
3
CH1 1.0V
CH3 1.0V

CH2 1.0V
M 400ns 125MS/s
A CH1 40.0mV
8.0ns/pt
Figure 6-25. Performance Photo of the
Circuit in Figure 6-24
AD8130
8
6
VO1
4
V2
1
5
AD8130
8
6
4
1
V3
AD8130
5
8
6
4
V4
VO2
5
Figure 6-24. A Summing Circuit with High Input Impedance
6-12
VO
Figure 6-26 demonstrates the high bandwidth of the
system in Figure 6-24. As we can see, the –3 dB point
is about 220 MHz.
4
3
2
PS = 5V
0
The transfer function is VOUT = VIN/19. For example, a
400 V p-p input signal will produce a 21 V p-p output.
–1
Figure 6-28 shows that the measured system nonlinearity
is less than 20 ppm over the entire 400 V p-p input range.
System noise is about 550 nV/÷Hz referred to the input,
or around 2 mV peak noise voltage (10 ppm of full scale)
over a 300 kHz bandwidth.
–2
–3
–4
–5
–6
1
10
100
FREQUENCY (MHz)
1k
20
Figure 6-26. Frequency Response of
Summing Circuit in Figure 6-24
HIGH VOLTAGE MONITOR
A high accuracy, high voltage monitor is shown in
Figure 6-27.
+5V
–5V
NONLINEARITY ERROR (ppm)
GAIN (dB)
1
An integrator (OP177) supplies negative feedback around
a difference amplifier (AD629), forcing its output to stay
at 0 V. The voltage divider on the inverting input sets
the common-mode voltage of the difference amplifier
to VIN/20. VOUT, the integrator output and the measurement output, sources the required current to maintain
the common-mode voltage. R1 and C1 compensate the
system to a bandwidth of 200 kHz.
10
0
–10
–20
7
4
1
2
VIN
3
21.11k
–200
380k
AD629
380k
–50
0
VIN (V)
50
100
150
200
HIGH COMMON-MODE REJECTION SINGLESUPPLY CIRCUIT
6
20k
R1
100k
5
VOUT
–100
Figure 6-28. Nonlinearity vs. VIN
380k
GND
–150
C1 –15V
200pF
4
6
OP177
7
2
3
+15V
Figure 6-27. High Voltage Monitor
The circuit of Figure 6-29 can extract tiny signals riding
on very large common-mode voltages and its single
supply. Also, unless the converter is driven differentially,
the noise on the analog-to-digital converter (ADC)
reference pin is indistinguishable from a real signal.
The circuit of Figure 6-29 solves both of these problems.
It provides a gain of 2, along with differential inputs and
a differential output. The ADC reference sets the output
common-mode level. The amplifier is constructed with
two subtractors, each compliant to high common-mode
voltage. These subtractors are set up so that the positive
input of one connects to the negative input of the other,
and vice versa. Their reference pins are tied together and
connected to the ADC’s reference pin.
6-13
Figure 6-31 demonstrates the system’s ability to reject
a 1 kHz, 60 V p-p common-mode signal. The upper
waveform shows the common-mode input, while the
lower waveform shows the output.
380k
2
3
+IN
380k
6
380k
OUTP
AIN
21.1k
20k
5
VIN
AD629 #1
1
ADC
REF
–IN
5
VCM
20k
3
2
1
AD629 #2
21.1k
AIN
380k
6
OUTN
380k
380k
DGND
GND
Figure 6-29. A High CMV Single-Supply Circuit
CH3
MATH1
20.0V
20.0mV
M 200s
200s
As the input signal increases, one output, OUTP,
increases, while the other output, OUTN, decreases. Both
outputs remain centered with respect to the commonmode level set by the ADC’s reference.
Figure 6-31. With a 5 V Supply and a 1 kHz, 60 V p-p
Common-Mode Signal (Upper Trace), the Circuit’s
Output (Lower Trace) Illustrates the High CommonMode Rejection
Figure 6-30 illustrates the circuit’s performance with a
single 5 V power supply. At the top is a 1 kHz, 3 V p-p
input signal. At the bottom are the two outputs in
antiphase to produce a 3 V p-p signal centered around
the 2.5 V reference.
Bigger power supplies, such as 15 V, can be used for
larger common-mode signals. Figure 6-32 shows that
the system can reject a 400 V p-p common-mode signal
(upper waveform), with the residual error of less than
100 mV p-p shown in the lower waveform.
INPUT SIGNAL 1V p-p/DIV
5V POWER SUPPLY
CH1
1.00V
CH2
CH4
1.00V
1.00V
M 200s
Figure 6-30. Top Trace is the Input Signal; Bottom
Trace Is Antiphase Output, 40 V p-p on +2.5 dc
CH3
MATH1
100V
5.00mV 1.00mV
M1.00ms
CH3
204V
Figure 6-32. Using a 15 V Supply, the Circuit
Reduces a 400 V p-p Common-Mode Signal
(Upper Trace) to Under 10 mV p-p (Lower Trace)
6-14
2N2222 OR
EQUIV.
VBUS = +14.1V
VBUS = +5V
ADR425
5V REF
10k
0.1F
15V
1 –REF 21.11k 380k
2 –IN
380k
3 +IN
380k
NC
+VS
8
COMPENSATION
POLE AMPLIFIER
OUT 6
0.1F
3
10k
4 –V
S
–39V TO
–79V
VBUS
20k
AD629
VBUS = +5V
7
+REF 5
2
1nF
7
0.1F
OP97
4
6
VBUS
19
VDD CS
VIN
SDATA
CHIP
SELECT
DATA
OUT
AD7476
GND
SCLK
NC = NO CONNECT
CLOCK
IN
Figure 6-33. Precision Remote Voltage Measurement of –48 V Power Distribution Bus
PRECISION 48 V BUS MONITOR
Telephone equipment power supplies normally consist
of a 48 V dc power source and an array of batteries. The
batteries provide backup power during ac power line
outages and help regulate the 48 V dc supply voltage.
Figure 6 -33 shows a precision monitor using just
two integrated circuits, which derives its power from
the –48 V supply. A low cost transistor and Zener
diode combination provide 15 V supply voltage for
the amplifiers.
Although nominally –48 V, the dc voltage on the
telephone lines can vary anywhere from –40V to –80V and
is subject to surges and fluctuations. Supply regulation
at the source has little effect on remote voltage levels and
equipment failures resulting from surges, brownouts, or
other line faults, may not always be detected.
The AD629 IC is a self-contained high common-mode
voltage difference amplifier. Connected as shown, it
reduces the differential input voltage by approximately
19 V, thus acting as a precision voltage divider. An
additional amplifier is required for loop stability.
Capturing power supply information from remote communications equipment requires precise measurement
of the voltages, sometimes under outdoor temperature
conditions. High common-mode voltage difference
amplifiers have been used to monitor current. However,
these versatile components can also be used as voltage
dividers, enabling remote monitoring of voltage levels
as well.
The circuit features several advantages over alternative
solutions. The AD629’s laser trimmed divider resistors exhibit essentially perfect matching and tracking
over temperature. Linearity errors from –40 V to
–80 V are nearly immeasurable. Figures 6 -34 and
6 -35 are linearity and temperature drift curves for
this circuit.
The output from the OP-07 drives an AD7476 ADC.
6-15
HIGH-SIDE CURRENT SENSE WITH A
LOW-SIDE SWITCH
4.5
A typical application for the AD8205 is high-side
measurement of a current through a solenoid for PWM
control of the solenoid opening. Typical applications
include hydraulic transmission control and diesel injection control.
OUTPUT VOLTAGE (V)
4.0
3.5
Two typical circuit configurations are used for this type
of application.
3.0
2.5
2.0
–30
–40
–50
–60
–70
INPUT VOLTAGE (V)
–80
–90
Figure 6-34. Output vs. Input Linearity for
the Circuit of the 48 V Bus Monitor
2.1064
In this circuit configuration, when the switch is closed,
the common-mode voltage moves down to near the
negative rail. When the switch is opened, the voltage
reversal across the inductive load causes the commonmode voltage to be held one diode drop above the battery
by the clamp diode.
2.1062
OUTPUT VOLTAGE (V)
In this case, the PWM control switch is ground referenced.
An inductive load (solenoid) is tied to a power supply. A
resistive shunt is placed between the switch and the load
(see Figure 6-36). An advantage of placing the shunt
on the high side is that the entire current, including the
recirculation current, can be measured since the shunt
remains in the loop when the switch is off. In addition,
diagnostics can be enhanced because shorts to ground
can be detected with the shunt on the high side.
2.1060
2.1058
2.1056
2.1054
2.1052
2.1050
–50
0
50
TEMPERATURE (C)
100
Figure 6-35. Temperature Drift of the
48 V Bus Monitor
5V
CLAMP
DIODE
INDUCTIVE
LOAD
42V
BATTERY
+IN VREF1 +VS
OUT
AD8205
SHUNT
–IN
GND VREF2 NC
SWITCH
NC = NO CONNECT
Figure 6-36. Low-Side Switch
6-16
HIGH-SIDE CURRENT SENSE WITH A
HIGH-SIDE SWITCH
This configuration minimizes the possibility of unexpected solenoid activation and excessive corrosion
(see Figure 6-37). In this case, both the switch and the
shunt are on the high side. When the switch is off, this
removes the battery from the load, which prevents damage
from potential shorts to ground, while still allowing the
recirculating current to be measured and providing for
diagnostics. Removing the power supply from the load for
the majority of the time minimizes the corrosive effects
that could be caused by the differential voltage between
the load and ground.
When using a high-side switch, the battery voltage
is connected to the load when the switch is closed,
causing the common-mode voltage to increase to the
battery voltage. In this case, when the switch is opened,
the voltage reversal across the inductive load causes the
common-mode voltage to be held one diode drop below
ground by the clamp diode.
5V
SWITCH
42V
BATTERY
+IN VREF1 +VS
CLAMP
DIODE
–IN
CONTROLLER
5V
+IN VREF1 +VS
MOTOR
OUT
AD8205
SHUNT
–IN
GND VREF2 NC
5V
2.5V
NC = NO CONNECT
Figure 6-38. Motor Control Application
The AD8205 measures current in both directions as the
H-bridge switches and the motor changes direction.The
output of the AD8205 is configured in an external
reference bidirectional mode.
BRIDGE APPLICATIONS
OUT
Instrumentation amplifiers are widely used for buffering and amplifying the small voltage output from
transducers that make use of the classic four resistor
Wheatstone bridge.
AD8205
SHUNT
This is a better solution than a ground referenced op
amp because ground is not typically a stable reference
voltage in this type of application. This instability in the
ground reference causes the measurements that could
be made with a simple ground referenced op amp to be
inaccurate.
GND VREF2 NC
A Classic Bridge Circuit
INDUCTIVE
LOAD
NC = NO CONNECT
Figure 6-37. High-Side Switch
Another typical application for the AD8205 is as part of
the control loop in H-bridge motor control. In this case,
the AD8205 is placed in the middle of the H-bridge (see
Figure 6-38) so that it can accurately measure current in
both directions by using the shunt available at the motor.
Figure 6-39 shows the AD627 configured to amplify the
signal from a classic resistive bridge. This circuit will
work in either dual- or single-supply mode.Typically, the
bridge will be excited by the same voltage used to power
the in-amp. Connecting the bottom of the bridge to the
negative supply of the in-amp (usually either 0, –5 V,
–12 V, or –15 V) sets up an input common-mode voltage
that is optimally located midway between the supply
voltages. It is also appropriate to set the voltage on the
+VS
VDIFF
0.1F
RG = 200k
GAIN-5
AD627
0.1F
VOUT
VREF
–VS
Figure 6-39. A Classic Bridge Circuit for Low Power Applications
6-17
REF pin to midway between the supplies, especially if
the input signal will be bipolar. However, the voltage
on the REF pin can be varied to suit the application.
A good example of this is when the REF pin is tied to
the VREF pin of an analog-to-digital converter (ADC)
whose input range is (VREF  VIN). With an available
output swing on the AD627 of (–VS + 100 mV) to
(+VS – 150 mV), the maximum programmable gain is
simply this output range divided by the input range.
A Single-Supply Data Acquisition System
The bridge circuit of Figure 6-40 is excited by a +5 V
supply. The full-scale output voltage from the bridge
(10 mV), therefore, has a common-mode level of
2.5 V. The AD623 removes the common-mode voltage
component and amplifies the input signal by a factor
of 100 (RGAIN = 1.02 k). This results in an output
signal of 1 V.
In order to prevent this signal from running into the
AD623’s ground rail, the voltage on the REF pin has
to be raised to at least 1 V. In this example, the 2 V
reference voltage from the AD7776 ADC is used to
bias the AD623’s output voltage to 2 V ± 1 V. This
corresponds to the input range of the ADC.
A Low Dropout Bipolar Bridge Driver
The AD822 can be used for driving a 350  Wheatstone bridge. Figure 6-41 shows one-half of the AD822
being used to buffer the AD589, a 1.235 V low power
reference. The output of +4.5 V can be used to drive an
A/D converter front end. The other half of the AD822
is configured as a unity-gain inverter and generates the
other bridge input of –4.5 V.
Resistors R1 and R2 provide a constant current for
bridge excitation. The AD620 low power instrumentation amplifier is used to condition the differential
output voltage of the bridge. The gain of the AD620
is programmed using an external resistor, RG, and
determined by
G=
49.4 kΩ
+1
RG
+5V
+5V
+5V
0.1F
0.1F
AD7776
10mV
RG
1.02k
AD623
AIN
REF
REFOUT
REFIN
Figure 6-40. A Single-Supply Data Acquisition System
TO A/D CONVERTER
REFERENCE INPUT
+VS
49.9k
+1.235V
AD589
10k
1%
R1
20
+
350
350
350
350
+VS
–
1/2
AD822
–
AD620
RG
+
10k
26.4k, 1%
10k
1%
VREF
1%
+
1/2
AD822
–
–VS
+VS
–4.5V
R2
20
GND
–VS
–VS
Figure 6-41. Low Dropout Bipolar Bridge Driver
6-18
0.1F
0.1F
+
+
+
+
1F
1F
+5V
–5V
TRANSDUCER INTERFACE APPLICATIONS
MEDICAL EKG APPLICATIONS
Instrumentation amplifiers have long been used as
preamplifiers in transducer applications. High quality
transducers typically provide a highly linear output,
but at a very low level, and a characteristically high
output impedance. This requires the use of a high
gain buffer/preamplifier that will not contribute any
discernible noise of its own to that of the signal.
Furthermore, the high output impedance of the typical
transducer may require that the in-amp have a low
input bias current.
An EKG is a challenging real-world application, as a
small 5 mV signal must be extracted in the presence
of much larger 60 Hz noise and large dc commonmode offset variations. Figure 6-42 shows a block
diagram of a typical EKG monitor circuit. The value
of capacitor CX is chosen to maintain stability of the
right leg drive loop.
Table 6-3 gives typical characteristics for some common
transducer types.
Since most transducers are slow, bandwidth requirements of the in-amp are modest: a 1 MHz small
signal bandwidth at unity gain is adequate for most
applications.
Three outputs from the patient are shown here, although
several more may be used. The output buffer amplifiers should be low noise, low input bias current FET
op amps, since the patient sensors are typically very
high impedance and signal levels may be quite low. A
three resistor summing network is used to establish a
common sense point to drive the force amplifier. The
output from the force amplifier servos current through
the patient until the net sum output from the three
buffer amplifiers is zero.
PATIENT/CIRCUIT
PROTECTION/ISOLATION
BUFFER
AMPLIFIERS
A
F
C-B
0.03Hz
HIGHPASS
FILTER
B
B
C
A-B
0.03Hz
HIGHPASS
FILTER
A
A
B
IN-AMP#1
C
C
CX
IN-AMP#2
Figure 6-42. A Medical EKG Monitor Circuit
6-19
IN-AMP#3
A-C
0.03Hz
HIGHPASS
FILTER
Table 6-3. Typical Transducer Characteristics
Recommended
ADI In-Amp/Diff Amp
Transducer Type
Type of Output
Output Z
Thermistor
Resistance Changes
with Temperature (–TC)
4%/C @ +25C
High Nonlinear Output
Single-Supply
Low Source Z
10 V/C to 100 V/C
mV Output Level
@ +25C Single-Supply
Low Source Z
with Temperature (+TC)
0.1%/C to 0.66%/C
Single- or Dual-Supply
50  to 1 M
@ +25C
AD620, AD621, AD623,
AD627, AD629, AD8221,
AD8225
20  to 20 k
(10  typ)
AD620, AD621, AD623,
AD627, AD8221
20  to 20 k
@ 0C
AD620, AD621, AD623,
AD627, AD8221, AD8225
Thermistor Output (Low)
Variable Resistance
Output of mV to Several Volts
Single-Supply
Variable Resistance
2 mV/V of Excitation
0.1% Typical Full-Scale Change
Single- or Dual-Supply
Low Value Resistor Output
High Common-Mode Voltage
Low Level Differential
Output Voltage
5 mV Output Typical
Single- or Dual-Supply
500  to 2 k
100  to 2 k
AD626, AD628, AD629,
AD8225
120  to 1 k
AD620, AD621, AD8221,
AD8225
A Few Ohms
(or less)
500 k
AD626, AD628, AD629,
AD8202, AD8205
AD620, AD621, AD623,
AD627, AD8221, AD8225
Current Increases
with Light Intensity
1 pA to 1 A IOUTPUT
Single-Supply
5 mV/kG to 120 mV/kG
109 
AD620, AD621, AD622,
AD623, AD627, AD8221
1  to 1 k
AD620, AD621, AD622,
AD623, AD627, AD8221
Thermocouple
Resistance Temperature
Detector (RTD)
(In Bridge Circuit)
Level Sensors
Thermal Types
Float Types
Load Cell
(Strain Gage Bridge)
(Weight Measurement)
Current Sense (Shunt)
EKG Monitors
(Single-Supply
Bridge Configuration)
Photodiode Sensor
Hall Effect Magnetic
6-20
Three in-amps are used to provide three separate outputs for monitoring the patient’s condition. Suitable
ADI products include AD8221, AD627, and AD623
in-amps and AD820, AD822 (dual), and AD824
(quad) op amps for use as the buffer. Each in-amp is
followed by a high-pass filter that removes the dc component from the signal. It is common practice to omit
one of the in-amps and determine the third output by
software (or hardware) calculation.
The sense terminal completes the feedback path for the
instrumentation amplifier output stage and is normally
connected directly to the in-amp output. Similarly, the
reference terminal sets the reference voltage about which
the in-amp’s output will swing. This connection puts
the IR drops inside the feedback loop of the in-amp
and virtually eliminates any IR errors.
This circuit will provide a 3 dB bandwidth better than
3 MHz. Note that any net capacitance between the
twisted pairs is isolated from the in-amp’s output by
25 k resistors, but any net capacitance between the
twisted pairs and ground needs to be minimized to
maintain stability. So, unshielded twisted-pair cable is
recommended for this circuit. For low speed applications
that require driving long lengths of shielded cable, the
AMP01 should be substituted for the AMP03 device.
The AMP01 can drive capacitance loads up to 1 F, while
the AMP03 is limited to driving a few hundred pF.
Proper safeguards, such as isolation, must be added to
this circuit to protect the patient from possible harm.
REMOTE LOAD-SENSING TECHNIQUE
The circuit of Figure 6-43 is a unity gain instrumentation
amplifier that uses its sense and reference pins to minimize any errors due to parasitic voltage drops within the
circuit. If heavy output currents are expected, and there
is a need to sense a load that is some distance away from
the circuit, voltage drops due to trace or wire resistance
can cause errors. These voltage drops are particularly
troublesome with low resistance loads, such as 50 .
+VIN
–IN
2
25k
25k
5
SENSE
7 +VCC
AMP03
6
4
–VIN
+IN
25k
3
25k
1
TWISTED
PAIRS
*
OUTPUT
REMOTE
LOAD
–VEE
REFERENCE
TWISTED
PAIRS
*
OUTPUT
GROUND
*1N4148 DIODES ARE OPTIONAL. DIODES LIMIT THE OUTPUT
VOLTAGE EXCURSION IF SENSE AND/OR REFERENCE LINES
BECOME DISCONNECTED FROM THE LOAD.
Figure 6-43. A Remote Load Sensing Connection
6-21
A PRECISION VOLTAGE-TO-CURRENT
CONVERTER
A CURRENT SENSOR INTERFACE
Figure 6-44 is a precision voltage-to-current converter
whose scale factor is easily programmed for exact decade ratios using standard 1% metal film resistor values.
The AD620 operates with full accuracy on standard
5 V power supply voltages. Note that although the
quiescent current of the AD620 is only 900 A, the
addition of the AD705 will add an additional 380 A
current consumption.
+VS
VIN+
Figure 6-45 shows a novel circuit for sensing low-level
currents. It makes use of the large common-mode range of
the AD626.The current being measured is sensed across
resistor RS. The value of RS should be less than 1 k
and should be selected so that the average differential
voltage across this resistor is typically 100 mV.
To produce a full-scale output of +4 V, a gain of 40 is
used, adjustable by +20% to absorb the tolerance in the
sense resistor. Note that there is sufficient headroom to
allow at least a 10% overrange (to +4.4 V).
0.1F
7
3
8
+ VX –
AD620
RG
1
VIN–
6
5
2
4
I L=
Vx
R1
=
[(V IN+) – (V IN– )] G
WHERE G = 1 +
0.1F
7
2
IL
AD705
4
–VS
0.1F
R1
+VS
6
–VS
R1
49,400
RG
3
0.1F
LOAD
Figure 6-44. A Precision Voltage-to-Current Converter that Operates on 5 V Supplies
CURRENT IN
CURRENT
SENSOR
CURRENT OUT
RS
1
2
–VS
3
ANALOG
GND
200k +IN
8
1/6
G = 100
7
+VS
6
4
RS
G=30
–VS
FILTER
G= 2
OUT
AD626
Figure 6-45. Current Sensor Interface
6-22
+VS
0.1F
100k
0.1F
CF
OPTIONAL
LOW-PASS
FILTER
200k
–IN
5
OUTPUT
OUTPUT BUFFERING LOW POWER IN-AMPS
A 4 mA TO 20 mA SINGLE-SUPPLY RECEIVER
The AD627 low power in-amp is designed to drive load
impedances of 20 k or higher, but can deliver up to
20 mA to heavier loads with low output voltage swings.
If more than 20 mA of output current is required, the
AD627’s output should be buffered with a precision
low power op amp, such as the AD820, as shown in
Figure 6-46. This op amp can swing from 0 V to 4 V
on its output while driving a load as small as 600 .
The addition of the AD820 isolates the in-amp from
the load, thus greatly reducing any thermal effects.
Figure 6-47 shows how a signal from a 4 mA to 20 mA
transducer can be interfaced to the ADuC812, a 12-bit
ADC with an embedded microcontroller.The signal from
a 4 mA to 20 mA transducer is single-ended.This initially
suggests the need for a simple shunt resistor to convert
the current to a voltage at the high impedance analog
input of the converter. However, any line resistance in
the return path (to the transducer) will add a currentdependent offset error. So, the current must be sensed
differentially. In this example, a 24.9  shunt resistor
generates a maximum differential input voltage to the
AD627 of between 100 mV (for 4 mA in) and 500 mV
(for 20 mA in).With no gain resistor present, the AD627
amplifies the 500 mV input voltage by a factor of 5 to
2.5 V, the full-scale input voltage of the ADC. The zero
current of 4 mA corresponds to a code of 819 and the
LSB size is 4.9 mV.
+VS
0.1F
3
7
0.1F
1
AD627
RG
8
2
6
5
REF
4
0.1F
3
2
7
AD820
4
6
VOUT
0.1F
–VS
–VS
Figure 6-46. Output Buffer for Low
Power In-Amps
+5V
+5V
0.1F
3
1
4mA–20mA
TRANSDUCER
LINE
IMPEDANCE
4mA–20mA
24.9
RG
7
VREF
6
5
REF
Figure 6-47. A 4 mA to 20 mA Receiver Circuit
6-23
0.1F
0.1F
AD627
8
2
4
G=5
+5V
AIN 0–7
AVDD
DVDD
ADuC812
MICROCONVERTER™
AGND
DGND
A SINGLE-SUPPLY THERMOCOUPLE
AMPLIFIER
Because the common-mode input range of the AD627
extends 0.1 V below ground, it is possible to measure
small differential signals with little or no commonmode component. Figure 6-48 shows a thermocouple
application where one side of the J-type thermocouple
is grounded. Over a temperature range from –200C
to +200C, the J-type thermocouple delivers a voltage
ranging from –7.890 mV to +10.777 mV.
A programmed gain on the AD627 of 100 (RG = 2.1 k)
and a voltage on the AD627 REF pin of 2 V results in
the AD627’s output voltage ranging from 1.110 V to
3.077 V relative to ground.
SPECIALTY PRODUCTS
Analog Devices sells a number of specialty products,
many of which were designed for the audio market that
are useful for some in-amp applications. Table 6-4 lists
some of these products.
+5V
COLD JUNCTION
COMPENSATION
0.1F
3
1
J-TYPE
THERMOCOUPLE
AD627
RG
8
2
THERMOCOUPLE
WIRES
7
6
5 REF
4
VOUT
+2V
COPPER
WIRES
Figure 6-48. A Thermocouple Amplifier Using a Low Power, Single-Supply In-Amp
Table 6-4. Specialty Products Available from Analog Devices
Model
Number Description
BW
CMR
(DC)
Supply
Features
SSM2141 Diff Line Receiver 3 MHz
100 dB 18 V
High CMR, Audio Subtractor
SSM2143 Diff Line Receiver 7 MHz (G = 0.5) 90 dB 6 V to 18 V Low Distortion, Audio Subtractor
SSM2019 Audio Preamp
2 MHz (G = 1) 74 dB 5 V to 18 V Low Noise, Low Distortion, Audio IA
6-24