MCP87090 High-Speed N-Channel Power MOSFET Features: Description: • Low Drain-to-Source On Resistance (RDS(ON)) • Low Total Gate Charge (QG) and Gate-to-Drain Charge (QGD) • Low Series Gate Resistance (RG) • Capable of Short Dead-Time Operation • RoHS Compliant The MCP87090 is an N-Channel power MOSFET in a popular PDFN 5 mm x 6 mm package, as well as a PDFN 3.3 mm x 3.3 mm package. Advanced packaging and silicon processing technologies allow the MCP87090 to achieve a low QG for a given RDS(ON) value, resulting in a low Figure of Merit (FOM). Combined with low RG, the low FOM of the MCP87090 device allows high efficiency power conversion with reduced switching and conduction losses. Applications: • Point-of-Load DC-DC Converters • High Efficiency Power Management in Servers, Networking, and Automotive Applications Package Type PDFN 5 x 6 PDFN 3.3 x 3.3 S 1 8 D S 2 7 D S 3 6 D G 4 5 D Product Summary Table: Unless otherwise indicated, TA = +25˚C Parameters Sym. Min. Typ. Max. Units Conditions Drain-to-Source Breakdown Voltage BVDSS 25 — — V VGS = 0V, ID = 250 µA Gate-to-Source Threshold Voltage VGS(TH) 1.1 1.35 1.7 V VDS = VGS, ID = 250 µA Drain-to-Source On Resistance RDS(ON) — 10 12 mΩ Operating Characteristics VGS = 4.5V, ID = 17A — 8.5 10.5 mΩ VGS = 10V, ID = 17A Total Gate Charge QG — 7.5 10 nC VDS = 12.5V, ID = 17A, VGS = 4.5V Gate-to-Drain Charge QGD — 2.8 — nC VDS = 12.5V, ID = 17A RG — 1.8 — Ω Series Gate Resistance Thermal Characteristics Thermal Resistance Junction-to-X, 8L 3.3x3.3-PDFN RθJX — — 70 °C/W Note 1 Thermal Resistance Junction-to-Case, 8L 3.3x3.3-PDFN RθJC — — 3.3 °C/W Note 2 Thermal Resistance Junction-to-X, 8L 5x6-PDFN RθJX — — 55 °C/W Note 1 Thermal Resistance Junction-to-Case, 8L 5x6-PDFN RθJC — — 3.2 °C/W Note 2 Note 1: 2: RθJX is determined with the device surface mounted on a 4-Layer FR4 PCB, with a 1” x 1” mounting pad of 2 oz. copper. This characteristic is dependent on user’s board design. RθJC is determined using JEDEC 51-14 Method. This characteristic is determined by design. 2013 Microchip Technology Inc. DS20002332B-page 1 MCP87090 1.0 EAS Avalanche Energy .................................... 84.5 mJ ELECTRICAL CHARACTERISTICS ID = 13A, L = 1 mH, RG = 25Ω † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † VDS .......................................................................+25V VGS ........................................................... +10.0V / -8V ID, Continuous .............................................................. 8L 5x6-PDFN ............................. 51A, TC = +25°C 8L 3.3x3.3-PDFN ....................... 50A, TC = +25°C PD ................................................................................. 8L 5x6-PDFN ........................... 2.2W, TA = +25°C 8L 3.3x3.3-PDFN ..................... 1.8W, TA = +25°C TJ, TSTG..............................................-55°C to +150°C DC ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, TA = +25°C. Parameters Sym. Min. Typ. Max. Units Conditions BVDSS 25 — — V VGS = 0V, ID = 250 µA Drain-to-Source Leakage Current IDSS — — 1 µA VGS = 0V, VDS = 20V Gate-to-Source Leakage Current IGSS — — 100 nA VDS = 0V, VGS = 10V/-8V Gate-to-Source Threshold Voltage VGS(TH) 1.1 1.35 1.7 V VDS = VGS, ID = 250 µA Drain-to-Source On Resistance RDS(ON) — 10 12 m — 8.5 10.5 m gfs — 62 — S VDS = 12.5V, ID = 17A Input Capacitance CISS — 580 — pF VGS = 0V, VDS = 12.5V, f = 1 MHz Output Capacitance COSS — 265 — pF VGS = 0V, VDS = 12.5V, f = 1 MHz Reverse Transfer Capacitance CRSS — 70 — pF VGS = 0V, VDS = 12.5V, f = 1 MHz Total Gate Charge QG — 7.5 10 nC VDS = 12.5V, ID = 17A, VGS = 4.5V Gate-to-Drain Charge QGD — 2.8 — nC VDS = 12.5V, ID = 17A Gate-to-Source Charge QGS — 1.2 — nC VDS = 12.5V, ID = 17A Gate Charge at VGS(TH) QG(TH) — 0.8 — nC VDS = 12.5V, ID = 17A Output Charge QOSS — 5 — nC VDS = 12.5V, VGS = 0 Turn-On Delay Time td(on) — 2.5 — ns VDS = 12.5V, VGS = 4.5V, ID = 17A, RG = 2 tr — 9.3 — ns VDS = 12.5V, VGS = 4.5V, ID = 17A, RG = 2 td(off) — 5.3 — ns VDS = 12.5V, VGS = 4.5V, ID = 17A, RG = 2 tf — 2.9 — ns VDS = 12.5V, VGS = 4.5V, ID = 17A, RG = 2 RG — 1.8 — Diode Forward Voltage VFD — 0.8 1 V Reverse Recovery Charge QRR — 11 — nC IS = 17A, di/dt = 300 A/µs trr — 11.5 — nS IS = 17A, di/dt = 300 A/µs Static Characteristics Drain-to-Source Breakdown Voltage Transconductance VGS = 4.5V, ID = 17A VGS = 10V, ID = 17A Dynamic Characteristics Rise Time Turn-Off Delay Time Fall Time Series Gate Resistance Diode Characteristics Reverse Recovery Time DS20002332B-page 2 IS = 17A, VGS = 0V 2013 Microchip Technology Inc. MCP87090 DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, TA = +25°C. Parameters Sym. Min. Typ. Max. Units Conditions EAS 18 — — mJ Sym. Min. Typ. Max. Units TJ -55 — +150 °C TA -55 — +150 °C Avalanche Characteristics Avalanche Energy ID = 6A, L = 1 mH, RG = 25 TEMPERATURE CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, TA = +25°C Parameters Conditions Temperature Ranges Operating Junction Temperature Range Storage Temperature Range Package Thermal Resistances Thermal Resistance Junction-to-X, 8L 3.3x3.3-PDFN RθJX — — 70 °C/W Note 1 Thermal Resistance Junction-to-Case, 8L 3.3x3.3-PDFN RθJC — — 3.3 °C/W Note 2 Thermal Resistance Junction-to-X, 8L 5x6-PDFN RθJX — — 55 °C/W Note 1 Thermal Resistance Junction-to-Case, 8L 5x6-PDFN RθJC — — 3.2 °C/W Note 2 Note 1: 2: RθJX is determined with the device surface mounted on a 4-Layer FR4 PCB, with a 1” x 1” mounting pad of 2 oz. copper. This characteristic is dependent on user’s board design. RθJC is determined using JEDEC 51-14 Method. This characteristic is determined by design. 2013 Microchip Technology Inc. DS20002332B-page 3 MCP87090 2.0 TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Note: Unless otherwise indicated, TA = +25°C. 1.8 VGS = 10V 50 VGS = 4.5V 1.4 40 1.2 VGS = 3V 30 20 0.6 0 0.4 0.0 1.0 2.0 VDS – Drain-to-Source Voltage (V) FIGURE 2-1: Characteristics. 3.0 VGS - Gate--to-Source Voltage (V) VDS = 5V 50 40 30 TC = +25°C 20 TC = +125°C 10 0 1.25 1.5 TC = -55°C 1.75 2 2.25 2.5 2.75 3 VGS - Gate-to-Source Voltage (V) FIGURE 2-2: Characteristics. -60 -40 -20 FIGURE 2-4: vs. Temperature. Typical Output 60 3.25 20 Normalized On Resistance 9 ID = 17A 8 VDS = 5V 7 6 VDS = 12.5V 5 4 3 2 1 0 2 4 FIGURE 2-5: Gate Charge. Typical Transfer 0 20 40 60 80 100 120 140 160 TC - Case Temperature (°C) 10 0 6 8 10 12 QG - Gate Charge (nC) 14 16 18 Gate-to-Source Voltage vs. 1 0.9 ID = 17A 18 C-C Capacitance (nF) ID - D Drain Current (A) 1 0.8 VGS = 2.5V 10 RDS(ON) - On-State Resistance (m) ID = 17A VGS = 4.5V 1.6 Norm malized On-State Resistance R ID - Drain Current (A) 60 16 14 12 TC = +125°C 10 8 TC = +25°C 2 4 6 8 VGS - Gate-to-Source Voltage (V) FIGURE 2-3: On Resistance vs. Gate-to-Source Voltage. DS20002332B-page 4 0.7 CISS 0.6 0.5 0.4 0.3 COSS 0.2 CRSS 0.1 6 0 f = 1 MHz VGS = 0V 0.8 10 0 0 5 10 15 VDS - Drain-to-Source Voltage (V) 20 FIGURE 2-6: Capacitance vs. Drain-to-Source Voltage. 2013 Microchip Technology Inc. MCP87090 Note: Unless otherwise indicated, TA = +25°C. 80 1.7 70 ID - Drain Current (A) VGS(TH)) - Gate-to-Source Thres shold Voltage (V) ID = 250 μA 1.5 1.3 1.1 60 50 VGS = 10V 40 VGS = 4.5V 30 20 10 0.9 0 -75 -50 -25 0 25 50 75 100 125 150 175 TC - Case Temperature (°C) FIGURE 2-7: Gate-to-Source Threshold Voltage vs. Temperature. 0 25 50 75 100 125 TC - Case Temperature (Û& 150 FIGURE 2-10: Maximum Drain Current vs. Temperature 5x6-PDFN (MCP87090T-U/MF). ZșJA - Normalized Thermal Impedance ISD - So ource-to-Drain Current (A) 100 10 1 TC = +125°C TC = +25°C 0.1 0.1 DC = 0.5 DC = 0.3 DC = 0.1 DC = 0.05 DC = 0.02 DC = 0.01 Single Pulse 0.01 0.01 0.001 0.2 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) FIGURE 2-8: Source-to-Drain Current vs. Source-to-Drain Voltage. 1000 100 1 ms 10 ms 1 100 ms 1s 0.01 0.01 1000 0.1 10 t1 - Pulse Duration (s) FIGURE 2-11: Transient Thermal Impedance 5x6-PDFN (MCP87090T-U/MF). 1000 Operation in this range is limited by RDS(on) 10 0.1 0.001 0.001 1.0 RșJA = 55°C/W Single Pulse 0.1 1 10 VDS - Drain-to-Source Voltage (V) DC 100 FIGURE 2-9: Maximum Safe Operating Area 5x6-PDFN (MCP87090T-U/MF). 2013 Microchip Technology Inc. ID - Drain Current (A) 0.0 ID - Drain Current (A) 1 100 Operation in this range is limited by RDS(on) 1 ms 10 10 ms 1 0.1 0.01 0.01 100 ms 1s DC RșJA = 70°C/W Single Pulse 0.1 1 10 VDS - Drain-to-Source Voltage (V) 100 FIGURE 2-12: Maximum Safe Operating Area 3.3x3.3-PDFN (MCP87090T-U/LC). DS20002332B-page 5 MCP87090 VBR(DSS) - B Breakdown Voltage (V) 80 ID - Drain Current (A) 70 60 50 VGS = 10V 40 VGS = 4.5V 30 20 10 0 0 25 50 75 100 125 TC - Case Temperature (Û& 150 ZșJA - Normalized Thermal Impedance FIGURE 2-13: Maximum Drain Current vs. Temperature 3.3x3.3-PDFN (MCP87090T-U/LC). 31 30 ID = 250 μA 29 28 27 26 25 -60 -40 -20 0 20 40 60 80 100 120 140 160 TC - Case Temperature(°C) FIGURE 2-16: Drain-to-Source Breakdown Voltage vs. Temperature. 1 0.1 DC = 0.5 DC = 0.3 DC = 0.1 DC = 0.05 DC = 0.02 DC = 0.01 Single Pulse 0.01 0.001 0.001 0.1 10 t1 - Pulse Duration (s) 1000 FIGURE 2-14: Transient Thermal Impedance 3.3x3.3-PDFN (MCP87090T-U/LC). IAS - Ava alanche Current (A) 100 10 TC = +25°C TC = +150°C 1 0.01 0.1 1 10 tAV - Avalanche Time (ms) 100 FIGURE 2-15: Single-Pulse Unclamped Inductive Switching. DS20002332B-page 6 2013 Microchip Technology Inc. MCP87090 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PINOUT DESCRIPTION FOR THE MCP87090 MCP87090 5x6 PDFN, 3.3 x 3.3 PDFN Pin Type Function 1, 2, 3 S Source pin 4 G Gate pin 5, 6, 7, 8 D Drain pin, including exposed thermal pad 2013 Microchip Technology Inc. DS20002332B-page 7 MCP87090 4.0 PACKAGING INFORMATION 4.1 Package Marking Information* 8-Lead PDFN (3.3x3.3x1.0 mm) Example 090U 1232 256 8-Lead PDFN (5x6x1.0 mm) NNN PIN 1 Example 87090 U/MF e ^^3 1232 256 PIN 1 *RoHS compliant using EU-RoHS exemption: 7(a) - Lead in high-melting-temperature-type solders (i.e. lead-based alloys containing 85% by weight or more lead) can be found on the outer packaging for this package. Legend: XX...X Y YY WW NNN e3 * Note: DS20002332B-page 8 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2013 Microchip Technology Inc. MCP87090 2013 Microchip Technology Inc. DS20002332B-page 9 MCP87090 DS20002332B-page 10 2013 Microchip Technology Inc. MCP87090 2013 Microchip Technology Inc. DS20002332B-page 11 MCP87090 DS20002332B-page 12 2013 Microchip Technology Inc. MCP87090 2013 Microchip Technology Inc. DS20002332B-page 13 MCP87090 DS20002332B-page 14 2013 Microchip Technology Inc. MCP87090 APPENDIX A: REVISION HISTORY Revision B (August 2013) The following is the list of modifications. 1. 2. Updated the Thermal Resistances maximum values in the Temperature Characteristics table. Added Figure 2-9, Figure 2-10, Figure 2-11, Figure 2-12, Figure 2-13 and Figure 2-14. Revision A (January 2013) • Original Release of this Document. 2013 Microchip Technology Inc. DS20002332B-page 15 MCP87090 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Device Temperature Range Package Example: a) b) Device: MCP87090T: Temperature Range: U Package: N-Channel power MOSFET (Tape and Reel) MCP87090T-U/LC: Tape and Reel, Ultra-High Temperature, 8LD 3.3x3.3 PDFN package MCP87090T-U/MF: Tape and Reel, Ultra-High Temperature, 8LD 5x6 PDFN package = -55°C to +150°C (Ultra High) LC = High-Power Dual Flatpack, No Lead Package (3.3x3.3x1.0 mm Body) (PDFN), 8-lead MF = High-Power Dual Flatpack, No Lead Package (5x6x1.0 mm Body) (PDFN), 8-lead DS20002332B-page 16 2013 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. 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Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62077-422-9 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2013 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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