PROFET® BTS 426 L1
Smart Highside Power Switch
Features
Product Summary
Overvoltage protection
Operating voltage
On-state resistance
Load current (ISO)
Current limitation
• Overload protection
• Current limitation
• Short circuit protection
• Thermal shutdown
• Overvoltage protection (including load dump)
• Fast demagnetization of inductive loads
• Reverse battery protection1)
• Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
• Open drain diagnostic output
• Open load detection in ON-state
• CMOS compatible input
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD) protection
Vbb(AZ)
Vbb(on)
RON
IL(ISO)
IL(SCr)
43
V
5.0 ... 34 V
60 mΩ
7.0
A
16
A
TO-220AB/5
5
5
5
1
Straight leads
Standard
1
SMD
Application
• µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
• All types of resistive, inductive and capacitve loads
• Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection
functions.
+ V bb
Voltage
Overvoltage
Current
Gate
source
protection
limit
protection
3
V Logic
2
Voltage
Charge pump
sensor
Level shifter
Rectifier
IN
ESD
4
Limit for
unclamped
ind. loads
OUT
5
Temperature
sensor
Open load
Short to Vbb
detection
Logic
Load
R
ST
O
GND
PROFET
GND
1
Signal GND
1)
Load GND
With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group
1
12.96
BTS 426 L1
Pin
Symbol
Function
1
GND
-
Logic ground
2
IN
I
Input, activates the power switch in case of logical high signal
3
Vbb
+
Positive power supply voltage,
the tab is shorted to this pin
4
ST
S
Diagnostic feedback, low on failure
5
OUT
(Load, L)
O
Output to the load
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 3)
Supply voltage for full short circuit protection
Tj Start=-40 ...+150°C
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V
RI3)= 2 Ω, RL= 1.7 Ω, td= 200 ms, IN= low or high
Load current (Short circuit current, see page 4)
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
IL = 7.0 A, ZL = 24 mH, 0 Ω:
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
all other pins:
Symbol
Vbb
Vbb
VLoad dump4)
IL
Tj
Tstg
Ptot
EAS
VESD
Values
43
34
Unit
V
V
60
V
self-limited
-40 ...+150
-55 ...+150
75
A
°C
0.74
1.0
2.0
J
kV
-10 ... +16
±2.0
±5.0
V
mA
Values
typ
max
-- 1.67
-75
34
Unit
W
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
VIN
IIN
IST
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 6
Thermal Characteristics
Parameter and Conditions
Thermal resistance
2)
3)
4)
5)
Symbol
chip - case: RthJC
junction - ambient (free air): RthJA
SMD version, device on PCB5):
min
---
K/W
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group
2
BTS 426 L1
Electrical Characteristics
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Unit
Load Switching Capabilities and Characteristics
On-state resistance (pin 3 to 5)
IL = 2 A
Tj=25 °C:
Tj=150 °C:
Nominal load current, ISO Norm (pin 3 to 5)
VON = 0.5 V, TC = 85 °C
Output current (pin 5) while GND disconnected or
GND pulled up, Vbb=30 V, VIN= 0, see diagram
page 7
Turn-on time
IN
to 90% VOUT:
to 10% VOUT:
Turn-off time
IN
RL = 12 Ω, Tj =-40...+150°C
Slew rate on
10 to 30% VOUT, RL = 12 Ω, Tj =-40...+150°C
Slew rate off
70 to 40% VOUT, RL = 12 Ω, Tj =-40...+150°C
Operating Parameters
Operating voltage6)
Undervoltage shutdown
Undervoltage restart
Tj =-40...+150°C:
Tj =-40...+150°C:
Tj =-40...+25°C:
Tj =+150°C:
Undervoltage restart of charge pump
Tj =-40...+150°C:
see diagram page 12
Undervoltage hysteresis
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Tj =-40...+150°C:
Overvoltage shutdown
Tj =-40...+150°C:
Overvoltage restart
Tj =-40...+150°C:
Overvoltage hysteresis
Tj =-40...+150°C:
Overvoltage protection7)
Ibb=40 mA
Standby current (pin 3)
VIN=0
Tj=-40...+25°C:
Tj= 150°C:
7)
IL(ISO)
IL(GNDhigh)
--
50
60
120
5.8
100
7.0
--
--
ton
toff
80
80
200
230
400
450
µs
dV /dton
0.1
--
1
V/µs
-dV/dtoff
0.1
--
1
V/µs
Vbb(on)
Vbb(under)
Vbb(u rst)
5.0
3.5
--
----
V
V
V
Vbb(ucp)
--
5.6
34
5.0
5.0
7.0
7.0
∆Vbb(under)
--
0.2
--
V
Vbb(over)
Vbb(o rst)
∆Vbb(over)
Vbb(AZ)
34
33
-42
--0.5
47
43
----
V
V
V
V
----
10
12
--
25
28
12
µA
Ibb(off)
At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V
See also VON(CL) in table of protection functions and circuit diagram page 7.
Semiconductor Group
3
mΩ
-10
IL(off)
Leakage output current (included in Ibb(off))
VIN=0
6)
RON
A
mA
V
µA
BTS 426 L1
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Operating current (Pin 1)8), VIN=5 V,
Tj =-40...+150°C
Protection Functions
Initial peak short circuit current limit (pin 3 to 5)
Tj =-40°C:
Tj =25°C:
Tj =+150°C:
Repetitive short circuit shutdown current limit
Tj = Tjt (see timing diagrams, page 10)
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL)
IL= 40 mA:
Thermal overload trip temperature
Thermal hysteresis
Reverse battery (pin 3 to 1) 9)
Reverse battery voltage drop (Vout > Vbb)
IL = -4 A
Tj=150 °C:
Diagnostic Characteristics
Open load detection current
(on-condition)
IGND
Unit
--
1.8
3.5
mA
21
15
11
32
25
17
43
35
24
A
--
16
--
A
41
150
---
47
-10
--
53
--32
V
°C
K
V
--
610
--
mV
20
10
---
850
750
mA
2
3
4
V
4
10
30
kΩ
IL(SCp)
IL(SCr)
VON(CL)
Tjt
∆Tjt
-Vbb
-VON(rev)
Tj=-40 °C: IL (OL)
Tj=25 ..150°C:
Open load detection voltage10) (off-condition)
VOUT(OL)
Tj=-40..150°C:
Internal output pull down
(pin 5 to 1), VOUT=5 V, Tj=-40..150°C
RO
8)
Values
min
typ
max
Add IST, if IST > 0, add IIN, if VIN>5.5 V
Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 7).
10) External pull up resistor required for open load detection in off state.
9)
Semiconductor Group
4
BTS 426 L1
Parameter and Conditions
Symbol
Values
min
typ
max
RI
2.5
3.5
6
kΩ
VIN(T+)
VIN(T-)
∆ VIN(T)
IIN(off)
1.7
1.5
-1
--0.5
--
3.5
--50
V
V
V
µA
On state input current (pin 2), VIN = 3.5 V,
Tj =-40..+150°C
IIN(on)
20
50
90
µA
Delay time for status with open load after switch
off
(see timing diagrams, page 11), Tj =-40..+150°C
Status invalid after positive input slope
Tj=-40 ... +150°C:
(open load)
Status output (open drain)
Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA:
Tj =-40...+25°C, IST = +1.6 mA:
ST low voltage
Tj = +150°C, IST = +1.6 mA:
td(ST OL4)
100
520
1000
µs
--
250
600
µs
5.4
---
6.1
---
-0.4
0.6
V
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Input and Status Feedback11)
Input resistance
Tj=-40..150°C, see circuit page 6
Input turn-on threshold voltage
Tj =-40..+150°C:
Tj =-40..+150°C:
Input turn-off threshold voltage
Input threshold hysteresis
Off state input current (pin 2), VIN = 0.4 V,
Tj =-40..+150°C
11)
td(ST)
VST(high)
VST(low)
If a ground resistor RGND is used, add the voltage drop across this resistor.
Semiconductor Group
5
Unit
BTS 426 L1
Truth Table
Input-
Output
level
level
425 L1
426 L1
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H (L13))
L
L14)
H (L15))
H
L
H
H
H
H
Normal
operation
Open load
Short circuit
to Vbb
Overtemperature
Undervoltage
Overvoltage
L = "Low" Level
H = "High" Level
Status
12)
H
H
H
L
L
L
L
L
L
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 11...12)
Terms
Input circuit (ESD protection)
Ibb
I IN
2
IL
PROFET
V
IN
VST
4
I
Vbb
IN
I ST
V
R
IN
3
OUT
ESD-ZD I
VON
5
I
I
GND
ST
GND
1
bb
R
IGND
ESD zener diodes are not to be used as voltage clamp
at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).
VOUT
GND
12)
13)
14)
Power Transistor off, high impedance
with external resistor between pin 3 and pin 5
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R GND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
15) Low resistance to V may be detected in ON-state by the no-load-detection
bb
Semiconductor Group
6
BTS 426 L1
Status output
Open-load detection
+5V
ON-state diagnostic condition: VON < RON * IL(OL); IN
high
R ST(ON)
ST
+ V bb
ESDZD
GND
VON
ON
ESD-Zener diode: 6.1 V typ., max 5 mA;
RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not
to be used as voltage clamp at DC conditions.
Operation in this mode may result in a drift of the zener
voltage (increase of up to 1 V).
OUT
Open load
detection
Logic
unit
Inductive and overvoltage output clamp
+ V bb
V
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
Z
VON
R
OFF
OUT
GND
EXT
PROFET
V
Open load
detection
Logic
unit
VON clamped to 47 V typ.
Overvolt. and reverse batt. protection
R
OUT
O
Signal GND
+ Vbb
V
R IN
IN
RI
GND disconnect
Z2
Logic
R ST
3
ST
V
2
PROFET
Z1
IN
Vbb
PROFET
GND
R GND
4
Signal GND
V
VZ1 = 6.2 V typ., VZ2 = 47 V typ., RGND = 150 Ω,
RST= 15 kΩ, RI= 3.5 kΩ typ.
bb
V
IN
V
ST
OUT
5
ST
GND
1
V
GND
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+) .
Due to VGND >0, no VST = low signal available.
Semiconductor Group
7
BTS 426 L1
GND disconnect with GND pull up
Inductive Load switch-off energy
dissipation
E bb
3
2
Vbb
IN
E AS
OUT
PROFET
4
5
IN
ST
GND
PROFET
1
V
V
bb
ELoad
V bb
V
=
V
IN ST
OUT
ST
EL
GND
GND
ZL
{
L
RL
ER
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
Vbb disconnect with energized inductive
load
Energy stored in load inductance:
2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
3
high
2
Vbb
IN
OUT
PROFET
4
EAS= Ebb + EL - ER= ∫ VON(CL)·iL(t) dt,
with an approximate solution for RL > 0 Ω:
5
ST
GND
EAS=
1
V
bb
Normal load current can be handled by the PROFET
itself.
Vbb disconnect with charged external
inductive load
high
2
S
3
IN
Vbb
PROFET
4
OUT
5
D
ST
GND
1
V
bb
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
Semiconductor Group
8
IL· L
IL·RL
·(V + |VOUT(CL)|)· ln (1+
)
|VOUT(CL)|
2·RL bb
BTS 426 L1
Transient thermal impedance chip ambient air
Maximum allowable load inductance for
a single switch off
ZthJA = f(tp)ZthJA [K/W]
100
L = f (IL ); Tj,start = 150°C,TC = 150°C const.,
Vbb = 12 V, RL = 0 Ω
L [mH]
10000
10
1000
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
1
100
10
0.1
1E-5
1E-4
1E-3
1E-2
1E-1
1E0
1E1
1E2
1E3
tp [s]
1
2
7
12
17
IL [A]
Typ. transient thermal impedance chip case
ZthJC = f(tp)ZthJC [K/W]
10
1
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
0.1
0.01
1E-5
1E-4
1E-3
1E-2
1E-1
1E0
1E1
tp [s]
Semiconductor Group
9
BTS 426 L1
Timing diagrams
Figure 2b: Switching an inductive load
Figure 1a: Vbb turn on:
IN
IN
V
bb
t
ST
d(ST)
*)
V
V
OUT
OUT
ST open drain
IL
I L(OL)
t
t
proper turn on under all conditions
*) if the time constant of load is too large, open-load-status may
occur
Figure 2a: Switching a lamp,
Figure 3a: Short circuit
shut down by overtempertature, reset by cooling
IN
IN
ST
IL
V
I L(SCp)
OUT
IL(SCr)
I
L
t
ST
Heating up may require several milliseconds, depending on
external conditions
Semiconductor Group
10
t
BTS 426 L1
Figure 4a: Overtemperature:
Reset if Tj <Tjt
Figure 5b: Open load: detection in ON-state, open
load occurs in on-state
IN
IN
t
d(ST OL1)
ST
ST
V
V
t
d(ST OL2)
OUT
OUT
T
I
J
normal
open
normal
L
t
t
td(ST OL1) = 20 µs typ., td(ST OL2) = 10 µs typ
Figure 5a: Open load: detection in ON-state, turn
on/off to open load
Figure 5c: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load
IN
IN
ST
t
d(ST)
t
d(ST OL4)
ST
t
d(ST)
V
OUT
V
OUT
I
L
I
L
open
open
t
t
The status delay time td(ST OL4) allows to ditinguish between
the failure modes "open load" and "overtemperature".
Semiconductor Group
11
BTS 426 L1
Figure 6a: Undervoltage:
Figure 7a: Overvoltage:
IN
IN
V bb
V bb
V ON(CL)
Vbb(over)
V bb(o rst)
Vbb(u cp)
V
V
bb(under)
bb(u rst)
V
OUT
V OUT
ST
ST open drain
t
t
Figure 6b: Undervoltage restart of charge pump
on-state
off-state
V
V
bb(u rst)
V
V
V
bb(over)
off-state
VON(CL)
V on
bb(o rst)
bb(u cp)
bb(under)
V bb
charge pump starts at Vbb(ucp) =5.6 V typ.
Semiconductor Group
12
BTS 426 L1
Package and Ordering Code
All dimensions in mm
Standard TO-220AB/5
BTS426L1
SMD TO-220AB/5, Opt. E3062 Ordering code
Ordering code
BTS426L1 E3062A T&R:
Q67060-S6108-A2
Changed since 04.96
Date Change
td(ST OL4) max reduced from 1500
Dec
1996 to 800µs, typical from 400 to
320µs, min limit unchanged
EAS maximum rating and diagram
added
Zth specification added
Typ. reverse battery voltage drop VON(rev) added
TO-220AB/5, Option E3043 Ordering code
BTS426L1 E3043
Q67060-S6108-A4
Q67060-S6108-A3
Components used in life-support devices or systems must be
expressly authorised for such purpose! Critical components16)
of the Semiconductor Group of Siemens AG, may only be used in
life supporting devices or systems17) with the express written
approval of the Semiconductor Group of Siemens AG.
16) A critical component is a component used in a life-support
device or system whose failure can reasonably be expected to
cause the failure of that life-support device or system, or to
affect its safety or effectiveness of that device or system.
17) Life support devices or systems are intended (a) to be
implanted in the human body or (b) support and/or maintain
and sustain and/or protect human life. If they fail, it is
reasonably to assume that the health of the user or other
persons may be endangered.
Semiconductor Group
13