Supertex inc. HV5812 20-Channel, Serial-Input, Vacuum-Fluorescent Display Driver for Anode/Grid Features ►► HVCMOS® technology for high performance ►► Operating voltage up to 80V ►► High speed source driver ►► 5.0V CMOS logic circuitry ►► Up to 5.0MHz data input rate ►► Excellent noise immunity ►► Flexible high voltage supplies General Description The Supertex HV5812 is a 20-channel, serial input, vacuumfluorescent display driver. It combines a 20-bit CMOS shift register, data latches, and control circuitry with high voltage MOSFET outputs. The HV5812 is primarily designed for vacuum-fluorescent displays. The CMOS shift register and latches allow direct interfacing with microprocessor based systems. Data input rates are typically over 5.0MHz with 5.0V logic supply. Especially useful for interdigit blanking, the BLANKING input disables the output source drives and turns on the sink drivers. Use with TTL may require external pull-up resistors to ensure an input logic high. Functional Block Diagram BL STROBE VPP HVOUT1 VDD HVOUT2 DATA IN CLK DATA OUT GND Doc.# DSFP-HV5812 C072413 20-bit Shift Register 20-bit Latch HVOUT3 HVOUT20 Supertex inc. www.supertex.com HV5812 Ordering Information Pin Configuration Part Number Package Packing HV5812P-G 28-Lead PDIP 13/Tube HV5812PJ-G 28-Lead PLCC 38/Tube HV5812PJ-G M904 28-Lead PLCC 500/Reel HV5812WG-G 28-LeadSOW 1000/Reel -G denotes a lead (Pb)-free / RoHS compliant package 28-Lead PDIP Absolute Maximum Ratings 4 Parameter -0.5V to +7.5V Supply voltage, VPP -0.5V to +90V Logic input levels -0.3V to VDD +0.3V Maximum junction temperature 26 28-Lead PLCC 125°C Storage temperature range 1 -55°C to +150°C Power dissipation: 28-Lead PDIP 28-Lead PLCC 28-Lead SOW 2000mW 1900mW 1700mW Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to GND. Min Max Units VDD Supply voltage 4.5 5.5 V VPP Supply voltage 20 80 V Operating junction temperature -40 +125 °C 28-Lead PLCC 48OC/W 28-Lead SOW 55OC/W CCCCCCCCCCC AAA *May be part of top marking Package may or may not include the following marks: Si or 28-Lead PDIP LLLLLLLLLL Bottom Marking CCCCCCCCCCC Typical Thermal Resistance 43OC/W LLLLLLLLLL Bottom Marking HV5812PJ Power-down sequence should be the reverse of the above. 28-Lead PDIP HV5812P YYWW AAA The VPP should not drop below VDD during operation. θja YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = “Green” Packaging Top Marking Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, etc.) to a known state. 4. Apply VPP. Package Product Marking YYWW Parameter 28 28-Lead SOW Top Marking Recommended Operating Conditions Tj 1 28 Value Supply voltage, VDD Sym 28 1 YY = Year Sealed WW = Week Sealed L = Lot Number A = Assembler ID C = Country of Origin* = “Green” Packaging *May be part of top marking Package may or may not include the following marks: Si or 28-Lead PLCC YY = Year Sealed WW = Week Sealed H V 5812W G A = Assembler ID LLLLLLLLLL L = Lot Number Bottom Marking C = Country of Origin* = “Green” Packaging CCCCCCCCCCC Top Marking YYWW AAA *May be part of top marking Package may or may not include the following marks: Si or 28-Lead SOW Doc.# DSFP-HV5812 C072413 2 Supertex inc. www.supertex.com HV5812 Electrical Characteristics DC Characteristics (over recommended operating conditions, T A Sym IDSS VOH Parameter Output leakage current High-level output HVOUT DATA OUT VOL Low-level output HVOUT DATA OUT = 25OC, unless otherwise noted) Min Typ Max Units - -5.0 -15 µA 78 78.5 - 77 78 - 4.5 4.7 - - 1.5 3.0 - 2.3 4.0 - 200 250 V V V V Conditions VOUT = 0V, TA = +70°C IOUT = -25mA, VPP = 80V, Tj = +25°C IOUT = -25mA, VPP = 80V, Tj = +125°C IOUT = -200µA, VDD = 5.0V IOUT = 1.0mA, Tj = +25°C, VDD = 5.0V IOUT = 1.0mA, Tj = +125°C, VDD = 5.0V IOUT = +200µA, VDD = 5.0V ISINK Output pull-down current 2.0 3.5 - mA VIH High level logic input voltage 3.5 - 5.3 V VDD = 5.0V VIL Low level logic input voltage -0.3 - 0.8 V --- IIH High level logic input current - 0.05 0.5 µA VIN = VDD, VDD = 5.0V IIL Low level logic input current - -0.05 -0.5 µA VIN = 0.8V, VDD = 5.0V IDDQ Quiescent VDD supply current - 100 300 - 100 300 IPPQ Quiescent VPP supply current - 10 100 - 10 100 AC Characteristics (over recommended operating conditions, T A tPHL tPLH Blanking to output delay µA µA VOUT = 5.0V to VPP, VDD = 5.0V All outputs high, VDD = 5.0V All outputs low, VDD = 5.0V All outputs high, no load All outputs low, no load = 25OC, unless otherwise noted) - 2000 - - 1000 - ns CL = 30pF, 50% to 50%, VDD = 5.0V tf Output fall time - 1450 - ns CL = 30pF, 90% to 10%, VDD = 5.0V tr Output rise time - 650 - ns CL = 30pF, 10% to 90%, VDD = 5.0V tsu Data set-up time 75 - - ns See timing diagram th Data hold time 75 - - ns See timing diagram tpwd Minimum data pulse width 150 - - ns See timing diagram tpwclk Minimum clock pulse width 150 - - ns See timing diagram tcks Minimum time between clock activation and strobe 300 - - ns See timing diagram tpws Minimum strobe pulse width 100 - ns See timing diagram tsto Typical time between strobe activation and output transition ns See timing diagram fCLK Maximum clock frequency Doc.# DSFP-HV5812 C072413 - 500 - - 8.0 - - 5.0 - 3 MHz Tj = +25°C, VDD = 5.0V Tj = +125°C, VDD = 5.0V Supertex inc. www.supertex.com HV5812 Function Table Serial Data Input Clock Input I1 I2 I3 ... IN-1 IN Serial Data Output H L to H H R1 R2 ... RN-2 RN-1 RN-1 L L to H L R1 R2 ... RN-2 RN-1 X H to L R1 R2 R3 ... RN-1 - - X X - - P1 - - - Note: L = H = X = P = R = Shift Register Contents Strobe Input Latch Content I1 I2 I3 ... IN-1 IN - - - - - RN-1 - - - - RN RN - - - X ... X X X L R1 P2 P3 ... PN-1 PN PN H - - - - - Output Content Blanking I1 I2 I3 ... IN-1 IN - - - - - - - - - - - - - - - - - - R2 R3 ... RN-1 RN - - - - - P1 P2 P3 ... PN-1 PN L P1 P2 P3 ... PN-1 PN X X X ... X X H L L L ... L L Low logic level High logic level Irrelevant Present state Previous state Timing Diagram tPWCLK CLK 50% VIH 50% VIL tSU DATA IN 50% tPWD VIH 50% th tCKS STROBE VIL tPWS 50% VIH 50% BL 50% 50% tPHL tSTO HVOUT 90% 10% 90% tr 50% 10% tPLH 50% VIL VOH VOL tf Input and Output Equivalent Circuits VDD VIL VIH VPP VDD L/T GND GND GND Logic Inputs Doc.# DSFP-HV5812 C072413 HVOUT Data Out INPUT Logic Data Output 4 High Voltage Outputs Supertex inc. www.supertex.com HV5812 28-Lead PDIP Pin Description Pin # Function Pin # Function Pin # Function 1 VPP 11 HVOUT12 21 HVOUT6 2 Data Out 12 HVOUT11 22 HVOUT5 3 HVOUT20 13 BLANKING 23 HVOUT4 4 HVOUT19 14 GND 24 HVOUT3 5 HVOUT18 15 CLOCK 25 HVOUT2 6 HVOUT17 16 STROBE 26 HVOUT1 7 HVOUT16 17 HVOUT10 27 Data In 8 HVOUT15 18 HVOUT9 28 VDD 9 HVOUT14 19 HVOUT8 10 HVOUT13 20 HVOUT7 28-Lead PLCC Pin Description Pin # Function Pin # Function Pin # Function 1 VPP 11 HVOUT12 21 HVOUT6 2 Data Out 12 HVOUT11 22 HVOUT5 3 HVOUT20 13 BLANKING 23 HVOUT4 4 HVOUT19 14 GND 24 HVOUT3 5 HVOUT18 15 CLOCK 25 HVOUT2 6 HVOUT17 16 STROBE 26 HVOUT1 7 HVOUT16 17 HVOUT10 27 Data In 8 HVOUT15 18 HVOUT9 28 VDD 9 HVOUT14 19 HVOUT8 10 HVOUT13 20 HVOUT7 28-Lead SOW Pin Description Pin # Function Pin # Function Pin # Function 1 VPP 11 HVOUT12 21 HVOUT6 2 Data Out 12 HVOUT11 22 HVOUT5 3 HVOUT20 13 BLANKING 23 HVOUT4 4 HVOUT19 14 GND 24 HVOUT3 5 HVOUT18 15 CLOCK 25 HVOUT2 6 HVOUT17 16 STROBE 26 HVOUT1 7 HVOUT16 17 HVOUT10 27 Data In 8 HVOUT15 18 HVOUT9 28 VDD 9 HVOUT14 19 HVOUT8 10 HVOUT13 20 HVOUT7 Doc.# DSFP-HV5812 C072413 5 Supertex inc. www.supertex.com HV5812 28-Lead PDIP (.600in Row Spacing) Package Outline (P) 1.565x.580in body, .250in height (max), .100in pitch D 28 E1 E Note 1 (Index Area) 1 b1 e D1 L b D1 Top View View B View B A A2 A Seating Plane A1 eA eB A Side View View A - A Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (inches) A A1 A2 b b1 D D1 MIN .140* .015 .125 .014 .030 1.380 .065 NOM - - - - - - - - - MAX .250 .055* .195 .023 .070 1.565 .085* .625 .580 † E † .590 E1 † .485 e eA .100 BSC .600 BSC eB L .600* .115 - - .700 .200 JEDEC Registration MS-011, Variation AB, Issue B, June, 1988. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-28DIPP, Version B041009. Doc.# DSFP-HV5812 C072413 6 Supertex inc. www.supertex.com HV5812 28-Lead PLCC Package Outline (PJ) .453x.453in. body, .180in. height (max), .050in. pitch D .048/.042 x 45O D1 1 4 28 .056/.042 x 45O 26 .150max Note 1 (Index Area) .075max E E1 Note 2 e .020max (3 Places) Top View Vertical Side View View B b1 A A1 Base .020min Plane A2 Seating Plane b Horizontal Side View R View B Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary. Symbol Dimension (inches) A A1 A2 b b1 D D1 E E1 MIN .165 .090 .062 .013 .026 .485 .450 .485 .450 NOM .172 .105 - - - .490 .453 .490 .453 MAX .180 .120 .083 .021 .032 .495 .456 .495 .456 e .050 BSC R .025 .035 .045 JEDEC Registration MS-018, Variation AB, Issue A, June, 1993. Drawings not to scale. Supertex Doc. #: DSPD-28PLCCPJ, Version B031111. Doc.# DSFP-HV5812 C072413 7 Supertex inc. www.supertex.com HV5812 28-Lead SOW (Wide Body) Package Outline (WG) 17.90x7.50mm body, 2.65mm height (max), 1.27mm pitch D 28 θ1 E1 E Note 1 (Index Area 0.25D x 0.75E1) L L1 e 1 L2 b Top View θ Gauge Plane Seating Plane View B View B Note 1 A h h A A2 Seating Plane A1 Side View View A-A A Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol MIN Dimension NOM (mm) MAX A A1 A2 b D E E1 2.15* 0.10 2.05 0.31 17.70* 9.97* 7.40* - - - - 17.90 10.30 7.50 2.65 0.30 2.55* 0.51 18.10* 10.63* 7.60* e 1.27 BSC h L 0.25 0.40 - - 0.75 1.27 L1 1.40 REF L2 0.25 BSC θ θ1 0 5O O - - 8O 15O JEDEC Registration MS-013, Variation AE, Issue E, Sep. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-28SOWWG, Version D041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to: http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV5812 C072413 8 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com