Supertex inc. HV232 Low Charge Injection 8-Channel High Voltage Analog Switches with Bleed Resistors Features General Description ►► HVCMOS technology for high performance ►► Very low quiescent power dissipation (10µA max.) ►► Output on-resistance (22Ω typ.) ►► Integrated bleed resistors on the outputs ►► Low parasitic capacitances ►► DC to 50MHz small signal frequency response ►► -60dB typical output off isolation at 5.0MHz ►► CMOS logic circuitry for low power ►► Excellent noise immunity ►► On-chip shift register, latch and clear logic circuitry ►► Flexible high voltage supplies ® Applications ►► Medical ultrasound imaging ►► Piezoelectric transducer drivers The Supertex HV232 is a low charge injection 8-channel, high-voltage, analog switch integrated circuit (IC) with bleed resistors. This device can be used in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. The bleed resistors eliminate voltage built up on capacitive loads such as piezoelectric transducers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, Latch Enable (LE) should be left high until all bits are clocked in. Using HVCMOS® technology, this switch combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. This IC is suitable for various combinations of high voltage supplies, e.g., VPP/VNN: +50V/–150V, or +100V/–100V. Block Diagram Latches Level Shifters D LE CL DIN CLK 8-Bit Shift Register DOUT VDD Doc.# DSFP-HV232 C071613 LE CL Output Switches SW0 D LE CL SW1 D LE CL SW2 D LE CL SW3 D LE CL SW4 D LE CL SW5 D LE CL SW6 D LE CL SW7 VNN VPP RGND Supertex inc. www.supertex.com HV232 Pin Configuration Ordering Information Part Number Package Option Packing HV232FG-G 48-Lead LQFP 250/Tray HV232FG-G M931 48-Lead LQFP 1000/Reel HV232PJ-G 28-Lead PLCC 38/Tube HV232PJ-G M904 28-Lead PLCC 500/Reel 1 48-Lead LQFP -G denotes a lead (Pb)-free / RoHS compliant package (top view) 4 Absolute Maximum Ratings Parameter 26 -0.5V to +15V VPP - VNN supply voltage 220V VPP positive high voltage supply -0.5V to VNN +200V VNN negative high voltage supply 28-Lead PLCC +0.5V to -200V Logic input voltages -0.5V to VDD +0.3V Analog signal range VNN to VPP Peak analog signal current/channel Storage temperature 3.0A -65OC to +150OC Power dissipation: 48-Lead LQFP 28-Lead PLCC 1.0W 1.2W Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. (top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed L = Lot Number Bottom Marking C = Country of Origin* A = Assembler ID* = “Green” Packaging CCCCCCCC YYWW HV 232F G LLLLLLLLL AAA 48-Lead LQFP Top Marking YYWW Sym Parameter HV232PJ Value VDD Logic power supply voltage1,3 VPP Positive high voltage supply VNN Negative high voltage supply1,3 VIH High level input voltage VDD -1.5V to VDD VIL Low-level input voltage 0V to 1.5V VSIG Analog signal voltage peak-to-peak2 1,3 Operating free air temperature 4.5V to 13.2V LLLLLLLLLL Bottom Marking 40V to VNN +200V CCCCCCCCCCC AAA -40V to -160V VNN +10V to VPP -10V 0 C to 70 C O O Notes: 1. Power up/down sequence is arbtrary except GND must be powered -up first and powered down last. 2. VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition. 3. Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. 2 *May be part of top marking Package may or may not include the following marks: Si or Operating Conditions Doc.# DSFP-HV232 C071613 1 28 Value VDD logic power supply voltage TA 48 YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = “Green” Packaging *May be part of top marking Package may or may not include the following marks: Si or 28-Lead PLCC Typical Thermal Resistance Package 48-Lead LQFP 28-Lead PLCC θja 52OC/W 48OC/W Supertex inc. www.supertex.com HV232 DC Electrical Characteristics (Over operating conditions unless otherwise specified ) Sym Parameter 0OC +25OC +70OC Unit Conditions Min Max Min Typ Max Min Max - 30 - 26 38 - 48 - 25 - 22 27 - 32 - 25 - 22 27 - 30 - 18 - 18 24 - 27 - 23 - 20 25 - 30 - 22 - 16 25 - 27 Small signal switch on-resistance matching - 20 - 5.0 20 - 20 % RONL Large signal switch on-resistance ISIG = 5.0mA, VPP = +100V, VNN = -100V - - - 15 - - - Ω VSIG = VPP -10V, ISIG = 1.0A RINT Output switch shunt resistance - - 20 35 50 - - KΩ Output switch to RGND IRINT = 0.5mA ISOL Switch off leakage per switch - 5.0 - 1.0 10 - 15 μA VSIG = VPP -10V DC offset switch off - 300 - 100 300 - 300 mV No load DC offset switch on - 500 - 100 500 - 500 mV No load IPPQ Quiescent VPP supply current - - - 10 50 - - μA All switches off INNQ Quiescent VNN supply current - - - -10 -50 - - μA All switches off IPPQ Quiescent VPP supply current - - - 10 50 - - μA All switches on, ISW = 5.0mA INNQ Quiescent VNN supply current - - - -10 -50 - - μA All switches on, ISW = 5.0mA ISW Switch output peak current - 3.0 - 3.0 2.0 - 2.0 A VSIG duty cycle - 0.1% fSW Output switching frequency - - - - 50 - - kHz - 6.5 - - 7.0 - 8.0 - 4.0 - - 5.0 - 5.5 - 4.0 - - 5.0 - 5.5 - 6.5 - - 7.0 - 8.0 - 4.0 - - 5.0 - 5.5 - 4.0 - - 5.0 - 5.5 RONS ΔRONS VOS IPP INN Small signal switch on-resistance Supply current Supply curent ISIG = 5.0mA VPP = +40V ISIG = 200mA VNN = -160V Ω ISIG = 5.0mA VPP = +100V ISIG = 200mA VNN = -100V ISIG = 5.0mA VPP = +160V ISIG = 200mA VNN = -40V Duty cycle = 50% VPP = +40V VNN = -160V mA VPP = +100V VNN = -100V VPP = +160V VNN = -40V VPP = +40V VNN = -160V mA VPP = +100V VNN = -100V VPP = +160V VNN = -40V All output switches are turning On and Off at 50kHz with no load All output switches are turning On and Off at 50kHz with no load IDD Logic supply average current - 4.0 - - 4.0 - 4.0 mA fCLK = 5.0MHz, VDD = 5.0V IDDQ Logic supply quiescent current - 10 - - 10 - 10 μA --- ISOR Data out source current 0.45 - 0.45 0.70 - 0.40 - mA VOUT = VDD -0.7V ISINK Data out sink current 0.45 - 0.45 0.70 - 0.40 - mA VOUT = 0.7V CIN Logic input capacitance - 10 10 - 10 pF --- Doc.# DSFP-HV232 C071613 - - 3 Supertex inc. www.supertex.com HV232 AC Electrical Characteristics (Over recommended operating conditions, V Sym Parameter 0OC +25OC DD = 5.0V, unless otherwise specified) +70OC Min Max Min Typ Max Min Max Unit Conditions tSD Set up time before LE rises 150 - 150 - - 150 - ns --- tWLE Time width of LE 150 - 150 - - 150 - ns --- tDO Clock delay time to data out 55 150 60 - 150 70 150 ns --- tWCL Time width of CL 150 - 150 - - 150 - ns --- tSU Set up time data to clock 15 - 15 8.0 - 20 - ns --- tH Hold time data from clock 35 - 35 - - 35 - ns --- fCLK Clock frequency - 5.0 - - 5.0 - 5.0 MHz tR, tF Clock rise and fall times - 1.0 - - 1.0 - 1.0 μs --- tON Turn on time - 5.0 - - 5.0 - 5.0 μs VSIG = VPP -10V, RL = 10kΩ tOFF Turn off time - 5.0 - - 5.0 - 5.0 μs VSIG = VPP -10V, RL = 10kΩ - 20 - - 20 - 20 - 20 - - 20 - 20 - 20 - - 20 - 20 -30 - -30 -33 - -30 - -58 - -58 - - -58 - -60 - -60 -70 - -60 - dB f = 5.0MHz, 50Ω load - 300 - - 300 - 300 mA 300ns pulse width, 2.0% duty cycle CSG(OFF) Off capacitance SW to GND 5.0 17 5.0 12 17 5.0 17 pF 0V, f = 1.0MHz CSG(ON) On capacitance SW to GND 25 50 25 38 50 25 50 pF 0V, f = 1.0MHz +VSPK - - - - 150 - - -VSPK - - - - 150 - - +VSPK - - - - 150 - - - - - - 150 - - +VSPK - - - - 150 - - -VSPK - - - - 150 - - dv/dt Maximun VSIG slew rate KO Off isolation KCR Switch crosstalk IID -VSPK Output switch isolation diode current Output voltage spike Doc.# DSFP-HV232 C071613 4 50% Duty cycle, fDATA = fCLK/2 VPP = +160V, VNN = -40V V/ns VPP = +100V, VNN = -100V VPP = +40V, VNN = -160V dB f = 5.0MHz, 1.0kΩ/15pF load f = 5.0MHz, 50Ω load VPP = +40V, VNN = -160V, RL = 50Ω mV VPP = +100V, VNN = -100V, RL = 50Ω VPP = +160V, VNN = -40V, RL = 50Ω Supertex inc. www.supertex.com HV232 Truth Table D0 D1 D2 D3 D4 D5 D6 D7 LE CLK SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 L L L Off H L L On L L L Off H L L On L L Off On L H L L L L L Off H L L On L L L Off H L L On L L L Off H L L On L L L Off H L L On L L L Off H L L On X X X X X X X X H L Hold Previous State X X X X X X X X X H All Switches Off Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L to H transition of the CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch. 4. DOUT is high when data in the shift register 7 is high. 5. Shift register clocking has no effect on the switch states if LE is high. 6. The CLR clear input overrides all other inputs. Logic Timing Waveforms DN+1 DN DATA IN 50% LE 50% DN-1 50% 50% tWLE tSD 50% CLOCK 50% tSU th tDO DATA OUT VOUT (typ) tOFF OFF tON 90% 10% ON CLR Doc.# DSFP-HV232 C071613 50% 50% tWCL 50% 5 Supertex inc. www.supertex.com HV232 Test Circuits VPP –10V VPP –10V ISOL RL 10KΩ VOUT VOUT Open RGND Open RGND VPP VPP VDD VNN VNN GND 5.0V RGND VPP VPP VDD VNN VNN GND 5.0V VPP VPP VDD VNN VNN GND TON/TOFF Test Circuit DC Offset ON/OFF Switch OFF Leakage 5.0V VIN = 10 VP–P @5MHz VIN = 10 VP–P @5MHz VSIG 50Ω IID VOUT VNN RL RGND RGND VPP RGND VPP VNN NC 50Ω VDD VNN 5.0V GND KO = 20Log VPP VPP VDD VNN VNN GND 5.0V VPP VPP VDD VNN VNN GND VOUT VIN KCR = 20Log OFF Isolation Isolation Diode Current 5.0V VOUT VIN Crosstalk +VSPK DVOUT VOUT VOUT –VSPK 1000pF RL 50Ω RGND VSIG 1KΩ RGND VPP VPP VDD VNN VNN GND 5.0V VPP VPP VDD VNN VNN GND 5.0V Q = 1000pF x DVOUT Charge Injection Doc.# DSFP-HV232 C071613 Output Voltage Spike 6 Supertex inc. www.supertex.com HV232 Pin Description (48-Lead LQFP) Pin Function Pin Function 1 SW5 25 VNN 2 N/C 26 N/C 3 SW4 27 RGND 4 N/C 28 GND 5 SW4 29 VDD 6 N/C 30 N/C 7 N/C 31 N/C 8 SW3 32 N/C 9 N/C 33 DIN 10 SW3 34 CLK 11 N/C 35 LE 12 SW2 36 CLR 13 N/C 37 DOUT 14 SW2 38 N/C 15 N/C 39 SW7 16 SW1 40 N/C 17 N/C 41 SW7 18 SW1 42 N/C 19 N/C 43 SW6 20 SW0 44 N/C 21 N/C 45 SW6 22 SW0 46 N/C 23 N/C 47 SW5 24 VPP 48 N/C Pin Description (28-Lead PLCC) Doc.# DSFP-HV232 C071613 Pin Function Pin Function 1 SW3 15 N/C 2 SW3 16 DIN 3 SW2 17 CLK 4 SW2 18 LE 5 SW1 19 CL 6 SW1 20 DOUT 7 SW0 21 SW7 8 SW0 22 SW7 9 N/C 23 SW6 10 VPP 24 SW6 11 RGND 25 SW5 12 VNN 26 SW5 13 GND 27 SW4 14 VDD 28 SW4 7 Supertex inc. www.supertex.com HV232 48-Lead LQFP Package Outline (FG) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch D D1 E1 E Note 1 (Index Area D1/4 x E1/4) 48 1 e b Top View View B A A2 Gauge Plane L2 Seating Plane L L1 A1 Seating Plane θ View B Side View Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol MIN Dimension NOM (mm) MAX A A1 A2 b D D1 E E1 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80* - - 1.40 0.22 9.00 7.00 9.00 7.00 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* e 0.50 BSC L 0.45 0.60 0.75 L1 L2 1.00 REF 0.25 BSC θ 0O 3.5O 7O JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-48LQFPFG Version, D041309. Doc.# DSFP-HV232 C071613 8 Supertex inc. www.supertex.com HV232 28-Lead PLCC Package Outline (PJ) .453x.453in. body, .180in. height (max), .050in. pitch D .048/.042 x 45O D1 1 4 28 .056/.042 x 45O 26 .150max Note 1 (Index Area) .075max E E1 Note 2 e .020max (3 Places) Top View Vertical Side View View B b1 A A1 Base .020min Plane A2 Seating Plane b Horizontal Side View R View B Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary. Symbol Dimension (inches) A A1 A2 b b1 D D1 E E1 MIN .165 .090 .062 .013 .026 .485 .450 .485 .450 NOM .172 .105 - - - .490 .453 .490 .453 MAX .180 .120 .083 .021 .032 .495 .456 .495 .456 e .050 BSC R .025 .035 .045 JEDEC Registration MS-018, Variation AB, Issue A, June, 1993. Drawings not to scale. Supertex Doc. #: DSPD-28PLCCPJ, Version B031111. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV232 C071613 9 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com