Supertex inc. HV20822 16-Channel, High Voltage Analog Switch Features General Description ►► HVCMOS® technology for high performance ►► 220V operating conditions ►► Output on-resistance typically 22Ω ►► 5.0 and 12.0V CMOS logic compatibility ►► Very low quiescent current consumption (-10µA) ►► -45dB min off isolation at 7.5MHz ►► Low parasitic capacitance ►► Excellent noise immunity ►► Flexible high voltage supplies Applications The Supertex HV20822 is a 220V, 16-channel, highvoltage analog switch integrated circuit (IC) configured as 2 sets of 8 single-pole single-throw analog switches. It is intended for use in applications requiring high voltage switching controlled by low voltage control signals such as ultrasound imaging and printers. The 2 sets of 8 analog switches are controlled by 2 input logic controls, DIN1 and DIN2. A logic high on DIN1 will turn On switches 0 to 7 and a logic high on DIN2 will turn On switches 8 to 15. ►► Medical ultrasound imaging ►► Piezoelectric transducer drivers Block Diagram VDD DIN1 Latch 1 Level Translator 1 SW0 SW0 SW7 SW7 DIN2 LE Latch 2 Level Translator 2 SW8 SW8 GND VPP VNN SW15 SW15 Doc.# DSFP-HV20822 C071613 Supertex inc. www.supertex.com HV20822 Pin Configuration Ordering Information Part Number Package Option Packing HV20820FG-G 48-Lead LQFP 250/Tray HV20820FG-G M931 48-Lead LQFP 1000/Reel 1 48 -G denotes a lead (Pb)-free / RoHS compliant package Absolute Maximum Ratings Parameter Value VDD Logic power supply voltage 48-Lead LQFP -0.5V to +15V VPP - VNN Supply voltage (top view) +225V VPP Positive high voltage supply -0.5V to VNN +225V VNN Negative high voltage supply Logic input voltages Product Marking +0.5V to -225V Top Marking -0.5V to VDD +0.3V VSIG Analog signal range YYWW VNN to VPP Peak analog signal current/channel Storage temperature HV20822FG 3.0A Bottom Marking -65°C to +150°C Power dissipation 1.0W Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. θja 48-Lead LQFP 52OC/W CCCCCCCC AAA *May be part of top marking Package may or may not include the following marks: Si or 48-Lead LQFP Typical Thermal Resistance Package LLLLLLLLL YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = “Green” Packaging Recommended Operating Conditions Sym Parameter Value VPP Positive high voltage supply1 VNN Negative high voltage supply VDD Logic power supply voltage VIH High-level input voltage VIL Low-level input voltage VSIG Analog signal voltage peak-to-peak TA +50V to +110V -10V to VPP -220V 1 +4.75V to +12.6V 1 VDD -1.0V to VDD 0V to 1.0V VNN +10V to VPP -10V 2 Operating free air-temperature 0°C to 70°C Notes: 1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2. VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition. Doc.# DSFP-HV20822 C071613 2 Supertex inc. www.supertex.com HV20822 DC Electrical Characteristics (Over recommended operating conditions unless otherwise noted) Sym Parameter 0OC +25OC min max min typ +70OC max min max Units Conditions VSIG = 0V, ISIG = 5.0mA, VPP = 50V, VNN = -170V - 30 - 26 32 - 40 - 25 - 22 27 - 35 - 25 - 22 27 - 30 - 20 - 18 22 - 25 Small signal switch on-resistance matching - 20 - 5.0 20 - 20 % ROnL Large signal switch on-resistance VSIG = 0V, ISIG = 5.0mA, VPP = 110V, VNN = -110V - - - 15 - - - Ω VSIG = 0V, ISIG = 1.0mA ISOL Switch-off leakage per switch - 5.0 - 1.0 10 - 15 µA VSIG = VPP -10V and VNN +10V DC offset switch-off 300 - - 100 300 - 300 DC offset switch-on 500 - - 100 500 - 500 ROnS ΔROnS - Small signal switch on-resistance Ω VSIG = 0V, ISIG = 200mA, VPP = 50V, VNN = -170V VSIG = 0V, ISIG = 5.0mA, VPP = 110V, VNN = -110V VSIG = 0V, ISIG = 200mA, VPP = 110V, VNN = -110V mV RL = 100KΩ RL = 100KΩ IPPQ Pos. HV supply current - - - 10 50 - - INNQ Neg. HV supply current - - - -10 -50 - - IPPQ Pos. HV supply current - - 10 50 - - INNQ Neg. HV supply current - - - -10 -50 - - Switch output peak current - 3.0 - 3.0 2.0 - 2.0 fSW Output switch frequency - - - - 50 - IPP IPP supply current - 8.1 - - 8.8 - 10 INN INN supply current - -8.1 - - -8.8 - -10 IPP IPP supply current - 5.0 - - 6.3 - 6.9 INN INN supply current - -5.0 - - -6.3 - -6.9 IDDQ Logic supply quiescent current - 10 - - 10 - 10 µA All logic states are at DC IDD Logic supply average current - 2.0 - - 2.0 - 2.0 mA DIN1 = DIN2 = 3.0MHz, LE = high - All SWs off µA All SWs on, ISW = 5.0mA A KHz mA VSIG duty cycle ≤ 0.1% Duty cycle = 50% VPP = 50V, VNN = -170V, all SWs turning on and off at 50KHz VPP = 110V, VNN = -110V, all SWs turning on and off at 50KHz AC Electrical Characteristics (Over recommended operating conditions unless otherwise noted) Sym Parameter tSIG(Off) Time to turn off VSIG* 0OC +25OC min max min typ +70OC max min max Units Conditions 0 - 0 - - 0 - ns --- tWLE Time width of LE 150 - 150 - - 150 - ns --- tWDIN Time width of DIN 150 - 150 - - 150 - ns --- Set up time before LE rises 150 - 150 - - 150 - ns --- tSD * Time required for analog signal to turn off before output switch turns off. Doc.# DSFP-HV20822 C071613 3 Supertex inc. www.supertex.com HV20822 AC Electrical Characteristics (cont.) Sym 0OC Parameter +25OC min max min typ +70OC max min max Units Conditions tOn Turn-on time - 5.0 - - 5.0 - 5.0 µs VSIG = VPP -10V, RLOAD = 10KΩ tOff Turn-off time - 5.0 - - 5.0 - 5.0 µs VSIG = VPP -10V, RLOAD = 10KΩ KO Off isolation -30 - -30 -33 - -30 - dB f = 5.0MHz, 1.0KΩ/15pF Load -45 - -45 -50 - -45 - dB f = 7.5MHz, RLOAD = 50Ω KCR Switch crosstalk -45 - -45 - - -45 - dB f = 5.0MHz, RLOAD = 50Ω CGS(Off) Off-capacitance switch to GND 5.0 17 5.0 12 17 5.0 17 pF VSIG = 0V, 1.0MHz CGS(On) On-capacitance switch to GND 25 50 25 38 50 25 50 pF VSIG = 0V, 1.0MHz - - - 4.0 - - - - - - -4.0 - - - +VSPK -VSPK Output voltage spike V ----- Logic Truth Table DIN2 DIN1 LE SW0 to SW7 SW8 to SW15 L L L Off Off L H L On Off H L L Off On H H L On On X X H Hold Previous State Logic Timing Waveform VDD DIN 0V 50% tSD tWLE VDD LE 0V ON SW 50% 50% tON 50% tOFF 90% 10% OFF Doc.# DSFP-HV20822 C071613 4 Supertex inc. www.supertex.com HV20822 Test Circuits VPP - 10V VPP - 10V 10kΩ ISOL RL VOUT VOUT VNN + 10 100kΩ VPP VPP VDD VNN VPP GND 5.0V RL VPP VPP VDD VNN VPP GND Switch Off Leakage 5.0V VPP VPP VDD VNN VPP GND DC Offset ON/OFF 5.0V TON/TOFF Test Circuit VIN = 10VP-P @5.0MHz VIN = 10VP-P @5.0MHz VOUT VSIG 50Ω IID VOUT VNN RL VPP VPP VDD VNN VPP GND KCR = 20Log 5.0V 50Ω VPP VPP VDD VNN VPP GND VPP VPP VDD VNN VPP GND KCR = 20Log VIN 5.0V VOUT VIN Crosstalk Isolation Diode Current +VSPK ∆VOUT VOUT -VSPK 1000pF 50Ω VSIG RL 1.0kΩ VPP VPP VDD VNN VPP GND 5.0V Q = 1000pF x ΔVOUT RL VPP VPP VDD VNN VPP GND 5.0V Output Voltage Spike Charge Injection Doc.# DSFP-HV20822 C071613 5.0V VOUT OFF Isolation VOUT NC 5 Supertex inc. www.supertex.com HV20822 Pin Description Pin # Function Pin # Function 1 VNN 25 SW10 2 N/C 26 SW10 3 VPP 27 SW9 4 N/C 28 SW9 5 DIN1 29 SW8 6 LE 30 SW8 7 DIN2 31 SW7 8 N/C 32 SW7 9 N/C 33 SW6 10 VDD 34 SW6 11 GND 35 SW5 12 N/C 36 SW5 13 N/C 37 SW4 14 SW15 38 N/C 15 SW15 39 SW4 16 SW14 40 N/C 17 SW14 41 SW3 18 SW13 42 SW3 19 SW13 43 SW2 20 SW12 44 SW2 21 SW12 45 SW1 22 SW11 46 SW1 23 SW11 47 SW0 24 N/C 48 SW0 Doc.# DSFP-HV20822 C071613 6 Supertex inc. www.supertex.com HV20822 48-Lead LQFP Package Outline (FG) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch D D1 E1 E Note 1 (Index Area D1/4 x E1/4) 48 1 e b Top View View B A A2 L2 Seating Plane L L1 A1 θ Gauge Plane Seating Plane View B Side View Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol MIN Dimension NOM (mm) MAX A A1 A2 b D D1 E E1 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80* - - 1.40 0.22 9.00 7.00 9.00 7.00 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* e L 0.50 BSC 0.45 0.60 0.75 L1 1.00 REF L2 0.25 BSC θ 0O 3.5O 7O JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-48LQFPFG Version, D041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV20822 C071613 7 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com