TFDU4300 VISHAY Vishay Semiconductors Infrared Transceiver Module (SIR, 115.2 kbit/s) for IrDA® applications Description The TFDU4300 is a low profile (2.5 mm) infrared transceiver module with independent logic reference voltage (Vlogic) for low voltage IO interfacing. It is compliant to the latest IrDA physical layer standard for fast infrared data communication, supporting IrDA speeds up to 115.2 kbit/s (SIR) and carrier based remote control. The transceiver module consists of a PIN photodiode, an infrared emitter (IRED), and a low-power control IC to provide a total front-end solution in a single package. This device covers an extended IrDA low power range of close to 1 m. With an external current control resistor the current can be adjusted for shorter ranges. This Vishay SIR transceiver is built in a new smaller package using the experiences of the lead frame BabyFace technology. The Rxd output pulse width is independent of the optical input pulse width and stays always at a fixed pulse width thus making the device optimum for standard Endecs. TFDU4300 has a tri-state output and is floating in shut-down mode with a weak pull-up. Features • Compliant to the latest IrDA physical layer specification (9.6 kbit/s to 115.2 kbit/s) and TV Remote Control, bi-directional operation included. • Operates from 2.4 V to 5.5 V within specification over full temperature range from - 30 °C to + 85 °C • Logic voltage 1.5 V to 5.5 V is independent of IRED driver and analog supply voltage • Split power supply, transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs, US Patent No. 6,157,476 • Extended IrDA Low Power Range to about 70 cm • Typical Remote Control Range 12 m • Low Power Consumption (< 0.12 mA Supply Current) • Power Shutdown Mode (< 5 µA Shutdown Current in Full Temperature Range, up to 85 °C) • Surface Mount Package, low profile (2.5 mm) - (L 8.5 mm × H 2.5 mm × W 2.9 mm) • High Efficiency Emitter Document Number 82614 Rev. 1.4, 26-Jan-04 18065 • Low Profile (Universal) Package Capable of Surface Mount Soldering to Side and Top View Orientation • Directly Interfaces with Various Super I/O and Controller Devices as e.g. TOIM4232 • Tri-state-Receiver Output, floating in shut down with a weak pull-up • Compliant with IrDA Background Light Specification • EMI Immunity in GSM Bands > 300 V/m verified Applications • Ideal for Battery Operated Applications • Telecommunication Products (Cellular Phones, Pagers) • Digital Still and Video Cameras • Printers, Fax Machines, Photocopiers, Screen • Projectors • Medical and Industrial Data Collection • Diagnostic Systems • Notebook Computers, Desktop PCs, Palmtop Computers (Win CE, Palm PC), PDAs • Internet TV Boxes, Video Conferencing Systems • External Infrared Adapters (Dongles) • Data Loggers • GPS • Kiosks, POS, Point and Pay Devices including IrFM - Applications www.vishay.com 1 TFDU4300 VISHAY Vishay Semiconductors Parts Table Part Description Qty / Reel TFDU4300-TR1 Oriented in carrier tape for side view surface mounting 750 pcs TFDU4300-TR3 Oriented in carrier tape for side view surface mounting 2500 pcs TFDU4300-TT1 Oriented in carrier tape for top view surface mounting 750 pcs TFDU4300-TT3 Oriented in carrier tape for top view surface mounting 2500 pcs Functional Block Diagram Vlogic Vcc1 Push-Pull Driver Amplifier Comparator Rxd Vcc2 SD Txd Logic & Controlled Driver Control RED C GND 18282 Pin Description Pin Number Function Description 1 VCC2 IRED Anode Connect IRED anode directly to the power supply (VCC2). IRED current can be decreased by adding a resistor in series between the power supply and IRED anode. A separate unregulated power supply can be used at this pin. 2 IRED Cathode IRED Cathode, internally connected to the driver transistor 3 Txd 4 5 Active This Schmitt-Trigger input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the Txd pin is asserted for longer than 300 µs. The input threshold voltage adapts to and follows the logic voltage swing defined by the applied Vlogic voltage. I HIGH Rxd Received Data Output, push-pull CMOS driver output capable of driving standard CMOS or TTL loads. During transmission the Rxd output is inactive. No external pull-up or pull-down resistor is required. Floating with a weak pull-up of 500 kΩ (typ.) in shutdown mode. The voltage swing is defined by the applied Vlogic voltage O LOW SD Shutdown. The input threshold voltage adapts to and follows the logic voltage swing defined by the applied Vlogic voltage. I HIGH 6 VCC1 Supply Voltage 7 Vlogic Vlogic defines the logic voltage level of the I/O ports to adap the logic voltage swing to the IR controller. The Rxd output range is from 0 V to Vlogic, for optimum noise suppression the inputs- logic decision level is 0.5 x Vlogic 8 GND Ground www.vishay.com 2 I/O I Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Pinout Definitions: TFDU4300 weight 75 mg In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhy 1.4.A new version of the standard in any case obsoletes the former 1 2 3 IRED A IRED C Txd 18101 5 6 4 8 7 Rxd SD Vcc Vlog GND version. With introducing the updated versions the old versions are obsolete. Therefore the only valid IrDA standard is the actual version IrPhy 1.4 (in Oct. 2002). Absolute Maximum Ratings Reference point Ground (pin 8) unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Symbol Min Max Unit Supply voltage range, transceiver Parameter - 0.3 V < VCC2 < 6 V - 0.5 V < Vlogic < 6 V Test Conditions VCC1 - 0.5 + 6.0 V Supply voltage range, transmitter - 0.5 V < VCC1 < 6 V - 0.5 V < Vlogic < 6 V VCC2 - 0.5 + 6.0 V Supply voltage range, Vlogic - 0.5 V < VCC1 < 6 V - 0.3 V < VCC2 < 6 V Vlogic - 0.5 + 6.0 V Rxd output voltage - 0.5 V < VCC1 < 6 V - 0.3 V < Vlogic < 6 V VRxd - 0.5 Vlogic + 0.5 V Voltage at all inputs Note: Vin ≥ VCC1 is allowed VIN - 0.5 + 6.0 V Input current for all pins, except IRED anode pin 10 mA Output sinking current Power dissipation see derating curve PD Typ. 25 mA 250 mW 125 °C Ambient temperature range (operating) Tamb - 30 + 85 °C Storage temperature range Tstg - 40 + 100 °C Junction temperature Soldering temperature TJ see recommended solder profile Average output current, pin 1 Repetitive pulsed output current, pin 1 to pin 2 Document Number 82614 Rev. 1.4, 26-Jan-04 t < 90 µs, ton < 20 % 240 °C IIRED(DC) 125 mA IIRED(RP) 600 mA www.vishay.com 3 TFDU4300 VISHAY Vishay Semiconductors Eye safety information Symbol Min Typ. Virtual source size Parameter Method: (1-1/e) encircled energy d 1.3 1.8 Maximum intensity for class 1 IEC60825-1 or EN60825-1, edition Jan. 2001, operating below the absolute maximum ratings Ie *) Max Unit mm mW/sr *) (500)**) Due to the internal limitation measures the device is a "class 1" device under all conditions. **) IrDA specifies the max. intensity with 500 mW/sr. www.vishay.com 4 Test Conditions Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Electrical Characteristics Transceiver Tested @ Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Test Conditions Symbol Min Supply voltage Parameter Remark: For 2.4 V < VCC1 < 2.6 V @ Tamb < - 25 °C a minor reduction of the receiver sensitivity may occur VCC1 2.4 Idle supply current @ VCC1 (receive mode, no signal) SD = Low, Ee = 1 klx*), Tamb = - 25 °C to + 85 °C, VCC1 = VCC2 = 2.7 V to 5.5 V ICC1 90 SD = Low, Ee = 1 klx*), Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V ICC1 75 Idle supply current @ Vlogic (receive mode, no signal) SD = Low, Ee = 1 klx*), Vlog, pin 7, no signal, no load @ Rxd Ilog 1 µA Average dynamic supply current, transmitting IIRED = 300 mA, 20 % Duty Cycle ICC 65 mA Standby supply current Standby supply current, Vlogic Typ. Max Unit 5.5 V 130 µA µA SD = High, T = 25 °C, Ee = 0 klx ISD 0.1 µA SD = High, T = 70 °C ISD 2 µA SD = High, T = 85 °C ISD 3 µA no signal, no load Ilog 1 µA - 30 + 85 °C Operating temperature range TA Output voltage low, Rxd CLoad = 15 pF VOL - 0.5 0.15 x Vlogic V Output voltage high, Rxd IOH = - 500 µA VOH 0.8 x Vlogic Vlogic + 0.5 V IOH = - 250 µA, CLoad = 15 pF VOH 0.9 x Vlogic Vlogic + 0.5 V 600 kΩ 0.5 V Rxd to VCC1 impedance Input voltage low (Txd, SD) Input voltage high (Txd, SD) CMOS level **) Input leakage current (Txd, SD) VIN = 0.9 x Vlogic Controlled pull down current SD, Txd = "0" to "1", VIN < 0.15 Vlogic SD, Txd = "0" to "1", VIN > 0.7 Vlogic Input capacitance (Txd, SD) *) RRxd 400 VIL - 0.5 500 VIH Vlogic - 0.5 6 V IICH -2 +2 µA + 150 µA 1 µA 5 pF IIRTx IIRTx CIN -1 0 Standard illuminant A **) To provide an improved immunity with increasing Vlogic the typical threshold level is increasing with Vlogic and set to 0.5 x Vlogic. It is recommended to use the specified min/max values to avoid increased operating current. Document Number 82614 Rev. 1.4, 26-Jan-04 www.vishay.com 5 TFDU4300 VISHAY Vishay Semiconductors Optoelectronic Characteristics Receiver Tested @ Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Test Conditions Symbol Minimum detection threshold irradiance, SIR Mode 9.6 kbit/s to 115.2 kbit/s λ = 850 nm - 900 nm α = 0 °, 15 ° Ee Maximum detection threshold irradiance λ = 850 nm - 900 nm Ee Receiver input irradiance for low λ = 850 nm - 900 nm tr, tf < 40 ns, signal suppression*) tpo = 1.6 µs @ f = 115 kHz, No Rxd signal no output signal allowed Ee Min Typ. Max Unit 40 (4) 80 (8) mW/m2 5 (500) (µW/cm2) kW/m2 (mW/cm2) 4 (0.4) mW/m2 (µW/cm2) Rise time of output signal 10 % to 90 %, CL = 15 pF tr(Rxd) 10 100 ns Fall time of output signal 90 % to 10 %, CL = 15 pF tf(Rxd) 10 100 ns tPW 1.65 3.0 µs input irradiance = 100 mW/m , ≤ 115.2 kbit/s 250 ns after shutdown active or power-on 150 µs 150**) µs Rxd pulse width of output signal input pulse length > 1.2 µs Stochastic jitter, leading edge Standby /Shutdown delay, receiver startup time Latency *) tL 100 Equivalent to IrDA Background Light and Electromagnetic Field Test: Fluorescent Lighting Immunity **) Compliment to IrDA® SIR www.vishay.com 6 2.0 2 Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Transmitter Tested @ Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter IRED operating current limitation Test Conditions No external resistor for current Symbol Min Typ. Max Unit ID 250 300 350 mA 1.8 1.9 V 1 µA limitation*) Forward voltage of built-in IRED If = 300 mA Vf 1.4 IIRED -1 α = 0 °, 15 ° Txd = High, SD = Low Ie 30 VCC1 = 5.0 V, α = 0 °, 15 ° Txd = Low or SD = High (Receiver is inactive as long as SD = High) Ie Output leakage IRED current Txd = 0 V, 0 < VCC1 < 5.5 V Output radiant intensity Output radiant intensity, angle of half intensity α Peak - emission wavelength**) λp Optical output pulse duration Optical overshoot mW/sr 0.04 mW/sr ± 24 880 ∆λ Spectral bandwidth ° 900 nm 45 tropt, tfopt 10 input pulse width 1.63 µs, 115.2 kbit/s topt 1.6 input pulse width tTxd < 20 µs topt input pulse width tTxd ≥ 20 µs topt Optical rise time, fall time 65 nm 100 ns 1.8 µs tTxd tTxd + 0.15 µs 20 300 µs 25 % 1.63 *) Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current reduction is intended to operate at the IrDA low power conditions. E.g. for VCC2 = 3.3 V a current limiting resistor of RS = 56 Ω will allow a power minimized operation at IrDA low power conditions. **) Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the standard Remote Control applications with codes as e.g. Phillips RC5/RC6® or RECS 80. Document Number 82614 Rev. 1.4, 26-Jan-04 www.vishay.com 7 TFDU4300 VISHAY Vishay Semiconductors Recommended Circuit Diagram Operated with a clean low impedance power supply the TFDU4300 needs no additional external components. However, depending on the entire system design and board layout, additional components may be required (see figure 1). V CC 2 R1 V CC1 R2 C1 GND IRED Anode V cc C2 Ground Vlogic Mode SD SD Txd Txd Rxd Rxd IRED Cathode 18096 Figure 1. Recommended Application Circuit In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not apply to follow the fast current rise time. In that case another 4.7 µF (type, see table under C1) at VCC2 will be helpful. Under extreme EMI conditions as placing an RFtransmitter antenna on top of the transceiver, we recommend to protect all inputs by a low-pass filter, as a minimum a 12 pF capacitor, especially at the Rxd port. The transceiver itself withstands EMI at GSM frequencies above 300 V/m. When interference is observed, it is picked up by the wiring to the inputs. It is verified by DPI (direct power injection) measurements that as long as the interfering RF - voltage is below the logic threshold levels of the inputs and equivalent levels at the outputs no interference is expected. Figure 2 and figure 3 show examples for circuit diagrams to work with low voltage logic and using the transceiver when VCC1 = Vlogic, just connecting the responsible pins to each other. Recommended Application Circuit The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is the current limiting resistor, which may be used to reduce the operating current to levels below the specified controlled values for saving battery power. Vishay’s transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (Txd, SD) and the output Rxd should be directly connected (DC - coupled) to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages VCC1 and injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins. An Tantalum capacitor should be used for C1 while a ceramic capacitor is used for C2. www.vishay.com 8 Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Block Diagram of Transceiver with a Separate Vlogic Power Supply (I/O voltage follows VDD voltage swing) VCC = 3.3 V VDD = 1.8 V IR Controller TFDU4300 Vdd Vcc2 IREDA(1) IREDC (2) IRTX TxD (3) IRRX RxD (4) SD (5) IRMODE R1 47Ω Vcc1 (6) Vlogic (7) GND C1 C2 C3 GND (8) C4 18454 Figure 2. VCC = 3.3 V Block Diagram of Transceiver with a Common Power Supply for VCC and V logic (I/O voltage follows VCC voltage swing) IR Controller TFDU4300 Vdd Vcc2 IREDA(1) IREDC (2) IRTX TxD (3) IRRX RxD (4) SD (5) IRMODE Vcc1 (6) R1 47Ω GND C1 C4 Vlogic (7) C3 C2 GND (8) 18455 Figure 3. One should keep in mind that basic RF - design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Winfield Hill, 1989, Cambridge University Press, ISBN: 0521370957. Table 1. Recommended Application Circuit Components Component Recommended Value C1, C3 4.7 µF, 16 V 293D 475X9 016B C2, C4 0.1 µF, Ceramic VJ 1206 Y 104 J XXMT R1 depends on current to be adjusted R2 47 Ω, 0.125 W I/O and Software In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the Document Number 82614 Rev. 1.4, 26-Jan-04 Vishay Part Number CRCW-1206-47R0-F-RT1 I/O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application. For operating at RS232 ports the ENDEC TOIM4232 is recommended. www.vishay.com 9 TFDU4300 VISHAY Vishay Semiconductors Truth table Inputs Outputs Remark SD Txd Optical input Irradiance mW/m2 Rxd Transmitter Operation high > 1 ms x x weakly pulled (500 kΩ) to VCC1 0 Shutdown low high x high inactive Ie Transmitting low high > 50 µs x high inactive 0 Protection is active low low <4 high inactive 0 Ignoring low signals below the IrDA defined threshold for noise immunity low low > Min. Detection Threshold Irradiance < Max. Detection Threshold Irradiance low (active) 0 Response to an IrDA compliant optical input signal low low > Max. Detection Threshold Irradiance undefined 0 Overload conditions can cause unexpected outputs Recommended Solder Profile 240 Ambient Temperature ( °C) 200 2°C - 4°C/s 180 160 140 120 120 s - 180 s 100 90 s max 80 60 2°C - 4°C/s 40 80 75 70 65 60 50 2.0 0 0 50 100 150 200 250 300 350 18097 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Operating Voltage [V] @ duty cycle 20% Time ( s ) Figure 4. Recommended Solder Profile www.vishay.com 10 85 55 20 14874 90 10 s max. @ 230°C 220 Temperature ( C ) ° Current Derating Diagram Figure 5. Temperature Derating Diagram Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Package Dimensions in mm 18100 Document Number 82614 Rev. 1.4, 26-Jan-04 www.vishay.com 11 TFDU4300 VISHAY Vishay Semiconductors Reel Dimensions W1 Reel Hub W2 Tape Width A max. N W1 min. W2 max. W3 min. mm mm mm mm mm mm mm 16 180 60 16.4 22.4 15.9 19.4 16 330 50 16.4 22.4 15.9 19.4 www.vishay.com 12 14017 W3 max. Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Tape Dimensions in mm 18306 Document Number 82614 Rev. 1.4, 26-Jan-04 www.vishay.com 13 TFDU4300 VISHAY Vishay Semiconductors 18307 www.vishay.com 14 Document Number 82614 Rev. 1.4, 26-Jan-04 TFDU4300 VISHAY Vishay Semiconductors Ozone Depleting Substances Policy Statement It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operatingsystems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423 Document Number 82614 Rev. 1.4, 26-Jan-04 www.vishay.com 15