TFDS4400 Vishay Semiconductors SIR Transceiver Module (115.2 kbit/s) 2.7 V to 5.5 V Description The TFDS4400 is a low–power infrared transceiver module compliant to the IrDA physical layer standard for infrared data communication, supporting IrDA speeds up to 115.2 kbit/s (SIR), HP-SIR, and carrier based remote control modes up to 100 kHz. Integrated within the transceiver module are a photo PIN diode, infrared emitter (IRED), and a low–power control IC to provide a total front–end solution in a single package. Vishay Semiconductors TFDS4400 transceiver represents a novel package option enabling a minimized package height over the PCB of only 1.8 mm and nevertheless offering a full 1m IrDA 1.2 transmission range. The transceiver is capable of directly interfacing with a wide variety of I/O chips which perform the modulation/demodulation function, including National Semiconductor’s PC87338, PC87108 and PC87109, SMC’s FDC37C669, FDC37N769 and CAM35C44, and Hitachi’s SH3. At a minimum, a current– limiting resistor in series with the infrared emitter and a VCC bypass capacitor are the only external components required to implement a complete solution. Features Compliant to the latest IrDA physical layer standard (Up to 115.2 kbit/s), HP–SIR, Sharp ASK and TV Remote Power Sleep Mode Through VCC1 (5 nA Sleep Current) For Sunk Mounting at the PCB Edge – 1.8 mm Height over Board High Efficiency Emitter Electrically identical to the TFDU4100 device Directly Interfaces with Various Super I/O and Controller Devices Operating 2.7 V to 5.5 V Applications Built–In EMI Protection – No External Shielding Necessary Low–Power Consumption 1.0 (1.3) mA Supply Current @ 3 V (5 V) Few External Components Required Applications Telecommunication Products (Cellular Phones, Pagers) Digital Still and Video Cameras Computers (Win CE, Palm PC), PDAs Medical and Industrial Data Collection External Infrared Adapters (Dongles) Package TFDS4400 Dracula Document Number 82524 Rev. A1.5, 31-May-00 www.vishay.com 1 (14) TFDS4400 Vishay Semiconductors Ordering Information Part Number TFDS4400–TR3 Qty / Reel 1000 pcs Description Functional Block Diagram VCC1/SD VCC2 Driver Amplifier Rxd Comparator R1 IRED Anode AGC Logic SC Txd IRED Cathode Open Collector Driver 14876 GND Figure 1. Functional Block Diagram Pin Description Pin Number 1 2 3 4 5 6 7 8 Function IRED Anode Description IRED Anode, should be externally connected to VCC2 through a current control resistor IRED Cathode IRED Cathode, internally connected to driver transistor Txd Transmit Data Input Rxd Received Data Output, open collector. No external pull–up or pull–down resistor is required (20 k resistor internal to device). Pin is inactive during transmission. NC Do not connect, reserved for future features VCC1 Supply Voltage SC Sensitivity control, increases sensitivity when active GND Ground 1 2 3 4 5 6 I/O Active I O HIGH LOW I HIGH 7 8 Figure 2. Pinning www.vishay.com 2 (14) Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors Absolute Maximum Ratings Reference point Pin GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Supply Su ly Voltage Range Input Currents Output Sink Current Power Dissipation Junction Temperature Ambient Temperature Range (Operating) Storage Temperature Range Soldering Temperature Average IRED Current Repetitive Pulsed IRED Current IRED Anode Voltage Transmitter Data Input Voltage Receiver Data Output Voltage Virtual Source Size Maximum Intensity for Class 1 Operation of IEC825–1 or EN60825–1 (worst case IrDA SIR pulse pattern *) *) Test Conditions 0 V ≤ VCC2 ≤ 6 V 0 V ≤ VCC1 ≤ 6 V For all Pins, except IRED Anode Pin See Derating Curve Symbol VCC1 VCC2 Min. – 0.5 – 0.5 Method: (1–1/e) encircled energy EN60825, 1997 Max. 6 6 10 Unit V V mA mA mW °C °C PD TJ Tamb –25 25 200 125 +85 Tstg –25 +85 °C 240 °C 100 500 mA mA See Recommended Solder Profile t < 90 µs, ton < 20% Typ. 215 IIRED (DC) IIRED (RP) VIREDA VTxd – 0.5 – 0.5 6 VCC1+0.5 V V VRxd – 0.5 VCC1+0.5 V d 2.5 2.8 mm 400 mW/sr Note: Transmitted data: continuously transmitted “0”. In normal data transfer operation “0” and “1” will be transmitted with the same probability. Therefore, for that case, about a factor of two of safety margin is included. However, for worst case thermal stress testing such data pattern are often used and for this case the 400 mW/sr value has to be taken. Document Number 82524 Rev. A1.5, 31-May-00 www.vishay.com 3 (14) TFDS4400 Vishay Semiconductors Electrical Characteristics Tamb = 25_C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Transceiver Supply Voltage Test Conditions / Pins Receive Mode Transmit Mode, R2 = 47 W (see Recommended Application Circuit) Supply Current Pin VCC1 VCC1 = 5.5 V (Receive Mode) VCC1 = 2.7 V Supply Current Pin VCC1 IIRED = 210 mA (avg) (Transmit Mode) (at IRED Anode Pin) VCC1 = 5.5 V VCC1 = 2.7 V Leakage Current of IR VCC1 = OFF, TXD = LOW, Emitter, IRED Anode Pin VCC2 = 6 V, T = 25 to 85°C Transceiver Power On Settling Time Symbol Min. VCC1 2.7 2.0 Typ. Max. Unit 5.5 5.5 V V ICC1 (Rx) 1.3 1.0 2.5 1.5 mA mA ICC1 (Tx) IL (IREDA) 5.0 3.5 0.005 5.5 4.5 0.5 mA mA µA TPON 50 µs Optoelectronic Characteristics Tamb = 25_C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Test Conditions Receiver Minimum Detection BER = 10–8 (IrDA Specification) Threshold Irradiance a = ±15°, SIR Mode, SC = LOW a = ±15°, SIR Mode, SC = HIGH Maximum Detection a = ±90°, SIR Mode, VCC1 = 5 V Threshold Irradiance a = ±90°, SIR Mode, VCC1 = 3 V Logic LOW Receiver SC = HIGH or LOW Input Irradiance Output Out ut Voltage – Active, C = 15 pF, R = 2.2 kW Rxd Non–active, C = 15 pF, R = 2.2 kW Output Current – VOL < 0.8 V Rxd Rise Time – Rxd C = 15 pF, R = 2.2 kW Fall Time – Rxd C = 15 pF, R = 2.2 kW Pulse Width – Rxd Input pulse width = 1.6 µs, Output 115.2 kbit/s Jitter, Leading Edge Over a Period of 10 bit, 115.2 kbit/s of Output Signal Latency www.vishay.com 4 (14) Symbol Ee Ee Ee Ee Ee Min. Typ. Max. Unit 6 3.3 8 20 10 5 15 35 15 mW/m 2 mW/m 2 kW/m 2 kW/m 2 mW/m 2 4 VOL VOH IOL 0.5 VCC1–0.5 tr (Rxd) tf (Rxd) tPW 20 20 1.41 V V mA 1400 200 8 ns ns µs 2 µs 500 µs 4 ti tL 0.8 100 Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors Optoelectronic Characteristics Tamb = 25_C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Transmitter IRED Operating Current Logic LOW Transmitter Input Voltage Logic HIGH Transmitter Input Voltage Output Radiant Intensity Test Conditions IRED Operating Current can be adjusted by Variation of R1. Current Limiting Resistor is in Series to IRED: R1 = 14 Ω, VCC2 = 5.0 V In Agreement with IEC825 Eye Safety Limit, if Current Limiting Resistor is in Series to IRED: R1 = 14 Ω, VCC2 = 5.0 V, α = ±15_ Txd Logic LOW Level Angle of Half Intensity Peak Wavelength of Emission Half–Width of Emission Spectrum Optical Rise Time, Fall Time Optical Overshoot Rising Edge Peak– Over a Period of 10 bits, to-Peak Jitter of Independent of Optical Output Pulse Information content Document Number 82524 Rev. A1.5, 31-May-00 Symbol Min. IIRED Typ. Max. Unit 0.2 0.28 A VIL (Txd) 0 0.8 V VIH (Txd) 2.4 VCC1+0.5 V Ie 45 200 mW/sr 0.04 mW/sr _ 900 nm Ie a lP 140 ±24 880 60 tropt, tfopt 200 nm 600 ns 25 0.2 % ms www.vishay.com 5 (14) TFDS4400 Vishay Semiconductors Recommended Circuit Diagram 440 Vcc = 5.25 V, max. efficiency, center, min. VF, min. VCEsat 400 360 320 Intensity (mW/sr) The only required components for designing an IrDA 1.2 compatible design using Vishay SIR transceivers are a current limiting resistor to the IRED. However, depending on the entire system design and board layout, additional components may be required (see figure KEIN MERKER). It is recommended that the capacitors C1 and C2 are positioned as near as possible to the transceiver power supply pins. A tantalum capacitor should be used for C1, while a ceramic capacitor should be used for C2 to suppress RF noise. Also, when connecting the described circuit to the power supply, low impedance wiring should be used. 480 280 240 200 160 VCC2 Vcc = 4.75 V, min. efficiency, 15° off axis, max. VF, max. VCEsat 120 R1 VCC1 80 IRED Cathode R2 Rxd IRED Anode 40 Txd 0 Rxd 6 TFDx4x00 C1 GND C2 VCC1/SD SC GND NC 10 12 14 16 Current Control Resistor ( W ) Figure 4. Ie vs. R1 760 720 680 640 600 560 520 480 440 400 360 320 280 240 200 160 120 80 40 0 SC Txd Note: outlined components are optional depending on the quality of the power supply Intensity (mW/sr) Figure 3. Recommended Application Circuit R1 is used for controlling the current through the IR emitter. For increasing the output power of the IRED, the value of the resistor should be reduced. Similarly, to reduce the output power of the IRED, the value of the resistor should be increased. For typical values of R1 (see figures 4 and 5), e.g. for IrDA compliant operation (VCC2 = 5 V ± 5%), a current control resistor of 14 Ω is recommended. The upper drive current limitation is dependent on the duty cycle and is given by the absolute maximum ratings on the data sheet and the eye safety limitations given by IEC825–1. R2, C1 and C2 are optional and dependent on the quality of the supply voltage VCC1 and injected noise. An unstable power supply with dropping voltage during transmission may reduce sensitivity (and transmission range) of the transceiver. 8 14377 Vcc=3.3V, max. intensity on axis, min. VF, min. VCEsat Vcc=2.7V, min. intensity 15° off axis, max. VF, max. VCEsat 0 14378 1 2 3 4 5 6 7 8 Serial Resistor ( W ) Figure 5. Ie vs. R1 Table 1. Recommended Application Circuit Components Component Recommended Value C1 4.7 mF, Tantalum C2 0.1 µF, Ceramic R1 14 Ω, 0.25 W (recommended using two 7 Ω, 0.125 W resistors in series) R2 47 Ω , 0.125 W www.vishay.com 6 (14) Vishay Part Number 293D 475X9 016B 2T VJ 1206 Y 104 J XXMT CRCW–1206–6R98–F–RT1 CRCW–1206–47R0–F–RT1 Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors The sensitivity control (SC) pin allows the minimum detection irradiance threshold of the transceiver to be lowered when set to a logic HIGH. Lowering the irradiance threshold increases the sensitivity to infrared signals and increases transmission range up to 3 meters. However, setting the Pin SC to logic HIGH also makes the transceiver more susceptable to transmission errors due to an increased sensitivity to fluorescent light disturbances. It is recommended to set the Pin SC to logic LOW or left open if the increased range is not required or if the system will be operating in bright ambient light. The guide pins on the side-view and top-view packages are internally connected to ground but should not be connected to the system ground to avoid ground loops. They should be used for mechanical purposes only and should be left floating. interface circuit is designed for this shutdown feature. The VCC_SD, S0 or S1 outputs on the TOIM3232 can be used to power the transceiver with the necessary supply current. If the microcontroller or the microprocessor is unable to drive the supply current required by the transceiver, a low–cost SOT23 pnp transistor can be used to switch voltage on and off from the regulated power supply (see figure 7). The additional component cost is minimal and saves the system designer additional power supply costs. As external filter, only a capacitor is recommended. IIRED Power Supply + – Regulated Power Supply 50 mA R1 IRED Anode Shutdown Microcontroller or Microprocessor 20 mA The internal switch for the IRED in Vishay SIR transceivers is designed to be operated like an open collector driver. Thus, the Vcc2 source can be an unregulated power supply while only a well regulated power source with a supply current of 1.3 mA connected to VCC1/SD is needed to provide power to the remainder of the transceiver circuitry in receive mode. In transmit mode, this current is slightly higher (approximately 4 mA average at 3 V supply current) and the voltage is not required to be kept as stable as in receive mode. A voltage drop of VCC1 is acceptable down to about 2.0 V when buffering the voltage directly from the Pin VCC1 to GND see figure 3. This configuration minimizes the influence of high current surges from the IRED on the internal analog control circuitry of the transceiver and the application circuit. Also board space and cost savings can be achieved by eliminating the additional linear regulator normally needed for the IRED’s high current requirements. The transceiver can be very efficiently shutdown by keeping the IRED connected to the power supply VCC2 but switching off VCC1/SD. The power source to VCC1/SD can be provided directly from a microcontroller (see figure 6). In shutdown, current loss is realized only as leakage current through the current limiting resistor to the IRED (typically 5 nA). The settling time after switching VCC1/SD on again is approximately 50 ms. Vishay TOIM3232 Document Number 82524 Rev. A1.5, 31-May-00 IS VCC1/SD TFDU4100 (Note: Typical Values Listed) Receive Mode @ 5 V: IIRED = 210 mA, IS = 1.3 mA @ 2.7 V: IIRED = 210 mA, IS = 1.0 mA Transmit Mode @ 5 V: IIRED = 210 mA, IS = 5 mA (Avg.) @ 2.7 V: IIRED = 210 mA, IS = 3.5 mA (Avg.) 14878 Figure 6. IIRED Power Supply + – Regulated Power Supply 50 mA R1 IRED Anode Microcontroller or Microprocessor 20 mA IS VCC1/SD TFDU4100 (Note: Typical Values Listed) Receive Mode @ 5 V: IIRED = 210 mA, IS = 1.3 mA @ 2.7 V: IIRED = 210 mA, IS = 1.0 mA Transmit Mode @ 5 V: IIRED = 210 mA, IS = 5 mA (Avg.) @ 2.7 V: IIRED = 210 mA, IS = 3.5 mA (Avg.) 14879 Figure 7. www.vishay.com 7 (14) TFDS4400 Vishay Semiconductors Recommended SMD Pad Layout The leads of the device should be soldered in the center position of the pads. Figure 8. TFDS4400 (Dracula) Note: Leads of the device should be at least 0.3 mm within the ends of the pads. Recommended Solder Profile. Recommended Solder Profile 10 s max. @ 230°C 210 2 - 4°C/s 180 150 120 120 - 180 s 90 s max. 90 60 2 - 4°C/s 30 Peak Operating Current ( mA ) 600 240 Temperature (° C ) Current Derating Diagram 0 0 14874 50 100 150 200 250 Time ( s ) 300 www.vishay.com 8 (14) 400 300 200 Current derating as a function of the maximum forward current of IRED. Maximum duty cycle: 25%. 100 0 –40 –20 0 350 Figure 9. Recommended Solder Profile 500 14880 20 40 60 80 100 120 140 Temperature ( 5C ) Figure 10. Current Derating Diagram Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors TFDS4400 Package (Mechanical Dimensions) 15971 Document Number 82524 Rev. A1.5, 31-May-00 www.vishay.com 9 (14) TFDS4400 Vishay Semiconductors Shape of Reel and Dimensions W1 Reel Hub W2 Version C Tape Width 24 A 330 ± 1 N 100 + 1.5 14017 W1 24.4 + 2 W2 max 30.4 Tape Dimensions 15182 www.vishay.com 10 (14) Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors Leader and Trailer Trailer Leader no devices devices no devices End Start min. 200 min. 400 96 11818 Figure 11. Leader and trailer Cover Tape Peel Strength Label According to IEC 286 0.1 N to 1.3 N 300 ± 10% mm/min 165° – 180° peel angle Standard bar code labels for finished goods The standard bar code labels are product labels and used for identification of goods.The finished goods are packed in final packing area. The standard packing units are labeled with standard bar code labels before transported as finished goods to warehouses. The labels are on each packing unit and contain Vishay Semiconductor GmbH specific data. Vishay Semiconductor GmbH standard bar code product label (finished goods) Plain Writing Item-Description Item-Number Selection-Code LOT-/ Serial-Number Data-Code Plant-Code Quantity Accepted by: Packed by: Mixed Code Indicator Origin Abbreviation – INO SEL BATCH COD PTC QTY ACC PCK MIXED CODE xxxxxxx+ Length 18 8 3 10 3 (YWW) 2 8 – – – Company logo Long Bar Code Top Item-Number Plant-Code Sequence-Number Quantity Total Length Type N N X N – Length 8 2 3 8 21 Short Bar Code Bottom Selection-Code Date-Code Batch-Number Filler Total Length Type X N X – – Length 3 3 10 1 17 Document Number 82524 Rev. A1.5, 31-May-00 www.vishay.com 11 (14) TFDS4400 Vishay Semiconductors Dry Packing The reel is packed in an anti–humidity bag to protect the devices from absorbing moisture during transportation and storage. Aluminium bag Label Reel 15973 Final Packing The sealed reel is packed into a cardboard box, which is 345 345 40 mm in size. A secondary cardboard box is used for shipping purposes, with the following size contents: (Length 390 390 Size Width 390 390 Heights) Quantity of boxes (345 345 40 mm) 250 mm 250 mm 1 6 Recommended Method of Storage Dry box storage is recommended as soon as the aluminium bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available: Example of JESD22–A112 Level 4 label ESD Precaution Proper storage and handling procedures should be followed to prevent ESD damage to the devices especially when they are removed from the Antistatic Shielding Bag. Electro–Static Sensitive Devices warning labels are on the packaging. Vishay Semiconductors Standard Bar-Code Labels The Vishay Semiconductors standard bar-code labels are printed at final packing areas. The labels are on each packing unit and contain Vishay Semiconductors specific data. Storage temperature 10°C to 30°C Storage humidity ≤ 60% RH max. After more than 72 hours under these conditions moisture content will be too high for reflow soldering. In case of moisture absorption, the devices will recover to the former condition by drying under the following condition: 192 hours at 40°C +5°C/ –0°C and <5% RH (dry air/ nitrogen) or 96 hours at 60°C +5°C and <5% RH for all device containers or 24 hours at 125°C +5°C not suitable for reel or tubes. An EIA JEDEC Standard JESD22–A112 Level 4 label is included on all aluminium bags www.vishay.com 12 (14) Document Number 82524 Rev. A1.5, 31-May-00 TFDS4400 Vishay Semiconductors Revision History: A1.2, 06/05/1999: First released edition A1.4, 18/08/1999: p1:Description and applications corr., p2: pinning added A1.5, 31/05/2000 Packing and storage information added Document Number 82524 Rev. A1.5, 31-May-00 www.vishay.com 13 (14) TFDS4400 Vishay Semiconductors Ozone Depleting Substances Policy Statement It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 )7131 67 2831, Fax number: 49 ( 0 )7131 67 2423 www.vishay.com 14 (14) Document Number 82524 Rev. A1.5, 31-May-00