PHILIPS 74ABT574AD

INTEGRATED CIRCUITS
74ABT574A
Octal D-type flip-flop (3-State)
Product specification
IC23 Data Handbook
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
FEATURES
DESCRIPTION
• 74ABT574A is flow-through pinout version of 74ABT374
• Inputs and outputs on opposite side of package allow easy
The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
interface to microprocessors
The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
• 3-State outputs for bus interfacing
• Power-up 3-State
• Power-up reset
• Common output enable
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
and 200 V per Machine Model
• Live insertion/extraction permitted.
QUICK REFERENCE DATA
SYMBOL
CONDITIONS
Tamb = 25°C; GND = 0V
PARAMETER
TYPICAL
UNIT
3.0
3.4
ns
tPLH
tPHL
Propagation delay
CP to Qn
CL = 50pF; VCC = 5V
CIN
Input capacitance
VI = 0V or VCC
3
pF
COUT
Output capacitance
Outputs disabled; VO = 0V or VCC
6
pF
ICCZ
Total supply current
Outputs disabled; VCC =5.5V
100
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
–40°C to +85°C
74ABT574A N
74ABT574A N
SOT146-1
20-Pin plastic SO
–40°C to +85°C
74ABT574A D
74ABT574A D
SOT163-1
20-Pin Plastic SSOP Type II
–40°C to +85°C
74ABT574A DB
74ABT574A DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40°C to +85°C
74ABT574A PW
7ABT574APW DH
SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
1
OE
2, 3, 4, 5,
6, 7, 8, 9
D0-D7
Data inputs
19, 18, 17,
16, 15, 14,
13, 12
Q0-Q7
Data outputs
FUNCTION
OE
1
20 VCC
D0
2
19 Q0
D1
3
18 Q1
D2
4
17 Q2
D3
5
16 Q3
D4
6
15 Q4
D5
7
14 Q5
11
CP
GND
Ground (0V)
VCC
Positive supply voltage
D6
8
13 Q6
10
D7
9
12 Q7
20
GND
10
11
Output enable input (active-Low)
Clock pulse input (active rising edge)
CP
SA00103
1995 May 22
2
853-1509 15261
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
LOGIC SYMBOL
FUNCTION TABLE
INPUTS
2
3
4
5
6
7
8
9
D0
D1
D2
D3
D4
D5
D6
D7
11
CP
1
OE
18
17
16
15
14
13
Dn
L
L
↑
↑
l
h
L
H
L
H
L
↑
X
NC
NC
OPERATING
MODE
Q0 – Q7
Load and read
register
Hold
H
↑
X
NC
Z
Disable outputs
↑
H
Dn
Dn
Z
H = High voltage level
h = High voltage level one set-up time prior to the Low–to–High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low–to–High
clock transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↑ = Low-to-High clock transition
↑ = not a Low-to-High clock transition
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
19
CP
INTERNAL
REGISTER
OUTPUTS
OE
12
SA00104
LOGIC SYMBOL (IEEE/IEC)
1
EN
11
C1
2
2D
1
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
SA00105
LOGIC DIAGRAM
D1
D0
2
D2
3
D3
4
D4
5
D5
6
D6
7
D7
8
9
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
11
CP
1
OE
19
Q0
18
Q1
17
16
Q2
Q3
15
Q4
14
Q5
13
Q6
12
Q7
SA00106
1995 May 22
3
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
VCC
IIK
PARAMETER
CONDITIONS
RATING
UNIT
–0.5 to +7.0
V
–18
mA
–1.2 to +7.0
V
VO < 0
–50
mA
output in Off or High state
–0.5 to +5.5
V
output in Low state
128
mA
–65 to 150
°C
DC supply voltage
DC input diode current
VI < 0
voltage3
VI
DC input
IOK
DC output diode current
voltage3
VOUT
DC output
IOUT
DC output current
Tstg
Storage temperature range
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
VCC
PARAMETER
UNIT
DC supply voltage
Min
Max
4.5
5.5
V
0
VCC
V
VI
Input voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
V
IOH
High-level output current
–32
mA
IOL
Low-level output current
64
mA
0
5
ns/V
–40
+85
°C
∆t/∆v
Input transition rise or fall rate
Tamb
Operating free-air temperature range
1995 May 22
2.0
4
V
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Min
VIK
VOH
Input clamp voltage
High-level output voltage
Tamb = –40°C
to +85°C
Tamb = +25°C
VCC = 4.5V; IIK = –18mA
Typ
Max
–0.9
–1.2
Min
UNIT
Max
–1.2
V
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH
2.5
2.9
2.5
V
VCC = 5.0V; IOH = –3mA; VI = VIL or VIH
3.0
3.4
3.0
V
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH
2.0
2.4
2.0
V
VOL
Low-level output voltage
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH
0.42
0.55
0.55
V
VRST
Power-up output low
voltage3
VCC = 5.5V; IO = 1mA; VI = GND or VCC
0.13
0.55
0.55
V
II
Input leakage current
VCC = 5.5V; VI = GND or 5.5V
±0.01
±1.0
±1.0
µA
Power-off leakage current
VCC = 0.0V; VO or VI ≤ 4.5V
±5.0
±100
±100
µA
Power-up/down 3-State
output current4
VCC = 2.0V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care
±5.0
±50
±50
µA
IOZH
3-State output High current
VCC = 5.5V; VO = 2.7V; VI = VIL or VIH
5.0
50
50
µA
IOZL
3-State output Low current
VCC = 5.5V; VO = 0.5V; VI = VIL or VIH
–5.0
–50
–50
µA
ICEX
Output High leakage current
VCC = 5.5V; VO = 5.5V; VI = GND or VCC
5.0
50
50
µA
–180
mA
IOFF
IPU/IPD
IO
Output
current1
ICCH
ICCL
Quiescent supply current
ICCZ
∆ICC
Additional supply current per
input pin2
VCC = 5.5V; VO = 2.5V
–40
–180
–40
VCC = 5.5V; Outputs High, VI = GND or VCC
100
250
250
µA
VCC = 5.5V; Outputs Low, VI = GND or VCC
24
30
30
mA
VCC = 5.5V; Outputs 3-State;
VI = GND or VCC
100
250
250
µA
VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10 msec. From VCC = 2.1V to VCC = 5V 10% a
transition time of up to 100 µsec is permitted.
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
+25oC
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
Tamb =
VCC = +5.0V
WAVEFORM
Min
Typ
fMAX
Maximum clock frequency
1
150
400
tPLH
tPHL
Propagation delay
CP to Qn
1
1.5
2.0
3.0
3.4
4.4
4.7
1.5
2.0
5.0
5.1
ns
tPZH
tPZL
Output enable time
to High and Low level
3
4
1.0
2.5
2.9
3.8
4.1
5.2
1.0
2.5
5.0
5.7
ns
tPHZ
tPLZ
Output disable time
from High and Low level
3
4
1.8
1.4
3.1
2.6
4.3
3.8
1.8
1.4
5.0
4.0
ns
1995 May 22
5
Min
Min
UNIT
Max
150
ns
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
+25oC
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
Tamb =
VCC = +5.0V
WAVEFORM
UNIT
Min
Typ
Min
2
1.0
1.0
0.6
0.2
1.0
1.0
ns
Hold time, High or Low
Dn to CP
2
1.0
1.0
–0.7
–0.4
1.0
1.0
ns
CP pulse width
High or Low
1
2.0
2.0
0.7
0.8
2.0
2.0
ns
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
th(H)
th(L)
tw(H)
tw(L)
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX
CP
VM
VM
tw(H)
tPHL
OE
VM
VM
tPZH
tw(L)
tPHZ
VOH
tPLH
Qn
Qn
VM
VM
VOH –0.3V
VM
VM
0V
SA00056
SA00108
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
VM
Dn
VM
ts(H)
VM
th(H)
VM
ts(L)
OE
VM
VM
th(L)
tPZL
tPLZ
CP
VM
VM
Qn
VM
VOL +0.3V
VOL
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00107
SA00109
Waveform 2. Data Setup and Hold Times
1995 May 22
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
6
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
TEST CIRCUIT AND WAVEFORM
VCC
7.0V
PULSE
GENERATOR
VIN
tW
90%
VOUT
VM
NEGATIVE
PULSE
CL
10%
0V
RL
tTHL (tF)
tTLH (tR)
tTLH (tR)
tTHL (tF)
90%
POSITIVE
PULSE
Test Circuit for 3-State Outputs
AMP (V)
90%
VM
VM
10%
10%
tW
SWITCH POSITION
TEST
SWITCH
tPLZ
closed
tPZL
closed
All other
open
AMP (V)
VM
10%
RL
D.U.T.
RT
90%
0V
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
DEFINITIONS
FAMILY
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
74ABT
Amplitude
Rep. Rate
tW
tR
tF
3.0V
1MHz
500ns
2.5ns
2.5ns
SA00012
1995 May 22
7
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DIP20: plastic dual in-line package; 20 leads (300 mil)
SO20: plastic small outline package; 20 leads; body width 7.5 mm
1995 May 22
8
SOT146-1
SOT163-1
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
1995 May 22
9
SOT339-1
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
1995 May 22
10
SOT360-1
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
 Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.