here

Datasheet
Switching Regulators (Integrated FET)
3.3V and 5V output
Low Iq DC/DC Converters
BD99010EFV-M
BD99011EFV-M
Key Specifications
General Description
The BD99010EFV-M and BD99011EFV-M are ultra low Iq
Step-down DC/DC converters with integrated power
MOSFETs for 3.3V and 5V, respectively.
The SLLMTM (Simple Light Load Mode) control ensures
an ultra low quiescent current and high efficiency at low
load situation as well as a high efficiency at high load
situations while maintaining a regulated output voltage.
The product is compliant with automotive standards and
accommodates a maximum voltage of 42V. The minimum
input voltage is 3.6 V in order to sustain output at cold
cranking conditions. The current mode regulation loop
gives a fast transient response and easy phase
compensation.
The BD99010EFV-M and BD99011EFV-M are available
in a HTSSOP-B24 package. In an application it requires a
small number of external components and small PCB
footprint.
 Input Voltage Range:







3.6V to 35V
(Absolute Maximum42V)
(Initial startup is over 3.9V)
Output Voltage Range:
3.3V (BD99010EFV-M)
5V (BD99011EFV-M)
Switch Output Current:
2A(Max)
Switching Frequency:
200kHz to 500kHz
Pch FET ON Resistance:
170mΩ(Typ)
Nch FET ON Resistance:
130mΩ(Typ)
Operating Temperature Range:
-40°C to +105°C
AEC-Q100 Qualified
Package
HTSSOP-B24
W(Typ) x D(Typ) x H(Max)
7.80mm x 7.600mm x 1.00mm
Features
Low Quiescent Operating Current: 22μA
Simple Light Load Mode (SLLM)
Supports Cold Cranking Down to 3.6V
Output Voltage Accuracy: ±2%
Synchronous Rectifier
Soft Start
Chip Enable pin compatible with CMOS logic and
battery voltages
 Forced PMW Mode Function
 Current Mode Control with External Compensation
Circuit
 Over Current Protection, Short Circuit Protection,
Over Voltage Protection for VOUT, Under Voltage
Lock Out for VIN and Thermal Protection Circuits







Applications
 Automotive Battery Powered Supplies(Cluster Panel,
Car Multimedia)
 Industrial/Consumer Supplies.
Typical Application Circuit
Figure1. Reference application circuit
○Product structure：Silicon monolithic integrated circuit
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Datasheet
BD99010EFV-M, BD99011EFV-M
Pin Configuration
<TOP VIEW>
N.C.
1
24
PGND
PVIN
2
23
PGND
PVIN
3
22
PGND
N.C.
4
21
N.C.
VIN
5
20
SW
N.C.
6
19
SW
VREGB
7
18
N.C.
N.C.
8
17
REG _ L
RT
9
16
VOUT
COMP
10
15
EN
GND
11
14
N.C.
REG
12
13
FPWM
Figure 2. Pin configuration
Pin Description
Pin No.
Pin Name
1
N.C.
2
Function
Pin No.
Pin Name
No connection
13
FPWM
PVIN
Power input supply pin
14
N.C.
3
PVIN
Power input supply pin
15
EN
4
N.C.
No connection
16
VOUT
Output pin
5
VIN
Input supply pin
17
REG_L
Internal logic supply pin
6
N.C.
No connection
18
N.C.
No connection
7
VREGB
FET driver drive power supply pin
19
SW
Switching output pin
8
N.C.
No connection
20
SW
Switching output pin
9
RT
Switching frequency setting pin
21
N.C.
No connection
10
COMP
Error amplifier output pin
22
PGND
Power GND pin
11
GND
GND pin
23
PGND
Power GND pin
12
REG
Internal regulator output pin
24
PGND
Power GND pin
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Function
Forced PWM mode pin
No connection
Enable pin, active high
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07.Jul.2014 Rev.003
Datasheet
BD99010EFV-M, BD99011EFV-M
Block Diagram
RT
VIN
4.5V
VREF
1.2V
REG
REG
OSC
EN
For logic supply
REG_L
For L-side FET driver
1.2V
FPWM
FPWM
UVLO
IBIAS
TSD
0.8V
SCP
counter
SCP
VOUT
1.2V
Release
after 1024clk
PVIN
SLLM
Logic
OVP
DRV
LOGIC
ERR
SW
LVS
S
1.2V
LVIN
Detect Vin under 6V
R
VREGB
SLOPE
PWM
OVP
UVLO
TSD
COMP
OCP
Soft
Start
Current
Sense
GND
PGND
Figure 3. Block diagram
Description of Blocks
(1)
Internal regulator voltage (REG)
This block generates the 4.5V supply of the internal circuitry. This function requires an external buffer capacitor
connected to the REG pin. Also the supply voltage has to be connected to the logic supply via the REG_L pin. A
ceramic capacitor with of 1μF or more or with low ESR with short leads to the REG, REG_L pin and ground is
recommended.
(2)
Enable
By setting EN below 0.8V, the device can be set in stand-by mode. When the stand-by mode is activated, almost
all internal circuits are switched off to reduce the current consumption from the power supply to 1μA (25°C, typ.).
Because the EN pin is not pulled-down internally, in order to set the device in standby the EN pin has to be
connected to GND or supplied with the voltage below 0.8V. Moreover, EN sink current is below 0.1μA for
voltages to approximately 14V.
(3)
FPWM
By setting FPWM pin more than 2.0V, the device switches to forced PWM mode and operates as normal
synchronous type DC/DC converter ie. no pulse skipping at low load conditions. With FPWM is disabled, the
quiescent current is very low but the step response is slow for large load step. With FPWM is enabled, the
quiescent current is larger but the step response is fast for large load step. Note that when the mode is changing
from SLLM to FPWM mode there will be an undershoot / over shoot. See Figure 27 on page 13 and Figure 31 on
page 14.
(4)
Soft start
This block provides a function to prevent the overshoot of the output voltage: VOUT and/or large inrush currents
by controlling the error amplifier input voltage and increasing switching pulse width gradually at start up. The soft
start time is set to 6ms (typ.). At low output load conditions with FPWM is enabled, the soft start generates
some noise on the output voltage during sweep up to about 2 volts. This phenomenon can be avoided by adding
a small series resistance in the output buffer capacitor.
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Datasheet
BD99010EFV-M, BD99011EFV-M
(5)
Error amplifier
The error amplifier compares the output feedback voltage to the 1.2V internal reference voltage and outputs the
difference as current to the COMP pin, which voltage is used to determine the switching duty cycle. A t initial
startup when the soft start works, the COMP voltage is limited to the soft start voltage. Moreover, the external
resistor and capacitor are required to COMP pin as phase compensation circuit.
(6)
PWM modulator.
The PWM modulator converts the voltage at the COMP terminal to a continuous variable duty cycle that controls
the output power transistors. At very low input voltages the duty cycle can become 1 indicating the high-side
power transistor continuously in on-state. At very high input voltages the duty cycle becomes very small but
limited at an on-time of about 200ns. It should be noted that at high oscillation frequency settings this could lead
to random pulse skipping. For instance at 500 kHz the duty cycle is limited to values larger than 200ns / 2µs =
10%. This means that for 3.3V output the input voltage is limited to 33 V when avoiding random pulse skips. In
case, a higher input voltage is required the switching frequency has to be chosen lower.
(7)
Oscillator
The oscillation frequency is determined by the current going through the external resistor RT at constant voltage
of ca. 0.3V. The frequency can be set in the range between 200kHz to 500kHz. It should be noted that the
frequency increases ca. 10% when the input voltage VIN is lower than 4.5 V because in that condition the
internal supply voltage VREG is also lowered.
(8)
VREGB pin and Low input voltage detection (LVIN)
VREGB is the supply voltage of the high-side driver and output power transistor. VREGB voltage is referenced
from PVIN at voltage with 7.2V (typ.). When VIN voltage becomes below 6V (typ.), the LVIN circuit is activated
and VREGB is shorted to GND. By doing so the output power transistor is driven with the full supply voltage at
cold cranking conditions.
An external capacitor is required between PVIN and VREGB pin. A ceramic capacitor with 0.1μF or low ESR type
is recommended.
(9)
Overcurrent protection (OCP)
The overcurrent protection is activated when the SW current exceeds 3.3A (typ.). Once activated the ON duty
cycle will be limited and the output voltage lowered.
(10) Short circuit protection (SCP) and SCP counter
The short circuit protection is activated after the output voltage (FB voltage) drops below 67% of the nominal
voltage level and the overcurrent protection is activated (except during startup). This indicated an output short
and the short circuit protection will be activated.
When the short circuit protection is activated, for a period of 1024 cycles of oscillation frequency, switching will
be terminated by turning off the output transistors and the SS and COMP pins discharged. After this time out
period the switching will resume including soft start.
(11) Under voltage lockout circuit (UVLO)
If the VIN drops below 3.4V (typ.) the UVLO is activated and the BD99010 and BD99011 is turned off.
(12) Thermal shutdown (TSD)
If the chip temperature (Tj) reaches or exceeds ca. 175°C (typ.) the output is turned off. Switching will resume
with soft start when the temperature drops below ca. 150 °C (typ.)
(13) Over voltage protection(OVP)
The BD9901x is equipped with an integrated over voltage protection (OVP) for output voltages exceeding 10%
above nominal output voltage. The OVP terminates switching until the output voltage drops below nominal value
again before resuming normal operation. The OVP is intended as a last-resort protection mechanism and should
never trigger in well-designed applications. Essentially there are two main root causes for an OVP event in a
practical application:


Extremely fast and extreme input voltage variations, for instance a supply voltage step from a few volts to a
maximum of 36V in a few micro seconds. Normally, an appropriate input filter should prevent this from
occurring.
Extreme load current variations from maximum current to zero in very short time, for instance caused by a
mechanical fuse or relay to trip.
Also it should be noted that when the output load is zero for a longer time while the ambient temperature is
extremely high (above 105ºC) a small leakage current through the high-side switch inside the BD9901x can
cause the output voltage to be higher than the OVP level. In case this might happen in the application under
extraordinary conditions, it is advised to bleed a small output current exceeding this leakage. Naturally, this
current increases the ultra-low quiescent current of 22 µA of a typical BD9901x application.
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Datasheet
BD99010EFV-M, BD99011EFV-M
Operation
The BD99010EFV-M and BD99011EFV-M are a synchronous rectifying step-down switching regulator with fast transient
response by the current mode PWM control system. These operate as PWM (Pulse Width Modulation) mode for heavy
load, and it operates as SLLM (Simple Light Load Mode) operation for the light load to improve efficiency. When FPWM is
enabled, the SLLM is disabled and these devices operate only the current mode PWM control.
(1) Synchronous rectifier
The application does not require an external Schottky diode as commonly used in conventional DC/DC converter IC’s. The
low-side power transistor provides two advantages: it reduces the switching losses by careful on-chip timing to prevent
shoot-through and improves the leakage current (resulting in large quiescent current) at high operating temperatures.
(2) Current mode PWM control
Synthesizes an additional PWM control signal, representing the inductor current next to the conventional PWM control signal,
representing the output voltage of the converter. The current feedback loop is essential to achieve regulation loop stability
under all load conditions at so-called continuous condition Buck conversion.
(a) PWM (Pulse Width Modulation) control
The PWM circuit operates as follows: At the start of every switch cycle the oscillator sets the flip-flop that controls the
power transistors. This flip-flop is reset again when the slope signal (representing the inductor current) is exceeding the
COMP signal (representing the difference between output voltage and internal reference).
(b) SLLM (Simple Light Load Mode) control
For small output currents, this device automatically switches to SLLM. In SLLM, the device operates in PWM control by
comparing the output voltage with an internal reference voltage. When the output voltages drops below the reference
voltage the output makes several switching pulses in order to raise the output voltage above reference level again. Next,
switching pulses are skipped because the SW output is off. Depending on the output load, the controller now waits at very
low current consumption until the output voltage is lower than the reference voltage to resume switching. When the time in
between the switching pulse skip becomes short the device exits the SLLM mode and resumes normal continuous
switching again. The load level of the switching pulse skip is changed by the input voltage and inductor value.
Figure 4. Diagram of current mode PWM control
Figure 5. PWM switching timing chart
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Figure 6. SLLM switching timing chart
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Datasheet
BD99010EFV-M, BD99011EFV-M
Below the SW and VOUT waveforms during SLLM and PWM are shown.
Figure 7. SW and VOUT waveforms at SLLM
(Light load)
Figure 8. SW and VOUT waveforms at PWM
(Heavy load)
Recommended specification for SLLM
The figure below shows the relation between the input / output currents and output ripple voltage at SLLM.
SLLM at light load is different from regular PWM and has an increased output ripple voltage. During SLLM, the
transient response for heavy loads is also slower. A recommendation is shown below on how to minimize the output
ripple voltage and load changes at each of the control modes.
Figure 9. Ripple voltage and load response at SLLM
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Datasheet
BD99010EFV-M, BD99011EFV-M
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
PVIN,VIN
-0.3 to 42 (1)
V
SW Pin Voltage
VSW
-1.0 to VIN+0.6V
V
VREGB
-0.3 to PVIN-6.8V
V
PVIN - VREGB
-0.3 to 15
V
VEN
-0.3 to VIN+0.6V
V
-0.3 to 7
V
VREGB Pin
PVIN-VREGB Voltage
EN Pin
RT, COMP, REG, FPWM, REG_L
VOUT Pin Voltage
VRT, VCOMP, VREG, VREG_L,
VFPWM , VVOUT
Power Dissipation
Pd
4.00 (2)
W
Storage Temperature Range
Tstg
-55 to +150
°C
Maximum Junction Temperature
Tjmax
150
°C
(1)
(2)
Do not however exceed Pd.
Pd derated at 32mW/°C for temperature above Ta=25°C, Mounted on a four layer PCB 70mm×70mm×1.6mm with same size copper area.
Recommended Operating Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VIN
3.6(3) to 35
V
Output Switch Current
ISW
0 to 2(4)
A
Oscillator Frequency
FOSC
200k to 500k
Hz
Operating Temperature Range
Topr
-40 to +105
°C
(3)
(4)
Initial startup is over 3.9V.
Do not however exceed Pd.
Electrical Characteristics (Unless specified, Ta=-40 to +105°C, VIN=13.2V)
Parameter
Symbol
Limit
Min.
Typ.
Max.
Unit
Conditions
Shut down Current
ISTB
-
1
10
A
Quiescent Current1
IQ1
-
22
35
A
Quiescent Current2
IQ2
-
22
50
A
Circuit Current
ICC
-
1.5
3.0
mA
REG Voltage
VREG
4.2
4.5
4.6
V
VIN = 5 to 42V
VREGB Voltage
VREGB
V
VREGB=-100μA
VIN Sweep down
Under Voltage Lock Out
Threshold
Under Voltage Lock Out
Hysteresis
PVIN -6.8 PVIN -7.2 PVIN -7.6
VUVLO-TH1
3.30
3.40
3.60
V
VUVLO-HYS
80
180
280
mV
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VEN =low, Ta=25°C
IOUT=0A, Ta=25°C, VEN =high,
VFPWM = low (mode: SLLM)
IOUT=0A, Ta=-40 to 105°C,
VEN =high,
VFPWM = low (mode: SLLM)
VEN = high, VFPWM = high,
RT=75kΩ, VVOUT = 0V,
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07.Jul.2014 Rev.003
Datasheet
BD99010EFV-M, BD99011EFV-M
Electrical Characteristics (Unless specified, Ta=-40 to +105°C, VIN=13.2V)
3.23
3.30
3.37
V
3.17 (5)
3.30 (5)
3.43 (5)
V
3.1
3.30
-
V
4.90
5.00
5.10
V
4.80 (5)
5.00 (5)
5.20 (5)
V
4.5
4.73
-
V
RONH
-
170
340
mΩ
RONH_LV
-
265
500
mΩ
Low Side FET ON resistance
RONL
-
130
260
mΩ
SW Leakage Current
IOLEAK
-
-
10
A
DC Output Current Limit
IOLIMIT
2.4
Oscillator Frequency
FOSC
320
400
480
kHz
Soft Start Time
TSS
3
6
11
ms
VIH-EN
2.0
-
-
V
VIL-EN
-
-
0.8
V
VEN-HYS
50
100
200
mV
IEN
-
0.1
1.0
A
VEN =5V, Ta=25°C
VIH-PWM
2.0
-
-
V
PWM mode
VIL-PWM
-
-
0.8
V
VFPWM-HYS
200
330
460
mV
IFPWM
4.0
7.5
12.0
A
BD99010
VOUT,3.3V
Output Voltage
BD99011
VOUT,5V
High Side FET ON resistance
(5)
3.3
(5)
4.2
(5)
VIN = 6.5 to 18V, PWM mode
VIN = 6.5 to 18V, SLLM
Including output ripple (6)
VIN = 3.6V, ILoad = 0 to 1A
Ta=25°C
VIN = 6.5 to 18V, PWM mode
VIN = 6.5 to 18V, SLLM
Including output ripple (6)
VIN = 5V, ILoad = 0 to 1A
Ta=25°C
ISW =-50mA, VIN=13.2V
Ta=25°C
ISW =-50mA, VIN=3.6V
Ta=25°C
ISW =50mA, VIN=13.2V
Ta=25°C
VIN = 42V, VSW = 0V, VEN
=low, Ta=25°C
A
RT=75kΩ, VIN= 6.5 to 18V
Enable
EN Threshold
EN Hysteresis
EN Sink Current
Forced PWM mode
FPWM Threshold
FPWM Hysteresis
FPWM Sink Current
(5)
(6)
VFPWM =5V
Not production tested. Guaranteed by design.
Using external components on page 17 and 18.
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Datasheet
BD99010EFV-M, BD99011EFV-M
Typical Performance Curves
100
100
90
95
80
90
Efficiency[%]
Efficiency [%]
70
60
50
SLLM
40
30
VIN=13.2V
f=400kHz
10
0
0.01
80
75
70
PWM
20
SLLM
85
PWM
60
0.1
1
ILOAD
10
100
Log scale [mA]
1000 10000
0
500
1000
1500
ILOAD Linear scale [mA]
Figure 10. Efficiency Log Scale
(BD99010EFV-M : VOUT.3.3V)
100
90
95
80
SLLM
90
70
60
Efficiency[%]
Efficiency [%]
2000
Figure 11. Efficiency Linear Scale
(BD99010EFV-M : VOUT.3.3V)
100
50
VIN=13.2V
f=400kHz
65
SLLM
40
85
80
PWM
75
30
VIN=13.2V
f=400kHz
10
0
0.01
70
PWM
20
0.1
1
10
100
ILOAD Log scale [mA]
60
1000 10000
0
Figure 12. Efficiency Log Scale
(BD99011EFV-M : VOUT.5V)
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VIN=13.2V
f=400kHz
65
500
1000
1500
ILOAD Linear scale [mA]
2000
Figure 13. Efficiency Linear Scale
(BD99011EFV-M: VOUT.5V)
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Datasheet
BD99010EFV-M, BD99011EFV-M
50
50
45
45
40
40
35
BD99011EFV-M
30
30
IIN [uA]
IIN [µA]
35
25
20
BD99010EFV-M
15
10
Ta=25°C
IOUT=0A
5
10
15
20
25
30
VIN=13.2V
IOUT=0A
5
0
5
20
15
10
0
25
35
0
40
-40
-20
0
Input Voltage [V]
80
100
Figure 15. IIN vs. Temperature at No Load
Figure 14. IIN vs. Input Voltage at No Load
400
480
Ta=25°C
VIN=13.2V
350
460
300
440
Frequency [kHz]
IIN [uA]
20
40
60
Temperature[°C]
250
200
BD99011EFV-M
150
420
400
380
360
100
340
50
BD99010EFV-M
320
0
10
ILOAD
100
Log Scale [uA]
1000
-20
0
20
40
60
Temperature [°C]
80
100
Figure 17. Frequency vs. Temperature
Figure 16. IIN vs. ILOAD
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Datasheet
3.37
3.37
3.36
3.36
3.35
3.35
3.34
3.34
Output Voltage [V]
Output Voltage [V]
BD99010EFV-M, BD99011EFV-M
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
3.24
3.32
3.31
3.30
3.29
3.28
3.27
Ta=25°C
f=400kHz
ILOAD=1A
VFPWM=low
3.33
Ta=-40°C
3.25
Ta=105°C
Ta=-40°C
Ta=105°C
3.24
3.23
3.23
5
10
15
20
25
30
Input Voltage[V]
35
40
5
10
Figure 18. Line Regulation 1
(BD99010EFV-M: VOUT.3.3V)
3.37
3.37
3.36
3.36
3.35
3.35
3.34
3.34
3.33
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
VIN=13.2V
f=400kHz
VFPWM=low
3.25
3.24
15
20
25
30
Input Voltage [V]
35
40
Figure 19. Line Regulation 2
(BD99010EFV-M: VOUT.3.3V)
Output Voltage [V]
Output Voltage [V]
Ta=25°C
f=400kHz
ILOAD=100µA
VFPWM=low
3.26
3.32
3.31
3.30
3.29
3.28
Ta=25℃
3.27
Ta=-40℃
3.26
3.25
Ta=105℃
3.24
3.23
3.23
0
500
1000
ILOAD [mA]
1500
2000
-20
0
20
40
60
Temperature[°C]
80
100
Figure 21. Output Voltage vs. Temperature
(BD99010EFV-M: VOUT.3.3V)
Figure 20. Load Regulation
(BD99010EFV-M: VOUT.3.3V)
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Datasheet
5.10
5.10
5.08
5.08
5.06
5.06
Output Voltage [V]
Output Voltage [V]
BD99010EFV-M, BD99011EFV-M
5.04
5.02
5.00
4.98
f=400kHz
ILOAD=1A
VFPWM=low
4.96
4.94
5.04
5.02
5.00
4.98
f=400kHz
ILOAD=100µA
VFPWM=low
4.96
Ta=25°C
4.94
Ta=-40°C
4.92
4.92
Ta=105°C
4.90
Ta=-40°C
Ta=105°C
4.90
5
10
15
20
25
30
Input Voltage[V]
35
40
5
10
15
20
25
30
Input Voltage [V]
35
40
Figure 23. Line Regulation 2
(BD99011EFV-M: VOUT.5V)
Figure 22. Line Regulation 1
(BD99011EFV-M: VOUT.5V)
5.10
5.10
5.08
5.08
5.06
Output Voltage [V]
5.06
5.04
Output Voltage [V]
Ta=25°C
5.02
5.00
4.98
Ta=25℃
4.96
VIN=13.2V
f=400kHz
VFPWM=low
4.94
4.92
5.04
5.02
5.00
4.98
4.96
4.94
Ta=-40℃
Ta=105℃
4.92
4.90
4.90
0
500
1000
ILOAD [mA]
1500
-40
2000
Figure 24. Load Regulation
(BD99011EFV-M: VOUT.5V)
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0
20
40
60
Temperature[°C]
80
100
Figure 25. Output Voltage vs. Temperature
(BD99011EFV-M: VOUT.5V)
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Datasheet
BD99010EFV-M, BD99011EFV-M
VOUT
(AC coupled)
100mV/div
VIN=13.2V,
f=400kHz
FPWM
5V/div
SW
10V/div
2A
ILOAD
1A/div
VOUT
(AC coupled)
100mV/div
200mA
Figure 27. Mode Transition (SLLM ⇔ FWPM)
(BD99010EFV=M: VOUT.3.3V)
Figure 26. Transient Response
(BD99010EFV-M: VOUT.3.3V)
VIN
5V/div
VIN
5V/div
SW
5V/div
SW
5V/div
VOUT
2V/div
ILOAD
2A/div
VOUT
2V/div
Figure 28. Slow Input Ramp Up and Down
(BD99010EFV-M: VOUT.3.3V)
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Figure 29. VIN Cranking
(BD99010EFV-M: VOUT.3.3V)
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Datasheet
BD99010EFV-M, BD99011EFV-M
VOUT
(AC coupled)
100mV/div
VIN=13.2V,
f=400kHz
FPWM
5V/div
SW
10V/div
2A
ILOAD
1A/div
VOUT
(AC coupled)
100mV/div
200mA
Figure 31. Mode Transition (SLLM ⇔ FWPM)
(BD99011EFV-M: VOUT.5V)
Figure 30. Transient Response
(BD99011EFV-M: VOUT.5V)
VIN
5V/div
VIN
5V/div
VIN=3.6V
SW
5V/div
SW
5V/div
VOUT
5V/div
ILOAD
2A/div
VOUT
5V/div
Figure 32. Slow Input Ramp Up and Down
(BD99011EFV-M: VOUT.5V)
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Figure 33. VIN Cranking
(BD99011EFV-M: VOUT.5V)
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Datasheet
BD99010EFV-M, BD99011EFV-M
18
14
Ta=25°C
Ta=25°C
16
Ta=105°C
Ta=105°C
FPWM Sink Current [μA]
EN Sink Current [μA]
14
Ta=-40°C
12
Ta=-40°C
10
12
10
8
6
4
8
6
4
2
2
0
0
5
10
15
20
25
30
EN Voltage [V]
35
40
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
FPWM Voltage [V]
Figure 34. EN Sink Current
Figure 35. FPWM Sink Current
IIN
VIN
PGND
(1)
C1
CIN
PVIN
PGND
PVIN
PGND
VIN
Input Voltage
VOUT
SW
VREGB
PGND
PGND
L1
SW
C6
PGND
ILOAD
C2
COUT3
COUT4 COUT5
R100
C8
REG_L
RT
COMP
RRT
GND
PGND
PGND
EN
PGND
EN
GND
R1
REG
FPWM
FPWM
C5
C7
GND
VOUT
GND
GND
GND
GND
PGND
Figure 36. Measurement Figure
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Datasheet
BD99010EFV-M, BD99011EFV-M
Timing Chart
(1) Startup operations
VIN, PVIN
EN
UVLO release(typ : 3.58V)
REG
Internal
soft start
COMP
SW
VOUT
Figure 37. Timing Chart 1 (Start up operation)
(2)
Protection operations (VIN,PVIN=13.2V, VEN=high)
Figure 38. Timing Chart 2 (Protection operation)
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Datasheet
BD99010EFV-M, BD99011EFV-M
Applications
(1): Refer to Setting the input capacitor in page 20/26.
Figure 39. Application circuit
BD99010EFV-M
Component
No
Name
(1)
Component
Value
Description
Product Name
1
CIN
220µF
Capacitor, 50V, electrolytic
-
2
C1
4.7µF
Capacitor, 50V, ceramic
GCM32ER71H475KA55
Comment
3
C2
-
Capacitor, 50V, ceramic
-
4
COUT3
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
5
COUT4
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
6
COUT5
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
7
C5
1µF
Capacitor, 16V, ceramic
GCM188R71C105KA64
8
C6
0.1µF
Capacitor, 50V, ceramic
GCM188R71H104KA57
2200pF
Capacitor, 50V, ceramic
GCM188R71H222KA37
f=200kHz
1500pF
Capacitor, 50V, ceramic
GCM188R71H152KA37
f=300kHz
1000pF
Capacitor, 50V, ceramic
GCM188R71H102KA37
f=400kHz
1000pF
Capacitor, 50V, ceramic
GCM188R71H102KA37
f=500kHz
-
Capacitor, 16V, ceramic
-
27kΩ
Resistor,
MCR03EZP Series
f=200kHz
27kΩ
Resistor,
MCR03EZP Series
f=300kHz
33kΩ
Resistor,
MCR03EZP Series
f=400kHz
33kΩ
Resistor,
MCR03EZP Series
f=500kHz
164kΩ
Resistor,
MCR03EZP Series
f=200kHz
104kΩ
Resistor,
MCR03EZP Series
f=300kHz
75kΩ
Resistor,
MCR03EZP Series
f=400kHz
f=500kHz
9
10
11
12
13
14
C7
C8
R1
RRT
R100
L1
58kΩ
Resistor,
MCR03EZP Series
0Ω
Resistor,
MCR03EZP Series
22µH
Inductor
CLF10040T-220M-H
f=200kHz
15µH
Inductor
CLF10040T-150M-H
f=300kHz
10µH
Inductor
CLF10040T-100M-H
f=400kHz
10µH
Inductor
CLF10040T-100M-H
f=500kHz
(1): Refer to Setting the input capacitor in page 18/26.
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Datasheet
BD99010EFV-M, BD99011EFV-M
BD99011EFV-M
Component
No
Name
Component
Value
Description
Product Name
Comment
1
CIN(1)
220µF
Capacitor, 50V, electrolytic
-
2
C1
4.7µF
Capacitor, 50V, ceramic
GCM32ER71H475KA55
3
C2
-
Capacitor, 50V, ceramic
-
4
COUT3
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
5
COUT4
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
6
COUT5
22µF
Capacitor, 10V, ceramic
GCM32ER71A226KE12
7
C5
1µF
Capacitor, 16V, ceramic
GCM188R71C105KA64
8
C6
0.1µF
Capacitor, 50V, ceramic
GCM188R71H104KA57
2200pF
Capacitor, 50V, ceramic
GCM188R71H222KA37
f=200kHz
1500pF
Capacitor, 50V, ceramic
GCM188R71H152KA37
f=300kHz
1000pF
Capacitor, 50V, ceramic
GCM188R71H102KA37
f=400kHz
1000pF
Capacitor, 50V, ceramic
GCM188R71H102KA37
f=500kHz
9
10
11
12
13
14
C7
C8
R1
RRT
R100
L1
-
Capacitor, 16V, ceramic
-
20kΩ
Resistor,
MCR03EZP Series
f=200kHz
20kΩ
Resistor,
MCR03EZP Series
f=300kHz
20kΩ
Resistor,
MCR03EZP Series
f=400kHz
20ｋΩ
Resistor,
MCR03EZP Series
f=500kHz
164kΩ
Resistor,
MCR03EZP Series
f=200kHz
104kΩ
Resistor,
MCR03EZP Series
f=300kHz
75kΩ
Resistor,
MCR03EZP Series
f=400kHz
58kΩ
Resistor,
MCR03EZP Series
f=500kHz
0Ω
Resistor,
MCR03EZP Series
22µH
Inductor
CLF10040T-220M-H
f=200kHz
15µH
Inductor
CLF10040T-150M-H
f=300kHz
10µH
Inductor
CLF10040T-100M-H
f=400kHz
10µH
Inductor
CLF10040T-100M-H
f=500kHz
(1): Refer to Setting the input capacitor in page 18/26.
These are the reference value. These characteristics are influenced by the PCB layout pattern, used parts, etc.
verification and confirmation with the actual application is recommended.
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Datasheet
BD99010EFV-M, BD99011EFV-M
Selection of External Components
(1)
Setting the Inductor (L) value
The inductor-value determines the output current ripple. As shown in the following
equation, the larger the inductor, and the higher the switching frequency, the lower
the ripple current.
Figure 40.
The optimal output current ripple setting is ca. 30% of the maximum current.
(ΔIL: output current ripple, f: switching frequency）
Figure 41.
Care should be taken not to exceed the maximum current rating of the inductor since this will lead to magnetic saturation
and consequently to loss of efficiency. It is recommended to allow for sufficient margin to ensure that the peak current does
not exceed the coil current rating. Use low resistance (DCR, ACR) coils to minimize coil loss and increase efficiency.
(2)
Setting the output capacitor COUT value
Select the output capacitor with consideration to the acceptable ripple voltage (VP-P) at high output current conditions.
The following equation is used to determine the output ripple voltage.
in which: f denotes the switching frequency
The output COUT setting needs to be kept within the allowable ripple voltage range.
The above formula gives an indication of the ripple voltage and sufficient margin should be taken to accommodate for
aging and component variations. Low ESR capacitors enable a lower output ripple voltage. Also, the value of the buffer
capacitor should not be taken too large in order to meet the requirement for output startup time within the soft start time
range. As an estimate for the maximum value of COUT the following estimation can be taken:
TSS: Soft start time
ILIMIT: Output current limit value
Note: non-optimal capacitance values may cause startup problems. Especially in cases of extremely large capacitance values,
the possibility exists that the inrush current at startup will activate the overcurrent protection, thus slowing down the output
voltage startup. At even more extreme values, one faces the risk of falsely triggering the SCP (short circuit protection) causing
the output voltage not to start up at all. Therefore, validation and conformation with the actual application is recommended.
Also at low load conditions the output buffer capacitor is determining the output voltage ripple but via a different mechanism. The
BD9901xEFV-M makes a small series of switching cycles which charges the buffer capacitor following a staircase shape curve.
Consecutively, the switching is paused until the buffer capacitor is discharged according to a linear shape curve again to the
reference level. Generally, this leads to a somewhat larger voltage ripple as in higher load conditions.
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BD99010EFV-M, BD99011EFV-M
(3) Setting input capacitor
The input capacitor acts as (i) Decoupling capacitor (ii) Bulk capacitor.
Decoupling capacitor: Ceramic capacitor of value 4.7μF to 10μF is necessary.
The voltage rating should be > 1.2x max input voltage or > 2 x normal input
voltage. It is better to place it as close as possible to PVIN pin and PGND pin.
Bulk capacitor: It acts as a backup power supply and tries to keep the input
potential when the input power supply drops. The low ESR electrolytic capacitor
with large capacity is suitable for the bulk capacitor. Based on application
appropriate value can be taken. When the impedance on the input side is high
(long wiring from the power supply to VIN, etc.), the high capacity is needed
In application, it is necessary to verify that there is no problem at output due to
the decrease of VIN at transient response. Please be careful not to exceed the
rated ripple current of the capacitor.
The IRMS value of the input ripple current can be calculated with the expression
below.
Figure 42.
In addition, in the automotive and other applications requiring high reliability, it is
recommended that the multiple electrolytic capacitors are connected in parallel
to avoid a dry up. In order to reduce a risk of destruction because of short in a
ceramic capacitor, we recommend using 2 serials +2 parallel structure.
Since the lineup also of what packed 2 series and 2 parallel structure in
1package, respectively is carried out by each capacitor supplier, please confirm
to each supplier.
(4) Setting the switching frequency
The switching frequency is set with the resistor RT.
The setting range is 200kHz to 500kHz.The relation between the resistance value and the oscillation frequency is shown in
the table below. Selecting a resistor outside the range shown below may cause malfunctions of the switching regulator.
RT resistance
164 kΩ
128 kΩ
104 kΩ
88 kΩ
75 kΩ
66 kΩ
58 kΩ
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Oscillation frequency
200kHz
250kHz
300kHz
350kHz
400kHz
450kHz
500kHz
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Datasheet
BD99010EFV-M, BD99011EFV-M
(5) Setting the phase compensation circuit
The phase compensation circuitry provides regulation loop stability and ensures sufficient regulation bandwidth for rapid
load and supply voltage step responses. There are two conditions to avoid (near) negative feedback that causes regulation
in stability:
(a) At the frequency of unity loop gain(0dB), fc. the phase delay should be 150° or less. (i.e. the so-called phase
margin is 30° or higher)
(b) As the DC/DC converter application is sampled according to the switching frequency, fc should be set to 1/10 or
less of the switching frequency.
In order to achieve sufficient rapid step response fc should be as high as possible and consequently the switching
frequency has to be set as high as possible.
The phase compensation is set by the capacitors and resistors serially connected to the COMP pin. Achieving stability by
using the phase compensation is done by cancelling the 2 poles (error amp pole denoted as fp1 and power stage pole
denoted as fp2) of the regulation loop by means of a zero, denoted as fz1, of the capacitor C3 in the phase compensation
circuit.
fp1, fp2 and fz1 are determined by the formulas below.
fp1=
fz1=
gm
2π×C3×AV
1
2π×C3×R1
In the formula above, gｍ is the error amp
Trans conductance (140 μA/V) and AV is
the error amp voltage gain (2500 V/V)
Figure 43.
During startup in forced PWM mode at light loads the duty cycle of the regulator has to be very small and the regulation
loop has a tendency to become marginally instable causing a large voltage ripple or noise. This noise during startup can be
prevented by creating another zero, fz2, in the regulation loop with resistor ROUT.
Please note that adding this resistor is effectively increasing the ESR of the output buffer capacitor and hence increasing
the ripple voltage according eq. 2. In practice a small value suffices to remove all noise during soft start while keeping a
small ripple voltage of ca. 50mVP-P at high load situations. In case, the noise at low voltages during startup is not negatively
affecting other system components the resistor ROUT can be omitted. Moreover, in case of the start-up at SLLM with light
load, the ripple voltage does not become large during the soft start.
This setting is obtained by using a simplified calculation, therefore, small adjustments in values in the actual application
may be required. Also as these characteristics are influenced by the substrate layout, load conditions, etc. validation and
confirmation with the actual application at time of mass production design is recommended.
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BD99010EFV-M, BD99011EFV-M
PCB Layout Pattern
The PCB layout greatly influences the stable operation of the IC. Depending on the PCB layout IC might not show its
original characteristics or might not function properly.
Please note the following points when creation the PCB layout. Moreover, Fig 35 shows the recommended layout pattern
and component placement.

The input capacitors C1, C2 and CIN should be placed as close as possible to the VIN, PVIN GND and PGND.
Especially, C1 and C2 should be placed as close as possible to PVIN and PGND pin.

The output voltage feedback line VOUT should be separated from lines with a lot of noise such as the SW line.

The output capacitors COUT3, COUT4 and COUT5 should be placed in close proximity to inductor L1.

The inductor L1 should be placed as close as close as possible to the SW pin. The pattern area of the SW node
should be as small as possible.

EN pin has to be connected GND or supplied with the voltage below 0.8V to set the device in shut down mode
because the EN pin is not pulled-down internally.

The exposed die pad on the bottom of the package has to be soldered to GND. Then the device is connected to GND
electrically and gets good thermal performance.

The feedback frequency characteristics (phase margin) can be measured by inserting a resistor at the location of
R100 and using FRA. However, this should be shorted during normal operation.
<TOP VIEW>
<BOTTOM VIEW>
PGND
PGND
VIN
VOUT
GND
EN
FPWM
Figure 44. Reference layout pattern
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BD99010EFV-M, BD99011EFV-M
Heat Dissipation
The allowance maximum junction temperature Tj of BD99010EFV-M and BD99011EFV-M is 150℃. When the junction
temperature becomes 150℃ or more, the thermal shutdown circuit operates, and the device becomes shut down.
Therefore, it is necessary to design the system requirements and the board layout so that the junction temperature should
not exceed 150℃ in the power-supply voltage, the output load, and the operating temperature rating.
The maximum junction temperature can be determined from ambient temperature Ta, thermal resistance θja of package
and heat dissipation P of IC by the following equation.
Tj = Ta + θja × P [℃]
Thermal resistance θja of the package changes depending on the number of layers and the area of the copper foil of the
board etc.
Heat dissipation PTOTAL of IC can be calculated by the next expression.
PTOTAL = PICC + PRON + PSW [W]
PICC = VIN × ICC ・・・ Heat dissipation in control circuit
PRON = Ron × IOUT2 ・・・ Heat dissipation in output FET
Ron = D × RONH + (1 - D) × RONL
PSW = Tr × IOUT × VIN × Fosc ・・・ Heat dissipation in switching
ICC : Circuit current (refer to page. 6)
RONL : ON resistance of L-side FET (refer to page. 7)
D : ON duty (=VOUT/ VIN) IOUT : Output load current
RONH : ON resistance of H-side FET (refer to page. 7)
Fosc : Oscillator frequency
Tr : switching rise and fall time (approximately 20ns)
Power dissipation vs. temperature characteristics
4.5
(1) 4.0W
POWER DISSIPATION: Pd [W]
4.0
3.5
3.0
(2) 2.8W
2.5
2.0
1.5
(3) 1.1W
1.0
0.5
0.0
0
20
40
60
80
100
AMBIENT TEMPERATURE: Ta [℃]
120
140
(1) ：Standalone IC
(2) ：Mounted on a ROHM 2 layer standard board
（70mm×70mm×1.6mm glass-epoxy board）
(3) ： Mounted on a ROHM 4 layer standard board
（70mm×70mm×1.6mm glass-epoxy board）
Figure 45. Power dissipation vs. temperature characteristics
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Datasheet
BD99010EFV-M, BD99011EFV-M
I/O Equivalence Circuits
SW, VREGB
REG, REG_L
VOUT
※（）is for BD99011EFV-M
RT
FPWM
COMP
EN
Figure 46. Equivalent circuit figure
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Datasheet
BD99010EFV-M, BD99011EFV-M
Operational Notes
1.
Absolute maximum ratings
Exceeding the absolute maximum rating for supply voltage, operating temperature or other parameters can result in
damages to or destruction of the chip. In this event it also becomes impossible to determine the cause of the damage
(e.g. short circuit, open circuit, etc). Therefore, if any special mode is being considered with values expected to
exceed the absolute maximum ratings, implementing physical safety measures, such as adding fuses, should be
considered.
2.
GND electric potential
Keep the GND terminal potential at the lowest (minimum) potential under any operating condition. Furthermore,
excluding the SW pin, the voltage of all pin should never drop below that of GND. In case there is a pin with a voltage
lower than GND implement countermeasures such as using a bypass route.
3.
Power dissipation
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. Therefore allow for sufficient margins to ensure use within the power
dissipation rating.
4.
Input power supply
Concerning the input pins VIN and PVIN, the layout pattern should be as short as possible and free from electrical
interferences. In case the impedance of the input supply line is large, the resulting voltage drop at high load situation
and low supply voltage will cause repeated UVLO cycles sometimes referred to as “chattering”. Therefore, the
impedance of the input line should be so small that the worst case voltage drop is smaller than the UVLO hysteresis.
To prevent damage to or destruction of the chip, the input filter which can be contain 0.5V/μs against the voltage of
VIN and PNIN should be considered.
5.
Electrical characteristics
The electrical characteristics given in this specification may be influenced by conditions such as temperature, supply
voltage and external components. Transient characteristics should be sufficiently verified.
6.
Thermal shutdown (TSD)
This IC incorporates and integrated thermal shutdown circuit to prevent heat damage to the IC. Normal operation
should be within the power dissipation rating, if however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise and the TSD circuit will be activated and turn all output pins OFF. After the Tj falls below the
TSD threshold the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
7.
Inter-pin shorting and mounting errors
Ensure that when mounting the IC on the PCB the direction and position are correct. Incorrect mounting may result in
damaging the IC. Also, shorts caused by dust entering between the output, input and GND pin may result in
damaging the IC.
8.
In some applications, the VIN and pin potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, while the external capacitor is charged, the VIN shorts to the GND. For the
REG and REG_L output pin use a capacitor with a capacitance with less than 100μF. We also recommend using
reverse polarity diodes in series or a bypass diode between all pins and the VBAT pin.
Figure 47.
9.
Operation in strong electromagnetic fields
Use caution when operating in the presence of strong electromagnetic fields, as this may cause the IC to malfunction.
10.
In applications where the output pin is connected to a large inductive load, a counter-EMF (electromotive force) might
occur at startup or shutdown. A diode should be added for protection.
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Datasheet
BD99010EFV-M, BD99011EFV-M
11.
Testing on application boards
The IC needs to be discharged after each test process as, while using the application board for testing, connecting a
capacitor to a low-impedance pin may cause stress to the IC. As a protection from static electricity, ensure that the
assembly setup is grounded and take sufficient caution with transportation and storage. Also, make sure to turn off
the power supply when connecting and disconnecting the inspection equipment.
12.
GND wiring pattern
When both a small-signal GND and a high current GND are present, single-point grounding (at the set standard point)
is recommended. This in order to separate the small-signal and high current patterns and to ensure that voltage
changes stemming from the wiring resistance and high current do not cause any voltage change in the small-signal
GND. Similarly, care must be taken to avoid wiring pattern fluctuations in any connected external component GND.
13.
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a
parasitic diode or transistor. Relations between each potential may form as shown in the example below, where a
resistor and transistor are connected to a pin:
o
With the resistor, when GND＞ Pin A, and with the transistor (NPN), when GND＞Pin B:
The P-N junction operates as a parasitic diode.
o
With the transistor (NPN), when GND＞ Pin B:
The P-N junction operates as a parasitic transistor by interacting with the N layers of elements in proximity
to the parasitic diode described above.
Parasitic diodes inevitably occur in the structure of the IC. Their operation can result in mutual interference between
circuits and can cause malfunctions and, in turn, physical damage to or destruction of the chip. Therefore do not
employ any method in which parasitic diodes can operate such as applying a voltage to an input pin that is lower than
the (P substrate) GND.
Figure 48.
14.
REG PIN
REG is output that supplies the internal circuit. We do not recommend using REG for any other purpose.
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Datasheet
BD99010EFV-M, BD99011EFV-M
Ordering Information
B
D
9
9
0
1
x
Part Number
99010 : 3.3V output
99011 : 5V output
E
F
V
ME 2
Package
EFV: HTSSOP-B24
Packaging and forming specification
E2: Embossed tape and reel
Physical Dimension Tape and Reel Information
HTSSOP-B24
<Tape and Reel information>
7.8±0.1
(MAX 8.15 include BURR)
(5.0)
0.325
1.0±0.2
0.53±0.15
(3.4)
1
Tape
Embossed carrier tape (with dry pack)
Quantity
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
12
1PIN MARK
+0.05
0.17 -0.03
S
0.08±0.05
0.85±0.05
1.0MAX
13
5.6±0.1
7.6±0.2
24
+6°
4° −4°
0.65
0.08 S
+0.05
0.24 -0.04
0.08
Direction of feed
1pin
M
Reel
(Unit : mm)
∗ Order quantity needs to be multiple of the minimum quantity.
Marking Diagram
HTSSOP-B24(TOP VIEW)
Part Number Marking
Part Number Marking
BD99010
BD99011
LOT Number
Output Voltage (V)
3.3
5.0
1PIN MARK
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Datasheet
BD99010EFV-M, BD99011EFV-M
Revision History
Date
Revision
28.Feb.2013
Rev.001
New Release as Draft.
Rev.002
P.1 Key Specifications , Input Voltage Range change.
(record both Absolute Maximum Ratings and Recommended Operating Ratings)
Figure.1 Correct.
P.4 UVLO , Correct comment. (REG Voltage→VIN Voltage).
P.7 Absolute Maximum Ratings, Add parameter [PVIN-VREB voltage].
Delete comment (2)
P.17,18 Change inductor’s Product Name.
Rev.003
P.1 Key Specifications
Sentense change
“AEC-Q100 qualification is in progress”
↓
“AEC-Q100 qualified”
23.Jun.2014
7.July.2014
Changes
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Datasheet
Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice – SS
© 2013 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice – SS
© 2013 ROHM Co., Ltd. All rights reserved.
Rev.002