INTEGRATED CIRCUITS DATA SHEET 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate Product specification File under Integrated Circuits, IC06 1998 Aug 05 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate FEATURES • Wide operating voltage range: 2.0 to 6.0 V • Symmetrical output impedance • High noise immunity QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6.0 ns. TYP. SYMBOL PARAMETER tPHL/ tPLH propagation delay inA, inB to outY • Balanced propagation delays CI input capacitance • Very small 5 pins package CPD power dissipation capacitance • Low power dissipation • Output capability: standard. CONDITIONS CL = 15 pF VCC = 5 V notes 1 and 2 UNIT HC1G HCT1G 9 10 ns 1.5 1.5 pF 23 23 pF Notes DESCRIPTION 1. CPD is used to determine the dynamic power dissipation (PD in µW). The 74HC1G/HCT1G86 is a high-speed Si-gate CMOS device. PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; The 74HC1G/HCT1G86 provides the 2-input EXCLUSIVE-OR function. fo = output frequency in MHz; The standard output currents are 1⁄2 compared to the 74HC/HCT86. VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC1G the condition is VI = GND to VCC; For HCT1G the condition is VI = GND to VCC − 1.5 V. FUNCTION TABLE See note 1. INPUTS CL = output load capacitance in pF; OUTPUT PINNING inA inB outY PIN L L L 1 and 2 L H H H L H H H L SYMBOL DESCRIPTION inB, inA data inputs 3 GND ground (0 V) 4 outY data output 5 VCC DC supply voltage Note 1. H = HIGH voltage level; L = LOW voltage level. 1998 Aug 05 2 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate ORDERING AND PACKAGE INFORMATION PACKAGES OUTSIDE NORTH AMERICA TEMPERATURE RANGE 74HC1G86GW −40 to +125 °C 74HCT1G86GW PINS PACKAGE MATERIAL CODE MARKING 5 SC-88A plastic SOT353 HH 5 SC-88A plastic SOT353 TH handbook, halfpage inB 1 inA 2 GND 5 VCC handbook, halfpage 1 2 86 3 4 inB inA outY 4 outY MNA038 MNA037 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage inB handbook, halfpage 1 =1 2 4 outY MNA039 inA Fig.3 IEC logic symbol. 1998 Aug 05 MNA040 Fig.4 Logic diagram. 3 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate RECOMMENDED OPERATING CONDITIONS 74HC1G SYMBOL 74HCT1G PARAMETER UNIT MIN. TYP. MAX. MIN. TYP. CONDITIONS MAX. VCC DC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 − VCC 0 − VCC V VO output voltage 0 − VCC 0 − VCC V Tamb operating ambient temperature range −40 +25 +125 −40 +25 +125 °C see DC and AC characteristics per device tr,tf input rise and fall times − except for Schmitt-trigger − inputs − − 1000 − − − ns VCC = 2.0 V − 500 − − 500 ns VCC = 4.5 V − 400 − − − ns VCC = 6.0 V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC DC supply voltage −0.5 +7.0 V ±IIK DC input diode current VI < −0.5 or VI > VCC + 0.5 V; note 1 − 20 mA ±IOK DC output diode current VO < −0.5 or VO > VCC + 0.5 V; note 1 − 20 mA ±IO DC output source or sink current standard outputs −0.5 V < VO < VCC + 0.5 V; note 1 − 12.5 mA ±ICC DC VCC or GND current for types note 1 with standard outputs − 25 mA Tstg storage temperature range −65 +150 °C PD power dissipation per package − 200 mW 5 pins plastic SC-88A for temperature range: −40 to +125 °C above +55 °C derate linearly with 2.5 mW/K Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Aug 05 4 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate DC CHARACTERISTICS FOR THE 74HC1G Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (°C) SYMBOL −40 to +85 PARAMETER MIN. VIH VIL VOH VOH VOL HIGH-level input voltage TEST CONDITIONS TYP.(1) −40 to +125 MAX. MIN. UNIT VCC (V) MAX. 1.5 1.2 − 1.5 − V 2.0 3.15 2.4 − 3.15 − V 4.5 4.2 3.2 − 4.2 − V 6.0 LOW-level input voltage − 0.8 0.5 − 0.5 V 2.0 − 2.1 1.35 − 1.35 V 4.5 − 2.8 1.8 − 1.8 V 6.0 HIGH-level output voltage; all outputs HIGH-level output voltage; standard outputs LOW-level output voltage; all outputs OTHER 1.9 2.0 − 1.9 − V 2.0 4.4 4.5 − 4.4 − V 4.5 5.9 6.0 − 5.9 − V 6.0 4.13 4.32 − 3.7 − V 4.5 VI = VIH or VIL; −IO = 2.0 mA 5.63 5.81 − 5.2 − V 6.0 VI = VIH or VIL; −IO = 2.6 mA − 0 0.1 − 0.1 V 2.0 VI = VIH or VIL; IO = 20 µA − 0 0.1 − 0.1 V 4.5 − 0 0.1 − 0.1 V 6.0 VI = VIH or VIL; −IO = 20 µA LOW-level output voltage; standard outputs − 0.15 0.33 − 0.4 V 4.5 VI = VIH or VIL; IO = 2.0 mA − 0.16 0.33 − 0.4 V 6.0 VI = VIH or VIL; IO = 2.6 mA II input leakage current − − 1.0 − 1.0 µA 6.0 VI = VCC or GND ICC quiescent supply current − − 10 − 20 µA 6.0 VI = VCC or GND; IO = 0 VOL Note 1. All typical values are measured at Tamb = 25 °C. 1998 Aug 05 5 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate DC CHARACTERISTICS FOR THE 74HCT1G Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (°C) SYMBOL TEST CONDITIONS −40 to +85 PARAMETER MIN. TYP.(1) −40 to +125 MAX. MIN. UNIT VCC (V) MAX. OTHER VIH HIGH-level input voltage 2.0 1.6 − 2.0 − V 4.5 to 5.5 VIL LOW-level input voltage − 1.2 0.8 − 0.8 V 4.5 to 5.5 VOH HIGH-level output voltage; all outputs 4.4 4.5 − 4.4 − V 4.5 VI = VIH or VIL; −IO = 20 µA VOH HIGH-level output voltage; standard outputs 4.13 4.32 − 3.7 − V 4.5 VI = VIH or VIL; −IO = 2.0 mA VOL LOW-level output voltage; all outputs − 0 0.1 − 0.1 V 4.5 VI = VIH or VIL; IO = 20 µA VOL LOW-level output voltage; standard outputs − 0.15 0.33 − 0.4 V 4.5 VI = VIH or VIL; IO = 2.0 mA II input leakage current − − 1.0 − 1.0 µA 5.5 VI = VCC or GND ICC quiescent supply current − − 10.0 − 20.0 µA 5.5 VI = VCC or GND; IO = 0 ∆ICC additional supply current per input − − 500 − 850 µA 4.5 to 5.5 VI = VCC − 2.1 V; IO = 0 Note 1. All typical values are measured at Tamb = 25 °C. 1998 Aug 05 6 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate AC CHARACTERISTICS FOR 74HC1G86 GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF. Tamb (°C) SYMBOL −40 to +85 PARAMETER TYP.(1) MIN. tPHL/tPLH propagation delay inA, inB to outY TEST CONDITIONS − 22 − − −40 to +125 MAX. MIN. UNIT VCC (V) MAX. 115 − 135 ns 2.0 11 23 − 27 ns 4.5 9 20 − 23 ns 6.0 WAVEFORMS see Figs 5 and 6 Note 1. All typical values are measured at Tamb = 25 °C. AC CHARACTERISTICS FOR 74HCT1G86 GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF. Tamb (°C) SYMBOL −40 to +85 PARAMETER MIN. tPHL/tPLH propagation delay inA, inB to outY − TYP.(1) 13 −40 to +125 MAX. MIN. − 23 Note 1. All typical values are measured at Tamb = 25 °C. 1998 Aug 05 TEST CONDITIONS 7 UNIT VCC (V) MAX. 27 ns 4.5 WAVEFORMS see Figs 5 and 6 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate AC WAVEFORMS handbook, halfpage inA, inB INPUT VCC handbook, halfpage VM(1) tPHL PULSE GENERATOR tPLH VI VO D.U.T. RT outY OUTPUT VM(1) CL 50 pF MNA034 MNA041 Definitions for test circuit: CL = load capacitance including jig and probe capacitance (see “AC characteristics for 74HC1G86” and “AC characteristics for 74HCT1G86” for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. (1) HC1G: VM = 50 %; VI = GND to VCC; HCT1G: VM = 1.3 V; VI = GND to 3.0 V. Fig.5 1998 Aug 05 The input (inA, inB) to output (outY) propagation delays. Fig.6 Load circuitry for switching times. 8 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate PACKAGE OUTLINE Plastic surface mounted package; 5 leads SOT353 D E B y X A HE 5 v M A 4 Q A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E (2) e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION SOT353 1998 Aug 05 REFERENCES IEC JEDEC EIAJ SC-88A 9 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 1998 Aug 05 10 Philips Semiconductors Product specification 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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