PHILIPS TDA8574T

INTEGRATED CIRCUITS
DATA SHEET
TDA8574
Class-H high-output voltage level
line driver
Product specification
Supersedes data of 1997 Feb 26
File under Integrated Circuits, IC01
1998 Oct 16
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
The TDA8574 is available in a DIP16 package and the
TDA8574T in a SO16 package.
FEATURES
• Output voltage swing larger than supply voltage
Line drivers are necessary in car audio systems in which
the power amplifiers are driven by long cables.
The signal-to-noise ratio of these car audio systems is
improved by using the TDA8574(T) class-H high-output
level line driver. The high-output level of TDA8574(T)
enables a reduction of the gain of the power amplifier
resulting in an improvement of the power amplifier
performance.
• High supply voltage ripple rejection
• Low distortion
• Low noise
• ESD protected on all pins.
GENERAL DESCRIPTION
The TDA8574(T) is a two channel class-H high-output
voltage line driver for use in car audio applications.
The line driver behaves as a non-inverting amplifier with a
gain of 8 dB and a single-ended output. Due to the class-H
voltage lifting principle the voltage swing over the load is
more than the supply voltage. With a supply voltage of 9 V
the output voltage swing over the load will be
14 V (peak-to-peak).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VCC
supply voltage
ICC
supply current
Gv
voltage gain
Vo(rms)
maximal output voltage (RMS value)
SVRR
supply voltage ripple rejection
CONDITIONS
VCC = 9 V
THD = 0.1%
MIN.
TYP.
MAX.
UNIT
6
9
12
V
−
8
13
mA
7.5
8
8.5
dB
5.0
5.2
−
V
50
65
−
dB
THD
total harmonic distortion
−
0.003
−
%
Vno
noise output voltage
−
5
−
µV
Zo
output impedance
−
−
10
Ω
Vo(rms) = 3 V; f = 1 kHz
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
TDA8574T
SO16
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
TDA8574
DIP16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
1998 Oct 16
DESCRIPTION
2
VERSION
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
BLOCK DIAGRAM
handbook, full pagewidth
VCCL
1
36 kΩ
BUFFER
24 kΩ
SVRL
3
16
VCCL
−
+
BUFFER
15
CL+
CL−
LIFT
AMP.
30 kΩ
+
−
REFERENCE
INL
INML
INMR
INR
SIGNAL
AMP.
13
OUTL
VCCL
2
14
4
5Ω
TDA8574(T)
5
LGND
11
7
RGND
VCCR
REFERENCE
−
+
12
OUTR
SIGNAL
AMP.
30 kΩ
BUFFER
SVRR
+
−
6
24 kΩ
BUFFER
VCCR
LIFT
AMP.
VCCR
10
9
36 kΩ
8
MGE668
Fig.1 Block diagram.
1998 Oct 16
3
CR−
CR+
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
PINNING
SYMBOL
PIN
DESCRIPTION
VCCL
1
supply voltage left channel
INL
2
input voltage left channel
SVRL
3
SVRR left channel
INML
4
inverting input left channel
INMR
5
SVRR
handbook, halfpage
VCCL
1
16
CL+
INL
2
15
CL−
inverting input right channel
SVRL
3
14
LGND
6
SVRR right channel
INML
4
INR
7
input voltage right channel
INMR
5
VCCR
8
supply voltage right channel
11
9
lift capacitor (+) right channel
SVRR
6
CR+
RGND
CR−
10
lift capacitor (−) right channel
INR
7
10
CR−
RGND
11
ground right channel
VCCR
8
9
CR+
OUTR
12
output voltage right channel
OUTL
13
output voltage left channel
LGND
14
ground left channel
CL−
15
lift capacitor (−) left channel
CL+
16
lift capacitor (+) left channel
13 OUTL
TDA8574
TDA8574T 12 OUTR
MGE667
Fig.2 Pin configuration.
The DC output level is set to ≈0.87 × VCC. The maximum
peak-to-peak output voltage of the signal amplifier is
calculated with the formula:
FUNCTIONAL DESCRIPTION
Lift amplifier
The lift amplifier, referred to as LIFT AMP. in Fig.1, is used
as a non-inverting amplifier with a voltage gain of 8 dB set
by an internal feedback network. If the output voltage of
the signal amplifier is low, the external lift capacitor is
recharged by the lift amplifier. As soon as the output
voltage of the signal amplifier increases above 0.87 × VCC
the lift amplifier switches the voltage of the lift capacitor in
series with the supply voltage VCC. The voltage at the
positive side of the lift capacitor is referred to as lifted
supply voltage.
V o ( p – p ) max ≈ 2 × ( 0.87V CC – 0.4 )
Buffers
The buffers prevent loading of the internal voltage divider
network made by a series connection of resistors. For a
good supply voltage ripple rejection this internal voltage
divider network has to be decoupled by an external
capacitor.
Reference
Signal amplifier
This circuit supplies all currents needed in the device.
The signal amplifier, referred to as SIGNAL AMP. in Fig.1,
is used as a non-inverting amplifier. The voltage gain Gv is
set by the feedback resistors according to the formula:
R
G v = 1 + ------2R1
and should be set to 8 dB. The LIFT AMP. and SIG AMP.
must have equal voltage gain Gv. The rail-to-rail output
stage of the signal amplifier uses the lifted supply voltage
to increase the output voltage swing.
1998 Oct 16
4
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
−
12
V
IORM
repetitive peak output current
−
20
mA
Tstg
storage temperature
−55
+150
°C
Tamb
operating ambient temperature
−40
+85
°C
Tj
junction temperature
−
+150
°C
operating
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
1998 Oct 16
PARAMETER
VALUE
UNIT
TDA8574 (DIP16)
75
K/W
TDA8574T (SO16)
110
K/W
thermal resistance from junction to ambient in free air
5
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
DC CHARACTERISTICS
VCC = 9 V; Tamb = 25 °C; R L = 10 kΩ; in accordance with application diagram (see Fig.3).
SYMBOL
PARAMETER
VCC
supply voltage
ICC
supply current
VO
DC output voltage
CONDITIONS
Vin = 0 V
note 1
MIN.
TYP.
MAX.
UNIT
6
9
12
V
−
8
13
mA
−
7.8
−
V
Note
1. The DC output voltage with respect to ground is ≈0.87 × VCC.
AC CHARACTERISTICS
VCC = 9 V; f = 1 kHz; R L = 10 kΩ; Tamb = 25 °C; in accordance with test circuit (see Fig.3); note 1.
SYMBOL
PARAMETER
Gv
voltage gain
CONDITIONS
MIN.
TYP.
MAX.
UNIT
7.5
8
8.5
dB
∆Gv
channel unbalance
−
−
0.5
dB
αcs
channel separation
Rs = 600 Ω; Vo(rms) = 1 V; note 1
80
90
−
dB
flr
low frequency roll-off
−1 dB; note 2
−
−
5
Hz
fhr
high frequency roll-off
−1 dB
20
−
−
kHz
Zi
input impedance
22
30
38
kΩ
Zo
output impedance
−
−
10
Ω
Vo(max)(rms)
maximum output voltage
(RMS value)
THD + N = 0.1%
5.0
5.2
−
V
Vno
noise output voltage
unweighted; note 3
−
7
9
µV
A-weighted; note 4
−
5
−
µV
f = 1 kHz; Vo = 3 V (RMS); note 5
−
0.003
0.01
%
f = 17 Hz to 20 kHz; note 6
−
0.01
−
%
50
65
−
dB
−
55
−
dB
THD + N
SVRR
total harmonic distortion plus
noise
supply voltage ripple rejection note 7
f = 20 Hz to 20 kHz; note 8
Notes
1. The channel separation is determined by the parasitic capacitance between the inverting input left channel (pin 4)
and the inverting input right channel (pin 5). The PCB layout has a major contribution to the parasitic capacitance.
To obtain best results, the PCB tracks to pin 4 and pin 5 should be separated as much as possible.
2. The frequency response is externally fixed by the input coupling capacitors.
3. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with a source resistor Rs = 600 Ω.
4. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with an A-weighted filter with a source resistor
Rs = 600 Ω.
5. Distortion is measured at a frequency of 1 kHz using an A-weighted filter.
6. Distortion is measured at an output voltage of 3.0 V (RMS) at frequencies between 17 Hz and 20 kHz.
7. Ripple rejection is measured at the output, using a source resistor Rs = 600 Ω and a ripple amplitude of
100 mV (RMS) at a frequency of 1 kHz.
8. Ripple rejection is measured at the output, using a source resistor Rs = 600 Ω and a ripple amplitude of
100 mV (RMS) at frequencies between 20 Hz and 20 kHz.
1998 Oct 16
6
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
APPLICATION INFORMATION
handbook, full pagewidth
24 kΩ
36 kΩ
R1(1)
R2(1)
VCC
VCCL 1
VCC
C6
100
nF
C5
1.5 nF
36 kΩ
BUFFER
24 kΩ
SVRL
3
16 CL+
VCCL
−
+
BUFFER
C4
100
µF
15 CL−
LIFT
AMP.
30 kΩ
+
−
REFERENCE
C1
SIGNAL
AMP.
C3
13 OUTL
22 µF
VCCL
RL
10 kΩ
INL 2
14 LGND
INML 4
22 µF
5Ω
TDA8574(T)
INMR 5
C1
11 RGND
INR 7
22 µF
VCCR
REFERENCE
Rs
Vi(L)
−
+
Rs
C3
12 OUTR
SIGNAL
AMP.
22 µF
Vi(R)
30 kΩ
BUFFER
+
−
SVRR 6
C2
47 µF
24 kΩ
BUFFER
LIFT
AMP.
VCCR
36 kΩ
VCCR 8
10 CR−
C4
100
µF
9 CR+
C5
1.5 nF
VCC
24 kΩ
36 kΩ
R1(1)
R2(1)
MGE669
(1) R1 and R2 should have a tolerance of ≤ 1%.
Fig.3 Application diagram.
1998 Oct 16
7
RL
10 kΩ
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
Printed-Circuit Board (PCB) layout
64
handbook, full pagewidth
46.08
22 µF
22 µF
OUTR
OUTL
10 kΩ
SGND
10 kΩ
22 µF
SGND
SO16
INR
36 kΩ
22 µF
24 kΩ
INL
36 kΩ
24 kΩ
RL
47 µF
GND
VCC
MBH883
Dimensions in mm.
IC mounted on track side, additional components mounted on component side.
Tracks viewed from component side.
Fig.4 Recommended PCB-layout.
1998 Oct 16
8
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
Application characteristics
VCC = 9 V; RI = 10 kΩ; Tamb = 25 °C; 80 kHz filter.
MGD906
1
MGD907
1
handbook, halfpage
handbook, halfpage
THD + N
(%)
THD + N
(%)
10−1
10−1
Vo = 5 V
4V
3V
2V
f = 10 kHz
10−2
10−2
1 kHz
10−3
100 Hz
0
Fig.5
2
4
V (V)
o
10−3
10
6
Total harmonic distortion plus noise as a
function of Vo.
Fig.6
MGD908
10
102
103
104
105
Total harmonic distortion plus noise as a
function of frequency.
MGD909
−40
handbook, halfpage
f (Hz)
handbook, halfpage
G
(dB)
SVRR
(dB)
8
−50
Rs =
600 Ω
−60
6
0Ω
−70
4
2
10
102
103
104
105
f (Hz)
−80
10
106
Fig.8
Fig.7 Total circuit gain as a function of frequency.
1998 Oct 16
9
102
103
104
f (Hz)
105
Supply voltage ripple rejection as a function
of frequency.
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
MGD910
−60
TDA8574
MGD911
−60
handbook, halfpage
handbook, halfpage
αcs
(dB)
αcs
(dB)
f = 10 kHz
−80
−80
1V
1 kHz
100 Hz
−100
−100
3V
5V
−120
10
−120
0
1
2
3
4
Vo (V)
5
103
104
f (Hz)
Fig.10 Channel separation as a function of
frequency.
Fig.9 Channel separation as a function of Vo.
1998 Oct 16
102
10
105
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
PACKAGE OUTLINES
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
HE
y
v M A
Z
9
16
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
8
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.41
0.40
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT162-1
075E03
MS-013AA
1998 Oct 16
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
11
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
ME
seating plane
D
A2
A
A1
L
c
e
Z
w M
b1
(e 1)
b
b2
MH
9
16
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
b2
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
0.76
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.049
0.033
0.014
0.009
0.77
0.73
0.26
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.030
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
92-11-17
95-01-14
SOT38-4
1998 Oct 16
EUROPEAN
PROJECTION
12
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1998 Oct 16
TDA8574
13
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
TDA8574
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Oct 16
14
Philips Semiconductors
Product specification
Class-H high-output voltage level line
driver
NOTES
1998 Oct 16
15
TDA8574
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Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545102/25/03/pp16
Date of release: 1998 Oct 16
Document order number:
9397 750 04393