PHILIPS TDA9801T

INTEGRATED CIRCUITS
DATA SHEET
TDA9801
Single standard VIF-PLL
demodulator and FM-PLL detector
Product specification
Supersedes data of 1998 May 06
File under Integrated Circuits, IC02
1999 Aug 26
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
• Stabilizer circuit for ripple rejection and to achieve
constant output signals
FEATURES
• Suitable for negative vision modulation
• 5 to 9 V positive supply voltage range
• Applicable for IF frequencies of 38.9, 45.75 and
58.75 MHz
• Low power consumption of 300 mW at 5 V supply
voltage.
• Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier (AC-coupled)
GENERAL DESCRIPTION
• True synchronous demodulation with active carrier
regeneration (ultra-linear demodulation, good
intermodulation figures, reduced harmonics and
excellent pulse response)
The TDA9801(T) is a monolithic integrated circuit for vision
and sound IF signal processing in TV and VTR sets and
multimedia front-ends.
• Peak sync pulse AGC
• Video amplifier to match sound trap and sound filter
• AGC output voltage for tuner with fixed resistor for
takeover point setting
• AFC detector without extra reference circuit
• Alignment-free FM-PLL detector with high linearity
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA9801
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
TDA9801T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1999 Aug 26
2
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
supply voltage
note 1
4.5
5.0
9.9
V
IP
supply current
VP = 9 V
52
61
70
mA
Vi(sens)(VIF)(rms) sensitivity of VIF input signal
(RMS value)
−1 dB video at output;
fPC = 38.9 or 45.75 MHz
−
50
90
µV
Vi(max)(rms)
maximum input voltage
(RMS value)
+1 dB video at output;
fPC = 38.9 or 45.75 MHz
70
150
−
mV
GIF
IF gain control
fPC = 38.9 or 45.75 MHz
64
70
Vo(CVBS)(p-p)
CVBS output voltage
(peak-to-peak value)
VP = 5 V
1.7
2.0
2.3
V
dB
Bv(−3dB)
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
6
8
−
MHz
S/NW
weighted signal-to-noise ratio
VP = 5 V; note 2
56
60
−
dB
αIM(0.92/1.1)
intermodulation attenuation at
f = 0.92 or 1.1 MHz
for BLUE
56
62
−
dB
αIM(2.76/3.3)
intermodulation attenuation at
f = 2.76 or 3.3 MHz
for BLUE
56
62
−
dB
αH(sup)
harmonics suppression in video
signal
note 3
35
40
−
dB
Vo(AF)(max)(rms)
maximum output AF signal
handling voltage (RMS value)
THD < 1.5%
0.8
−
−
V
Tamb
ambient temperature
−20
−
+70
°C
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with “CCIR 567” at a source impedance of 50 Ω.
3. Measurements taken with SAW filter G1962; VSB modulation; fvideo > 0.5 MHz; loop bandwidth BL = 60 kHz.
1999 Aug 26
3
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GND 18
VP
TPLL
VCO2
VCO1
AFC
20
6
17
16
15
INTERNAL
REFERENCE
VOLTAGE
TRAVELLING
WAVE
DIVIDER
AFC
DETECTOR
VCO
FM-PLL
DETECTOR
FREQUENCY
DETECTOR
AND PHASE
DETECTOR
VIF2 2
9 AF
10 DAF
CDAF
3-STAGE
IF-AMPLIFIER
VIF1 1
AF
AMPLIFIER
VIDEO
DEMODULATOR
VIDEO
AMPLIFIER
LIMITER
AMPLIFIER
4
ADJ 4
TDA9801
Philips Semiconductors
2fPC
Single standard VIF-PLL demodulator
and FM-PLL detector
BLOCK DIAGRAM
andbook, full pagewidth
1999 Aug 26
VP = 5 V (9 V)
sound
mute
takeover
point
AGC
DETECTOR
IF
AGC
TUNER
AGC
7
BUFFER AMPLIFIER
AND NOISE CLIPPER
2 V (p-p)
3
12
19
5
8
13
14
11
TOP
TAGC
AGC
MUTE
n.c.
VSO
VI
SI
R TOP
tuner AGC
CAGC
sound
mute
switch
SOUND
TRAP
1 V (p-p)
CVBS
SOUND
FILTER
video and
intercarrier
MHA879
Product specification
TDA9801
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PINNING
SYMBOL PIN
DESCRIPTION
VIF1
1
VIF differential input 1
VIF2
2
VIF differential input 2
TOP
3
tuner AGC TakeOver Point (TOP)
connection
ADJ
4
phase adjust connection
MUTE
5
sound mute switch connection
TPLL
6
PLL time constant connection
CVBS
7
CVBS (positive) video output
n.c.
8
not connected
AF
9
AF output
DAF
10
AF amplifier decoupling capacitor
connection
SI
11
sound intercarrier input
TAGC
12
tuner AGC output
VSO
13
video and sound intercarrier output
VI
14
buffer amplifier video input
AFC
15
AFC output
VCO1
16
VCO1 reference circuit for 2fPC
VCO2
17
VCO2 reference circuit for 2fPC
GND
18
ground supply (0 V)
AGC
19
AGC detector capacitor connection
VP
20
supply voltage (+5 V)
1999 Aug 26
handbook, halfpage
VIF1
1
20 VP
VIF2
2
19 AGC
TOP
3
18 GND
17 VCO2
ADJ 4
MUTE
16 VCO1
5
TDA9801
15 AFC
TPLL 6
14 VI
CVBS 7
n.c. 8
13 VSO
12 TAGC
AF 9
11 SI
DAF 10
MHA880
Fig.2 Pin configuration.
5
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
The voltage to set the VCO frequency to the actual double
vision carrier frequency is also amplified and converted for
the AFC output current.
FUNCTIONAL DESCRIPTION
3-stage IF amplifier
The VIF amplifier consists of three AC-coupled differential
amplifier stages (see Fig.1). Each differential stage
comprises a feedback network controlled by emitter
degeneration.
The VCO signal is divided-by-2 with a Travelling Wave
Divider (TWD) which generates two differential output
signals with a 90 degree phase difference independent of
the frequency.
AGC detector, IF AGC and tuner AGC
Video amplifier
The automatic control voltage to maintain the video output
signal at a constant level is generated in accordance with
the transmission standard. Since the TDA9801(T) is
suitable for negative modulation only the peak sync pulse
level is detected.
The composite video amplifier is a wide bandwidth
operational amplifier with internal feedback. A nominal
positive video signal of 1 V (p-p) is present at pin VSO.
Buffer amplifier and noise clipper
The AGC detector charges and discharges capacitor CAGC
to set the IF amplifier and tuner gain. The voltage on
capacitor CAGC is transferred to an internal IF control
signal, and is fed to the tuner AGC to generate the tuner
AGC output current on pin TAGC (open-collector output).
The tuner AGC takeover point level is set at pin TOP. This
allows the tuner to be matched to the SAW filter in order to
achieve the optimum IF input level.
The input impedance of the 7 dB wideband CVBS buffer
amplifier (with internal feedback) is suitable for ceramic
sound trap filters. Pin CVBS provides a positive video
signal of 2 V (p-p). Noise clipping is provided internally.
Sound demodulation
LIMITER AMPLIFIER
The FM sound intercarrier signal is fed to pin SI and
through a limiter amplifier before it is demodulated.
The result is high sensitivity and AM suppression.
The limiter amplifier consists of 7 stages which are
internally AC-coupled in order to minimizing the DC offset.
Frequency detector and phase detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector. During acquisition the
frequency detector produces a DC current proportional to
the frequency difference between the input and the VCO
signal. After frequency lock-in the phase detector
produces a DC current proportional to the phase
difference between the VCO and the input signal. The DC
current of either frequency detector or phase detector is
converted into a DC voltage via the loop filter which
controls the VCO frequency.
FM-PLL DETECTOR
The FM-PLL demodulator consists of an RC oscillator,
loop filter and phase detector. The oscillator frequency is
locked on the FM intercarrier signal from the limiter
amplifier. As a result of this locking, the RC oscillator is
frequency modulated. The modulating voltage (AF signal)
is used to control the oscillator frequency. By this, the
FM-PLL operates as an FM demodulator.
Video demodulator
The true synchronous video demodulator is realized by a
linear multiplier which is designed for low distortion and
wide bandwidth. The vision IF input signal is multiplied with
the ‘in phase’ component of the VCO output.
The demodulator output signal is fed via an integrated
low-pass filter (fg = 12 MHz) for suppression of the carrier
harmonics to the video amplifier.
AF AMPLIFIER
The audio frequency amplifier with internal feedback is
designed for high gain and high common-mode rejection.
The low-level AF signal output from the FM-PLL
demodulator is amplified and buffered in a low-ohmic
audio output stage. An external decoupling capacitor CDAF
removes the DC voltage from the audio amplifier input.
VCO, AFC detector and travelling wave divider
By using the sound mute switch (pin MUTE) the AF
amplifier is set in the mute state.
The VCO operates with a symmetrically connected
reference LC circuit, operating at the double vision carrier
frequency. Frequency control is performed by an internal
variable capacitor diode.
1999 Aug 26
TDA9801
6
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VP
PARAMETER
MIN.
MAX.
UNIT
IP = 70 mA; Tamb = 70 °C;
maximum chip temperature
supply voltage
Vn
CONDITIONS
125 °C for TDA9801
0
9.9
V
128 °C for TDA9801T
0
9.9
V
0
VP
V
voltage on
pins VIF1, VIF2, AFC and AGC
−
13.2
V
−
10
s
storage temperature
−25
+150
°C
Tamb
ambient temperature
−20
+70
°C
Ves
electrostatic handling voltage
−300
+300
V
pin TAGC
tsc(max)
maximum short-circuit time
Tstg
to ground or VP
note 1
Notes
1. Machine model class B (L = 2.5 µH).
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
TDA9801
73
K/W
TDA9801T
85
K/W
thermal resistance from junction to ambient
in free air
CHARACTERISTICS
VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and picture-to-sound carrier ratios; Vi(VIF)(rms) = 10 mV (sync
pulse level); IF input from 50 Ω via broadband transformer 1 : 1; DSB video modulation; 10% residual carrier; video
signal in accordance with “CCIR, line 17” or “NTC-7 Composite”; measurements taken in test circuit of Fig.12; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply: pin VP
VP
supply voltage
IP
supply current
note 1
4.5
5.0
9.9
V
VP = 5 V
51
60
70
mA
VP = 9 V
52
61
70
mA
fPC = 38.9 or 45.75 MHz
−
50
90
µV
fPC = 58.75 MHz
−
60
100
µV
fPC = 38.9 or 45.75 MHz
70
150
−
mV
fPC = 58.75 MHz
80
160
−
mV
3.0
3.4
3.8
V
Vision IF input: pins VIF1 and VIF2
Vi(sens)(VIF)(rms)
Vi(max)(rms)
VI
1999 Aug 26
sensitivity of VIF input
voltage (RMS value)
maximum VIF input voltage
(RMS value)
−1 dB video at output
1 dB video at output
DC input voltage
7
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
PARAMETER
TDA9801
CONDITIONS
∆Vint
internal IF amplitude
difference between picture
and sound carrier
within AGC range
GIF
IF gain control
see Fig.6
MIN.
TYP.
MAX.
UNIT
−
0.7
1
dB
fPC = 38.9 or 45.75 MHz
64
70
−
dB
fPC = 58.75 MHz
62
68
−
dB
BIF(−3dB)
−3 dB IF bandwidth
upper limit cut-off
frequency
70
100
−
MHz
Ri(dif)
differential input resistance
note 2
1.7
2.2
2.7
kΩ
Ci(dif)
differential input
capacitance
note 2
1.2
1.7
2.5
pF
MHz
VCO and video demodulator; note 3
fVCO(max)
maximum VCO frequency
for carrier regeneration;
f = 2fPC
125
130
−
∆fVCO/∆T
VCO frequency variation
with temperature
free running; IAFC = 0;
note 4
−
−
±20 × 10−6 K−1
VVCO(rms)
VCO voltage swing
(RMS value)
measured between
pins VCO1 and VCO2
fPC = 38.9 MHz
−
120
−
mV
fPC = 45.75 MHz
−
100
−
mV
fPC = 58.75 MHz
−
80
−
mV
negative
1.4
1.8
−
MHz
positive
1.4
1.8
−
MHz
fcr(PC)
picture carrier capture
frequency range
tacq
acquisition time
BL = 60 kHz; note 5
−
−
30
ms
Vi(sens)(VIF)(rms)
sensitivity of VIF input
(RMS value)
PLL still locked;
maximum IF gain; note 6
−
50
90
µV
C/N = 10 dB; note 7
−
100
140
µV
note 8
−
−
±2.0
µA
VP = 5 V
0.90
1.0
1.25
V
VP = 9 V
0.95
1.1
1.25
V
1.5
Ioffset(TPLL)
offset current at pin TPLL
Video amplifier output (sound carrier off): pin VSO
Vo(VSO)(p-p)
VSO output voltage
(peak-to-peak value)
see Fig.5
Vsync
sync pulse voltage level
1.35
1.6
V
Vv(clu)
upper video clipping
voltage level
VP − 1.1 VP − 1
−
V
Vv(cll)
lower video clipping voltage
level
−
0.7
0.9
V
Vo(intc)(rms)
intercarrier output voltage
(RMS value)
sound carrier on; note 9
−
32
−
mV
Ro
output resistance
note 2
−
−
10
Ω
Ibias
DC bias current
for internal emitter-follower
at pin VSO
1.8
2.5
−
mA
1999 Aug 26
8
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
PARAMETER
TDA9801
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Io(sink)(max)
maximum AC and DC
output sink current
1.4
−
−
mA
Io(source)(max)
maximum AC and DC
output source current
2.0
−
−
mA
Bv(−3dB)
−3 dB video bandwidth
CL < 50 pF; RL > 1 kΩ
7
10
−
MHz
αH(sup)
harmonics suppression in
video signal
CL < 50 pF; RL > 1 kΩ;
note 10
35
40
−
dB
PSRRVSO
power supply ripple
rejection at pin VSO
see Fig.7
32
35
−
dB
Buffer amplifier and noise clipper input: pin VI
Ri
input resistance
2.6
3.3
4.0
kΩ
Ci
input capacitance
1.4
2
3.0
pF
VI
DC input voltage
pin VI not connected
1.5
1.8
2.1
V
Buffer amplifier output: pin CVBS
Gv
voltage gain
note 11
6
7
7.5
dB
Bv(−3dB)
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
8
11
−
MHz
Vo(v)(p-p)
video output voltage
(peak-to-peak value)
sound carrier off;
see Fig.12
1.7
2.0
2.3
V
Vv(clu)
upper video clipping
voltage level
3.9
4.0
−
V
Vv(cll)
lower video clipping voltage
level
−
1.0
1.1
V
Vsync
sync pulse voltage level
−
1.35
−
V
Ro
output resistance
−
−
10
Ω
Ibias
DC bias current
1.8
2.5
−
mA
Io(sink)(max)
maximum AC and DC
output sink current
1.4
−
−
mA
Io(source)(max)
maximum AC and DC
output source current
2.4
−
−
mA
internal emitter-follower at
pin CVBS
Measurements from VIF inputs to CVBS output (330 Ω connected between pins VSO and VI, sound carrier off)
Vo(CVBS)(p-p)
∆Vo(CVBS)
CVBS output voltage
(peak-to-peak value)
VP = 5 V
1.7
2.0
2.3
V
VP = 9 V
1.8
2.2
2.6
V
deviation of CVBS output
voltage
at B/G standard
50 dB gain control
−
−
0.5
dB
30 dB gain control
−
−
0.1
dB
∆Vo(bl)
black level tilt
gain variation; note 12
−
−
1
%
Gdif
differential gain
“CCIR, line 330” or
“NTC-7 Composite”
−
2
5
%
ϕdif
differential phase
“CCIR, line 330” or
“NTC-7 Composite”
−
2
4
deg
Bv(−3dB)
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ
6
8
−
MHz
1999 Aug 26
9
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
S/NW
αIM(0.92/1.1)
PARAMETER
weighted signal-to-noise
ratio
CONDITIONS
MIN.
TYP.
MAX.
UNIT
see Fig.3; note 13
VP = 5 V
56
60
−
dB
VP = 9 V
55
59
−
dB
56
62
−
dB
58
64
−
dB
56
62
−
dB
intermodulation attenuation see Fig.4; note 14
at f = 0.92 or 1.1 MHz
for BLUE
for YELLOW
αIM(2.76/3.3)
TDA9801
intermodulation attenuation see Fig.4; note 14
at f = 2.76 or 3.3 MHz
for BLUE
for YELLOW
57
63
−
dB
residual picture carrier
(RMS value)
fundamental wave
−
1
10
mV
harmonics
−
1
10
mV
αH(sup)
harmonics suppression in
video signal
note 10
35
40
−
dB
PSRRCVBS
power supply ripple
rejection at pin CVBS
see Fig.7
25
28
−
dB
for increasing step
−
1
10
ms
for decreasing step
−
50
100
ms
0.82
1.1
1.38
mA
16
22
28
µA
maximum gain
0
−
−
V
minimum gain
−
−
VP − 0.7
V
minimum level with
RTOP = 22 kΩ
−
−
5
mV
maximum level with
RTOP = 0 Ω
50
−
−
mV
∆Vr(PC)(rms)
AGC detector output: pin AGC
tres
response time
Ich
charging current
Idch
discharging current
Vo
gain control output voltage
at 50 dB amplitude step of
input signal
note 12
see Fig.6
Tuner AGC
Vi(VIF)(rms)
VIF input voltage
(RMS value)
for onset tuner takeover
point
QVi(VIF)(rms)
accuracy level of tuner
RTOP = 13 kΩ;
takeover point (RMS value) ITAGC = 0.4 mA
7
−
14
mV
∆Vi(VIF)/∆T
variation of tuner takeover
point with temperature
ITAGC = 0.4 mA
−
0.02
0.06
dB/K
∆GIF
IF slip by automatic gain
control
tuner gain current from
20 to 80%
−
6
8
dB
1999 Aug 26
10
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
PARAMETER
TDA9801
CONDITIONS
MIN.
TYP.
MAX.
UNIT
TUNER AGC OUTPUT: PIN TAGC
Vmax
maximum voltage
from external source;
note 2
−
−
13.2
V
Vsat
saturation voltage
ITAGC = 1.7 mA
−
−
0.2
V
Isink
sink current
see Fig.6
no tuner gain reduction
−
0.1
0.3
µA
maximum tuner gain
reduction
1.7
2.0
2.6
mA
fPC = 38.9 MHz
−0.5
−0.75
−1.0
µA/kHz
fPC = 45.75 MHz
−0.4
−0.65
−0.9
µA/kHz
fPC = 58.75 MHz
−0.3
−0.55
−0.8
−
−
±20 ×
AFC detector: pin AFC; note 15
CRstps
control steepness
equal to ∆IAFC/∆fVIF
see Table 2
∆f/∆T
frequency variation with
temperature
IAFC = 0; note 4
Vo
output voltage
without external
components; see Fig.8
Io
∆Ir(v)(p-p)
output current
µA/kHz
106
K−1
upper limit
VP − 0.5 VP − 0.3 −
V
lower limit
−
0.3
0.5
V
source current
150
200
250
µA
sink current
150
200
250
µA
−
20
30
µA
0
−
0.8
V
see Fig.8
residual video modulation
current
(peak-to-peak value)
Sound mute switch: pin MUTE; note 16
VIL
LOW-level input voltage
mute on
VIH
HIGH-level input voltage
mute off
1.5
−
VP
V
IIL
LOW-level input current
VMUTE = 0 V
−
−300
−360
µA
αmute
mute attenuation
VMUTE = 0 V
70
80
−
dB
∆Voffset(MUTE)
DC offset voltage at
pin MUTE
at switching to mute on
state (plop)
−
100
500
mV
S/N = 40 dB; see Fig.10
−
200
300
µV
αAM = 40 dB; f = 1 kHz;
m = 0.3
−
1
−
mV
FM sound limiter amplifier input: pin SI; note 17
Vi(FM)(rms)
FM input voltage
(RMS value)
“CCIR468-4”
Vi(FM)(max)(rms)
maximum FM input
handling voltage
(RMS value)
200
−
−
mV
VI
DC input voltage
2.3
2.6
2.9
V
1999 Aug 26
11
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
PARAMETER
TDA9801
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Ri
input resistance
note 2
480
600
720
Ω
αAM
AM suppression
AM signal: f = 1 kHz;
m = 0.3; see Fig.9
46
50
−
dB
fres(−3dB)
frequency response
−3 dB points of lower and
upper limits of IF sound
cut-off frequency
3.5
−
10
MHz
upper limit
7
−
−
MHz
lower limit
−
−
4
MHz
upper limit
8
−
−
MHz
lower limit
−
−
3.5
MHz
−
−
4
µs
−
−
±50
kHz
95
120
−
kHz
FM-PLL sound detector and AF amplifier; note 17
fcr(PLL)
catching range of PLL
fhr(PLL)
holding range of PLL
tacq
acquisition time
∆fAF
audio frequency deviation
BAF(−3dB)
−3 dB audio frequency
bandwidth
THD
total harmonic distortion
27 kHz FM deviation;
R3 = 0 Ω; note 18
−
0.25
0.5
%
S/NW
weighted signal-to-noise
ratio
“CCIR 468-4”; see Fig.10
50
55
−
dB
∆Vr(SC)(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
−
−
75
mV
∆fAF = ±27 kHz;
B/G standard; see Fig.10
400
500
600
mV
∆fAF = ±25 kHz;
M standard; see Fig.10
370
460
550
mV
THD < 1.5%
0.8
−
−
V
−
3 × 10−3 7 × 10−3
−
200
AC-coupled at pin AF
2.2
AC and DC
−
THD < 1.5%; note 18
AUDIO OUTPUT: PIN AF
Vo(AF)(rms)
AF output voltage
(RMS value)
Vo(AF)(max)(rms)
maximum AF output
handling voltage
(RMS value)
∆Vo(AF)/∆T
AF output voltage variation
with temperature
Ro
output resistance
RL
load resistance
Io(sink/source)(max) maximum sink or source
output current
VO
DC output voltage
PSRRAF
power supply ripple
rejection at pin AF
dB/K
−
Ω
−
−
kΩ
−
1.5
mA
2.1
2.5
2.9
V
R3 = 0 Ω; see Fig.7;
note 18
24
30
−
dB
voltage depends on VCO
frequency; note 19
1.5
−
3.3
V
note 2
DECOUPLING CAPACITOR: PIN DAF
VDAF
1999 Aug 26
DC voltage at decoupling
capacitor
12
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
PARAMETER
CONDITIONS
TDA9801
MIN.
TYP.
MAX.
UNIT
Measurements from VIF input to AF output; notes 20 and 21; see Fig.13
weighted signal-to-noise
ratio
S/NW
“CCIR 468-4”
black picture (sync only)
46
52
−
dB
white picture
42
48
−
dB
colour bar
40
46
−
dB
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the television
receiver.
3. Conditions for video demodulator:
a) Loop bandwidth: BL = 60 kHz, natural frequency fn = 15 kHz, damping factor d = 2, calculated with grey level and
FPLL input level
b) Resonance circuit of VCO: Qo > 50, see Table 2 for the value of the external capacitor C; CVCO = 8.5 pF, loop
voltage is approximately 2.6 V at VP = 5 V and approximately 2.7 V at VP = 9 V.
4. Temperature coefficient of the external LC circuit is equal to zero.
5. Vi(VIF)(rms) = 10 mV; ∆f = 1 MHz (VCO frequency offset related to fPC); white picture video modulation.
6. Vi(VIF) signal for nominal video signal.
7. Broadband transformer at the VIF input (see Fig.12). The C/N ratio at the VIF input for ‘lock-in’ is defined as the VIF
input signal (RMS value of sync pulse level) related to a superimposed 5 MHz band-limited white noise signal
(RMS value). The video modulation is for white picture.
8. The offset current is measured between pin TPLL and half of the supply voltage (VP = 2.5 V) under the conditions:
a) no input signal at VIF inputs
b) IF amplifier gain at minimum (VAGC = VP) and pin ADJ is left open-circuit.
9. The intercarrier output signal is superimposed to the video signal at pin VSO and can be calculated by the following
formula:
1
V o(intc)(rms) = 1.0 V (p-p) × ----------- × 10
2 2
where
V i(SC)
--------------- (dB) + 6 dB ± 2 dB
V i(PC)
-----------------------------------------------------------------20
a) 1.0 V (p-p) = video output signal as reference
1
b) ----------- = correction term for RMS value
2 2
V i(SC)
c) --------------- (dB) = sound-to-picture carrier ratio at VIF inputs in dB
V i(PC)
d) 6 dB = correction term of internal circuitry
e) ±2 dB = tolerance of video output and intercarrier output amplitude Vo(intc)(rms).
f) Example for SAW filter G1962:
sound shelf value = 20 dB,
V i(SC)
--------------- = – 27 dB ⇒ V o(intc)(rms) = 32 mV (typical value)
V i(PC)
1999 Aug 26
13
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
10. Measurements taken with SAW filter G1962; VSB modulation; fvideo > 0.5 MHz; loop bandwidth BL = 60 kHz.
11. The 7 dB buffer amplifier gain accounts for 1 dB loss in the sound trap. The buffer output signal is typical 2 V (p-p).
If no sound trap is applied a resistor of 330 Ω must be connected between pins VSO and VI.
12. The leakage current of CAGC should not exceed 1 µA. Larger currents will increase the tilt.
13. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with “CCIR 567” at a source impedance of 50 Ω.
14. The intermodulation figures are defined:
V o at 4.4 (3.58) MHz
a) α IM ( 0.92 ⁄ 1.1 ) = 20 log  ------------------------------------------------------- + 3.6 dB
 V o at 0.92 (1.1) MHz
αIM(0.92/1.1) value at 0.92 (or 1.1) MHz referenced to black or white signal
V o at 4.4 (3.58) MHz
b) α IM ( 2.76 ⁄ 3.3 ) = 20 log  -------------------------------------------------------
 V o at 2.76 (3.3) MHz
αIM(2.76/3.3) value at 2.76 (or 3.3) MHz referenced to colour carrier.
15. To match the AFC output signal to different tuning systems a current source output is provided (see Fig.8).
16. The no mute state is also valid when pin MUTE is not connected.
17. The input signal is provided by an external generator with 50 Ω source impedance, AC-coupled with a 10 nF
capacitor, fmod = 1 kHz and 27 kHz (54% FM deviation) of audio reference. A VIF input signal is not permitted.
Pin AGC has to be connected to the supply voltage. Measurements are taken at 50 µs de-emphasis (75 µs at the
M standard).
18. To allow a higher frequency deviation, the value of resistor R3 on pin DAF (see Fig.13) has to be increased.
However, the AF output signal must not exceed 0.5 V (nominal value) for THD = 0.2%. R3 = 4.7 kΩ provides −6 dB
amplification.
19. The leakage current of the 2.2 µF decoupling capacitor should not exceed 100 nA.
20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees
b) AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio), better than
60 dB (deviation 27 kHz) for white picture video modulation.
21. Input signal according to B/G standard of Table 1:
a) Input: Vi(VIF)(rms) = 10 mV, VSB modulation and 10% residual carrier
b) Reference: FM deviation = 27 kHz and measurements are taken at 50 µs de-emphasis.
Table 1
Input frequencies and carrier ratios
STANDARD
SYMBOL
DESCRIPTION
UNIT
B/G
M/N
M
fPC
picture carrier frequency
38.9
45.75
58.75
MHz
fSC
sound carrier frequency
33.4
41.25
54.25
MHz
PC/SC
picture-to-sound carrier ratio
13
7
7
dB
1999 Aug 26
14
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHB507
75
handbook, halfpage
S/NW
(dB)
3.2 dB
handbook, halfpage
10 dB
13.2 dB
13.2 dB
50
27 dB
25
27 dB
SC CC
BLUE
PC
SC CC
PC
YELLOW
MED685 - 1
0
−60
−40
0.06
0.6
Fig.3
−20
6 10
0
20
Vi(VIF)(rms)(dB)
Video output weighted signal-to-noise ratio
as a function of the VIF input voltage.
2.5 V
zero carrier level
white level
1.8 V
black level
1.5 V
sync level
handbook,
2.6 V halfpage
B/G and M/N standard
Fig.5
SC = sound carrier level, with respect to sync pulse level.
CC = chrominance carrier level, with respect to sync pulse level.
PC = picture carrier level, with respect to sync pulse level.
Sound shelf attenuation: 20 dB.
60
600
Vi(VIF)(rms)(mV)
Fig.4
MHA889
Video signal levels on output pin VSO
(sound carrier off).
1999 Aug 26
15
Input signal conditions for intermodulation
measurements.
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHB510
70
handbook, full pagewidth
(1)
60
GIF
(dB)
50
I TAGC
(mA)
0
0.2
40
(2)
(3)
(4)
30
0.6
20
1.0
10
1.4
0
1.8
2.0
−10
0
1
2
3
4
VAGC (V)
5
(1) GIF (IF gain control).
(2) RTOP = 22 kΩ.
(3) RTOP = 13 kΩ.
(4) RTOP = 0 Ω.
Fig.6 IF AGC gain control and tuner AGC output current as a function of the tuner AGC detector voltage.
handbook, full pagewidth
VP
100 mV
(fripple = 70 Hz)
VP = 5 V
TDA9801
MHA884
t
Fig.7 Power supply ripple rejection condition.
1999 Aug 26
16
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
handbook, halfpage
VP = 5 V
VP = 5 V
TDA9801
handbook, halfpage
VP = 9 V
VP = 9 V
22 kΩ
TDA9801
15
62 kΩ
AFC
IAFC
TDA9801
VAFC
15
AFC
VAFC
IAFC
22 kΩ
62 kΩ
MHA887
MHB508
9
AFC
(V)
7.5
handbook,
halfpage
V
MHA888
150
IAFC
(µA)
100
VAFC
(V)
(source current)
6
75
0
2.5
0
−50
3
−75
(sink current)
(sink current)
1.25
−100
1.5
38.6
38.9
−150
−150
39.2
39.5
f (MHz)
0
38.3
38.6
38.9
−225
39.5
39.2
f (MHz)
a. VP = 5 V.
b. VP = 9 V.
Fig.8 AFC measurement conditions and typical characteristics.
1999 Aug 26
225
IAFC
(µA)
150
(source current)
3.75
50
4.5
0
38.3
MHB509
5
handbook, halfpage
17
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
MHA885
0
handbook, full pagewidth
αAM
(dB)
−20
−40
−60
−80
−100
10−1
1
102
10
103
Vi(SI) (mV)
Fig.9 AM suppression (typical value) of the FM limiter amplifier as a function of the input voltage.
MHA886
handbook, full pagewidth
60
540
Vo(AF)(rms)
(1)
S/NW
(mV)
(dB)
520
50
(2)
500
40
480
30
460
20
10−1
1
10
102
Vi(SI) (mV)
(1) Signal-to-noise ratio (weighted).
(2) AF output signal (typical value).
Fig.10 AF output signal and signal-to-noise ratio as a function of the input voltage.
1999 Aug 26
18
103
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
handbook, full pagewidth
TDA9801
120
IF gain range
64 (<70) dB
antenna input
(dBµV)
100
(1)
video
1 V (p-p)
10−1
SAW insertion
loss 20 dB
tuner gain
control range
6 dB IF slip
80
IF signals
(RMS value)
(V)
10−2
64 dB
IF AGC
60
TOP
10−3
0.66 × 10−3
SAW insertion
loss 20 dB
10−4
40
0.66 × 10−4
40 dB
RF gain
10−5
20
0.66 × 10−5
VHF/UHF
IF
IF amplifier, demodulator
and video
tuner
SAW filter
TDA9801
MHA883
(1) Depends on TOP.
Fig.11 Front-end level diagram.
1999 Aug 26
19
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
INTERNAL CIRCUITRY
PIN
SYMBOL
DC VOLTAGE (V)
1
VIF1
3.4
2
VIF2
3.4
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+
1
1.1 kΩ
400 µA
+
1.1 kΩ
2
400 µA
3.6 V
MHB511
3
TOP
0 to 1.9
30 kΩ
20 kΩ
3.6 V
9 kΩ
3
1.9 V
MHB512
4
ADJ
0 to 0.4
5 kΩ
3.6 V
4
18 kΩ
16 kΩ
MHB513
1999 Aug 26
20
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
PIN
5
SYMBOL
MUTE
DC VOLTAGE (V)
TDA9801
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
0 to VP
mute
+
+
2.5 µA
5
25 µA
MHB514
6
TPLL
1.5 to 4.0
+
+
Ib
+
6
VCO
200 µA
MHB515
7
CVBS
sync pulse level:
1.35
+
6.4
kΩ
1.5 pF
7
2.5 mA
8
n.c.
1999 Aug 26
−
21
MHB516
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
PIN
9
SYMBOL
AF
DC VOLTAGE (V)
TDA9801
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
2.5
2.4 mA
+
+
9
MHB517
10
DAF
1.5 to 3.3
57 kΩ
5 kΩ
5 kΩ
10
190 µA
11
SI
2.6
MHB518
3.6 V
670 Ω
11
5.5 kΩ
5.5 kΩ
15 pF
MHB519
12
TAGC
0 to 13.2
12
15 V
MHB520
13
VSO
sync pulse level:
1.5
+
100 Ω
20 kΩ
13
10 µF
11.5 kΩ
2 kΩ
2.5 mA
3.6 V
MHB521
1999 Aug 26
22
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
PIN
14
SYMBOL
VI
DC VOLTAGE (V)
TDA9801
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1.8
3.6 V
6.6 kΩ
14
2 kΩ
5 kΩ
MHB522
15
AFC
0.3 to VP − 0.3
+
+
+
200 µA
15
1 kΩ
1 kΩ
MHB523
16
VCO1
2.7
17
VCO2
2.7
420 Ω
420 Ω
50 Ω
16
17
+
+
500 µA
2.8 V
MHB524
1999 Aug 26
23
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
PIN
18
SYMBOL
GND
DC VOLTAGE (V)
TDA9801
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
0
20
13.5 V
18
MHB525
19
AGC
1.5 to 4.0
1 mA
19
20 µA
Ib
MHB526
20
VP
VP
20
13.5 V
18
MHB525
1999 Aug 26
24
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22 kΩ
(62 kΩ)
10 nF
0.1 µF
1 V (p-p)
video and intercarrier
tuner AGC
330 Ω
2.2 µF
VP
20
AGC
19
560 Ω
(1)
GND
VCO2
17
18
VCO1
16
AFC
15
VI
VSO
13
7
8
TAGC
12
SI
11
25
14
Philips Semiconductors
10 µF
AFC
Single standard VIF-PLL demodulator
and FM-PLL detector
VP = 5 V (9 V)
TEST AND APPLICATION INFORMATION
handbook, full pagewidth
1999 Aug 26
22 kΩ
(62 kΩ)
TDA9801
1
2
VIF1
3
VIF2
4
TOP
5
ADJ
MUTE
6
TPLL
CVBS
9
n.c.
AF
10
DAF
1:1
vision
IF
50 Ω
390 Ω
13 kΩ
takeover
point
2.2 µF
0.1 µF
AF
sound
mute
MHA881
Product specification
Fig.12 Test circuit.
TDA9801
(1) See Table 2.
CVBS
2 V (p-p)
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10 µF
22 kΩ
(62 kΩ)
10 nF
0.1 µF
330 Ω 1 V (p-p)
sound
trap
video and intercarrier
tuner AGC
560
Ω
R1(2)
15
µH
2.2 µF
VP
20
AGC
19
GND
VCO2
17
12 V (9 V)(2)
sound
filter
(1)
18
R2(2)
VCO1
AFC
15
16
VI
VSO
14
13
7
8
TAGC
SI
12
11
9
10
26
TDA9801
1
2
VIF1
vision
IF
50 Ω
SAW
filter
3
VIF2
4
TOP
5
ADJ
6
MUTE
TPLL
CVBS
n.c.
2.2
kΩ
390 Ω
13 kΩ
AF
Philips Semiconductors
AFC
VP = 5 V (9 V)
Single standard VIF-PLL demodulator
and FM-PLL detector
ndbook, full pagewidth
1999 Aug 26
22 kΩ
(62 kΩ)
DAF
R3(3)
IF input
2.2 µF
0.1 µF
G1962
takeover
point
sound
mute
CVBS
2 V (p-p)
AF
22 nF
Product specification
Fig.13 Application circuit.
TDA9801
(1) See Table 2.
(2) Depends on tuner.
(3) See note 18 of Chapter “Characteristics”.
MHA882
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
Table 2
TDA9801
Oscillator circuit for different TV standards
PARAMETER
EUROPE
USA
JAPAN
IF frequency
38.9 MHz
45.75 MHz
58.75 MHz
VCO frequency
77.8 MHz
91.5 MHz
117.5 MHz
Oscillator circuit
16
(1)
16
(2)
(3)
(1)
17
16
(2)
17
MGG099
(1) CVCO = 8.5 pF.
(2) C = 8.2 ±0.25 pF.
(3) L = 251 nH.
Toko coil
Philips ceramic
capacitor
1999 Aug 26
(3)
(1)
(2)
(3)
17
MGG099
(1) CVCO = 8.5 pF.
(2) C = 10 ±0.25 pF.
(3) L = 163 nH.
MGG099
(1) CVCO = 8.5 pF.
(2) C = 15 ±0.25 pF.
(3) L = 78 nH.
5KM 369SNS-2010Z
5KMC V369SCS-2370Z
MC139 NE545SNAS100108
2222 632 51828
inside coil
15 pF (SMD; size: 0805)
27
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
D
e
e1
L
ME
MH
w
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.0
0.25
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT146-1
1999 Aug 26
REFERENCES
IEC
JEDEC
EIAJ
SC603
28
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-05-24
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
HE
y
v M A
Z
11
20
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
10
e
bp
detail X
w M
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013AC
1999 Aug 26
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
29
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
MANUAL SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
1999 Aug 26
TDA9801
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
30
Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
TDA9801
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
suitable(2)
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
Surface mount
REFLOW(1) DIPPING
−
suitable
BGA, SQFP
not suitable
suitable
−
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP,
SMS
not suitable(3)
suitable
−
PLCC(4), SO, SOJ
suitable
suitable
−
suitable
−
suitable
−
recommended(4)(5)
LQFP, QFP, TQFP
not
SSOP, TSSOP, VSO
not recommended(6)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Aug 26
31
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SCA 67
© Philips Electronics N.V. 1999
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Printed in The Netherlands
545004/02/pp32
Date of release: 1999
Aug 26
Document order number:
9397 750 05292