INTEGRATED CIRCUITS 74LV4060 14-stage binary ripple counter with oscillator Product specification 1998 Jun 23 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator FEATURES 74LV4060 APPLICATIONS • Wide operating voltage: 1.0 to 5.5 V • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, • Control Counters • Timers • Frequency Dividers • Time-delay circuits Tamb = 25C. • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb DESCRIPTION = 25C. The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT4060. • All active components on chip • RC or crystal oscillator configuration • Output capability: standard (except for RTC and CTC) • ICC category: MSI The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions. QUICK REFERENCE DATA GND = 0 V; Tamb = 25C; tr = tf < 2.5 ns SYMBOL PARAMETER CONDITIONS Propagation delay CL = 15 pF RS to Q3 VCC = 3.3 V TYPICAL UNIT 29 tPHL/tPLH Qn to Qn+1 6 tPHL MR to Qn 16 fmax Maximum clock frequency 99 MHz C1 Input capacitance 3.5 pF CPD Power dissipation capacitance per package 40 pF Notes 1, 2 and 3 ns NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W) PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of the outputs. 2. The condition is V1 = GND to VCC 3. For formula on dynamic power dissipation, see the following pages. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 16-Pin Plastic DIL –40°C to +125°C 74LV4060 N 74LV4060 N SOT38-4 16-Pin Plastic SO –40°C to +125°C 74LV4060 D 74LV4060 D SOT109-1 16-Pin Plastic SSOP Type II –40°C to +125°C 74LV4060 DB 74LV4060 DB SOT338-1 16-Pin Plastic TSSOP Type I –40°C to +125°C 74LV4060 PW 74LV4060PW DH SOT403-1 1998 Jun 23 2 853-2076 19619 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator PIN DESCRIPTION PIN NO. LOGIC SYMBOL SYMBOL FUNCTION 1, 2, 3 Q11 to Q13 Counter outputs 7, 5, 4, 6, 15, 13, 15 Q3 to Q9 Counter outputs 8 GND 9 74LV4060 10 9 RTC CTC Ground (0 V) 11 RS Q3 7 12 Q4 5 Q5 4 Q6 6 MR CTC External capacitor connection 10 RTC External resistor connection Q7 14 11 RS Clock input/oscillator pin Q8 13 12 MR Master reset 16 VCC Positive supply voltage Q9 15 Q11 1 Q12 2 Q13 3 PIN CONFIGURATION SV00307 Q11 1 16 VCC Q12 2 15 Q9 Q13 3 14 Q7 Q5 4 13 Q8 Q4 5 12 MR Q6 6 11 RS Q3 7 10 RTC GND 8 9 CTC SV00308 LOGIC SYMBOL (IEEE/IEC) CTR14 CTR14 3 9 CX 10 RX 11 RCX !G 7 3 4 4 + 12 CT 6 11 14 12 & 6 + 14 CT 13 CT = 0 7 5 5 13 CT = 0 9 15 9 15 11 1 11 1 2 2 13 3 13 3 (b) (a) SV00311 1998 Jun 23 3 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 DYNAMIC POWER DISSIPATION GND = 0 V; Tamb = 25 C VCC (V) PARAMETER Total dynamic power dissipation when using the on–chip oscillator (PD) TYPICAL FORMULA FOR PD (W)1 CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 16 x VCC CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 460 x VCC CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 1000 x VCC 1.2 2.0 3.0 NOTE: 1. Where: fo = output frequency in MHz; fosc = oscillator frequency in MHz; (CL x VCC2 x fo) = sum of the outputs; CL = output load capacitance in pF; Ct = timing capacitance in pF; VCC = supply voltage in V. FUNCTIONAL DIAGRAM 10 9 RTC CTC RS 11 CP 14-stage binary counter CD MR 12 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3 SV00312 LOGIC DIAGRAM CTC RTC FF1 FF4 FF10 FF12 FF14 RS CP Q CD MR Q3 Q9 Q11 Q13 SV00313 1998 Jun 23 4 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 TIMING DIAGRAM 1 2 4 8 16 32 64 128 256 512 1.024 2.048 4.096 8.192 16.384 RS MR Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 SV00309 ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL PARAMETER VCC DC supply voltage ±IIK DC input diode current ±IOK ±IO ±IGND, ±ICC Tstg PTOT CONDITIONS RATING UNIT –0.5 to +7.0 V VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current – standard outputs –0.5V < VO < VCC + 0.5V 25 DC VCC or GND current for types with –standard outputs 50 Storage temperature range Power dissipation per package –plastic DIL –plastic mini-pack (SO) –plastic shrink mini-pack (SSOP and TSSOP) –65 to +150 for temperature range: –40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mA mA °C mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jun 23 5 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER VI Input voltage VO Output voltage Tamb tr, tf CONDITIONS MIN TYP. MAX UNIT See Note1 1.0 3.3 5.5 V 0 – VCC V 0 – VCC V +85 +125 °C 500 200 100 50 ns/V DC supply voltage Operating ambient temperature range in free air See DC and AC characteristics –40 –40 VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V Input rise and fall times – – – – – – – – NOTES: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. DC CHARACTERISTICS Over operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL VIH VIL PARAMETER HIGH level Input voltage MR input LOW level Input voltage MR input -40°C to +85°C TEST CONDITIONS TYP1 MAX MIN MAX VCC = 1.2V 0.9 – – 0.9 – VCC = 2.0V 1.4 – – 1.4 – VCC = 2.7 to 3.6V 2.0 – – 2.0 – VCC = 4.5 to 5.5V 0.7 * VCC – – 0.7 * VCC – VCC = 1.2V – – 0.3 – 0.3 VCC = 2.0V – – 0.6 – 0.6 VCC = 2.7 to 3.6V – – 0.8 – 0.8 VCC = 4.5 to 5.5 VIH VIL VOH 1998 Jun 23 HIGH level Input voltage RS input LOW level Input voltage RS input HIGH level output voltage; RTC out output ut -40°C to +125°C MIN – – 0.3 * VCC – 0.3 * VCC VCC = 1.2V 1.0 – – 1.0 – VCC = 2.0V 1.6 – – 1.6 – VCC = 2.7 to 3.6V 2.4 – – 2.4 – VCC = 4.5 to 5.5V 0.8 * VCC – – 0.8 * VCC – VCC = 1.2V – – 0.2 – 0.2 VCC = 2.0V – – 0.4 – 0.4 VCC = 2.7 to 3.6V – – 0.5 – 0.5 VCC = 4.5 to 5.5 – – 0.2 * VCC – 0.2 * VCC VCC = 1.2V; RS = GND and MR = GND; –IO = 3.4mA – – – – – VCC = 2.0V; RS = GND and MR = GND; –IO = 3.4mA – – – – – VCC = 2.7V; RS = GND and MR = GND; –IO = 3.4mA – – – – – VCC = 3.0V; RS = GND and MR = GND; –IO = 3.4mA 2.40 2.82 – 2.20 – VCC = 4.5V; RS = GND and MR = GND; –IO = 3.4mA – – – – – 6 UNIT V V V V V Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 LIMITS SYMBOL VOH VOH VOH PARAMETER HIGH level output voltage; RTC out output ut HIGH level output voltage; RTC out ut output HIGH level output voltage; RTC out output ut TEST CONDITIONS -40°C to +85°C – – – – – VCC = 2.0V; RS = VCC and MR = VCC; –IO = 0.8mA – – – – – VCC = 2.7V; RS = VCC and MR = VCC; –IO = 0.8mA – – – – – VCC = 3.0V; RS = VCC and MR = VCC; –IO = 0.8mA 2.40 2.82 – 2.20 – VCC = 4.5V; RS = VCC and MR = VCC; –IO = 0.8mA – – – – – VCC = 1.2V; RS = GND and MR = GND; –IO = 100µA 1.0 1.2 – 1.0 – VCC = 2.0V; RS = GND and MR = GND; –IO = 100µA 1.8 2.0 – 1.8 – VCC = 2.7V; RS = GND and MR = GND; –IO = 100µA – – – – – VCC = 3.0V; RS = GND and MR = GND; –IO = 100µA 2.8 3.0 – 2.8 – VCC = 4.5V; RS = GND and MR = GND; –IO = 100µA – – – – – VCC = 1.2V; RS = VCC and MR = VCC; –IO = 100µA 1.0 1.2 – 1.0 – VCC = 2.0V; RS = VCC and MR = VCC; –IO = 100µA 1.8 2.0 – 1.8 – VCC = 2.7V; RS = VCC and MR = VCC; –IO = 100µA – – – – – VCC = 3.0V; RS = VCC and MR = VCC; –IO = 100µA 2.8 3.0 – 2.8 – VCC = 4.5V; RS = VCC and MR = VCC; –IO = 100µA – – – – – 1.2 – – – VCC = 1.2V; RS = VIH and MR = VIL; –IO = 3.8mA VOH VOH 1998 Jun 23 HIGH level output voltage; CTC out output ut HIGH level output voltage; exceptt RTC out exce output ut -40°C to +125°C VCC = 1.2V; RS = VCC and MR = VCC; –IO = 0.8mA VCC = 2.0V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 2.7V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 3.0V; RS = VIH and MR = VIL; –IO = 3.8mA 2.40 2.82 – 2.20 – VCC = 4.5V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 1.2V; VI = VIH and VI = VIL; –IO = 100µA 1.0 1.2 – 1.0 – VCC = 2.0V; VI = VIH and VI = VIL; –IO = 100µA 1.8 2.0 – 1.8 – VCC = 2.7V; VI = VIH and VI = VIL; –IO = 100µA – – – – – VCC = 3.0V; VI = VIH and VI = VIL; –IO = 100µA 2.8 3.0 – 2.8 – VCC = 4.5V; VI = VIH and VI = VIL; –IO = 100µA – – – – – 7 UNIT V V V V V Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 LIMITS SYMBOL VOH VOL VOL VOL VOL 1998 Jun 23 PARAMETER HIGH level output out ut voltage; except RTC and CTC outputs t t LOW level output voltage; RTC out ut output LOW level output voltage; RTC out output ut LOW level output voltage; CTC out output ut LOW level output voltage; exceptt RTC out exce output ut TEST CONDITIONS -40°C to +85°C -40°C to +125°C UNIT VCC = 1.2V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 2.0V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 2.7V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 3.0V; VI = VIH and VI = VIL; –IO = 6mA 2.40 2.82 – 2.20 – VCC = 4.5V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 1.2V; RS = VCC and MR = GND; –IO = 3.4mA – – – – – VCC = 2.0V; RS = VCC and MR = GND; –IO = 3.4mA – – – – – VCC = 2.7V; RS = VCC and MR = GND; –IO = 3.4mA – – – – – VCC = 3.0V; RS = VCC and MR = GND; –IO = 3.4mA – 0.25 0.40 – 0.50 V VCC = 4.5V; RS = VCC and MR = GND; –IO = 3.4mA – – – – – V VCC = 1.2V; RS = VCC and MR = GND; –IO = 100µA – 0 0.2 – 0.2 VCC = 2.0V; RS = VCC and MR = GND; –IO = 100µA – 0 0.2 – 0.2 VCC = 2.7V; RS = VCC and MR = GND; –IO = 100µA – – – – – VCC = 3.0V; RS = VCC and MR = GND; –IO = 100µA – 0 0.2 – 0.2 VCC = 4.5V; RS = VCC and MR = GND; –IO = 100µA – – – – – VCC = 1.2V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 2.0V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 2.7V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 3.0V; RS = VIH and MR = VIL; –IO = 3.8mA – 0.25 0.40 – 0.50 VCC = 4.5V; RS = VIH and MR = VIL; –IO = 3.8mA – – – – – VCC = 1.2V; VI = VIH and VI = VIL; –IO = 100µA – 0 0.2 – 0.2 VCC = 2.0V; VI = VIH and VI = VIL; –IO = 100µA – 0 0.2 – 0.2 VCC = 2.7V; VI = VIH and VI = VIL; –IO = 100µA – – – – – VCC = 3.0V; VI = VIH and VI = VIL; –IO = 100µA – 0 0.2 – 0.2 VCC = 4.5V; VI = VIH and VI = VIL; –IO = 100µA – – – – – 8 V V V V V Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 LIMITS SYMBOL VOL II ICC ∆ICC PARAMETER TEST CONDITIONS -40°C to +85°C -40°C to +125°C VCC = 1.2V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 2.0V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 2.7V; VI = VIH and VI = VIL; –IO = 6mA – 0.25 0.40 – 0.50 VCC = 3.0V; VI = VIH and VI = VIL; –IO = 6mA – – – – – VCC = 4.5V; VI = VIH and VI = VIL; –IO = 6mA – – – – – Input leakage current VCC = 5.5V; VI = VCC or GND – – 1.0 – 1.0 Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 – – 20 – 160 Quiescent supply current VCC = 5.5V; VI = VCC or GND; IO = 0 – – – – 80 Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 – – 500 – 850 HIGH level output out ut voltage; except RTC and CTC outputs t t UNIT V µA µA µA NOTE: 1. All typical values are measured at Tamb = 25°C. AC CHARACTERISTICS GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = 500Ω SYMBOL tPHL/tPLH tPHL/tPLH tPHL tW tW 1998 Jun 23 PARAMETER Propagation delay RS to Q3 Propagation delay Qn to Qn+1 Propagation delay MR to Qn Clock pulse width RS; HIGH or LOW Master reset pulse width MR; HIGH WAVEFORM Figures, 6, 8 Figures 7, 8 Figures 7, 8 Figure 6 Figure 7 LIMITS –40 to +85 °C CONDITION VCC(V) MIN TYP1 1.2 – 2.0 – LIMITS –40 to +125 °C MAX MIN 180 – – – 52 84 – 105 2.7 – 42 66 – 83 3.0 to 3.6 – 332 53 – 66 4.5 to 5.5 – 24 39 – 49 1.2 – 40 – – – 2.0 – 14 23 – 29 2.7 – 10 16 – 20 3.0 to 3.6 – 82 13 – 16 4.5 to 5.5 – 6 9 – 11 1.2 – 100 – – – 2.0 – 29 46 – 58 2.7 – 24 39 – 49 3.0 to 3.6 – 192 31 – 39 4.5 to 5.5 – 14 23 – 29 2.0 34 9 – 38 – 2.7 25 6 – 30 – 3.0 to 3.6 20 5 – 24 – 4.5 to 5.5 16 4 – 20 – 2.0 34 10 – 38 – 2.7 25 8 – 30 – 3.0 to 3.6 20 6 – 24 – 4.5 to 5.5 16 4 – 20 – 9 UNIT MAX ns ns ns ns ns Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator PARAMETER SYMBOL Figure 7 Maximum clock pulse frequency fmax LIMITS –40 to +85 °C CONDITION WAVEFORM Removal time MR to RS trem 74LV4060 Figure 6 LIMITS –40 to +125 °C VCC(V) MIN TYP1 MAX MIN MAX 2.0 29 18 – 37 – 2.7 26 16 – 32 – 3.0 to 3.6 18 11 – 23 – 4.5 to 5.5 12 7 – 15 – 2.0 14 40 – 9 – 2.7 19 70 – 12 – 3.0 to 3.6 24 90 – 15 – 4.5 to 5.5 30 100 – 19 – UNIT ns MHz NOTE: Unless otherwise stated, all typical values are at Tamb = 25°C. 1. Typical value measured at VCC = 3.3V. 2. Typical value measured at VCC = 5.0V. Rbias = 560 kW 20 VCC gfs (mA/V) 0.47 mF Vi ~ (f = 1 kHz) input output 100 mF 15 A io ~ 10 GND SV00323 Figure 1. Test set-up for measuring forward transconductance gfs = dio/dvi at vo is constant (see also graph Figure 2); MR = LOW. 5 0 0 1 2 3 4 VCC (V) SV00324 Figure 2. Typical forward transconductance gfs as a function of the supply voltage VCC at Tamb = 25C. 1998 Jun 23 10 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator ÎÎÎÎÎ ÎÎÎÎÎ 105 fosc (Hz) MR (from logic) 11 74LV4060 104 RS RTC 10 CTC 9 Rt Ct 103 C2 R2 102 SV00732 Figure 3. Example of an RC oscillator. Typical formula for oscillator frequency: 10 103 1 f OSC 2.5 x R t x C t 10–4 104 10–3 105 106 Rt (W) 10–2 Ct (mF) 10–1 SV00328 Figure 4. RC oscillator frequency as a function of Rt and Ct at VCC = 1.2 to 3.6 V; Tamb = 25°C. Ct curve at Rt = 100 kW; R2 = 200 kW. Rt curve at Ct = 1 nF; R2 = 2 x Rt. TIMING COMPONENTS LIMITATIONS The oscillator frequency is mainly determined by Rt . Ct, provided R2 2Rt and R2 . C2 Rt . Ct. The function of R2 is to minimize the influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance C2 should be kept as small as possible. In consideration of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the ’ON’ resistance in series with it, which typically is 280 W at VCC = 1.2 V, 130 W at VCC = 2.0 V and 100 W at VCC 3.0 V. The recommended values for these components to maintain agreement with the typical oscillation formula are: Ct > 50pF, up to any practical value, 10 kW < Rt < 1 MW. In order to avoid start-up problems, Rt > 1 kW. 1998 Jun 23 11 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 VI MR (from logic) MR INPUT VM GND 11 RS tW trem VI RTC 10 VM RS INPUT Rbias GND tPHL VCC 100 k to 1 M Qn OUTPUT R2 2.2 k VM GND SV00329 C3 22 to 37 pF C2 Figure 7. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (RS) removal time. 100 pF VOH Qn OUTPUT SV00326 VM VOL Figure 5. External components connection for a typical crystal oscillator R2 is the power limiting resistor. For starting and maintaining oscillation, a minimum transconductance is necessary, so R2 should not be too large. A practical value for R2 is 2.2 k. tPLH tPHL VOH Qn+1 OUTPUT VM VOL SV00327 1/fmax Figure 8. Waveforms showing the output Qn to output n + 1 propagation delays. VI CP INPUT VM GND tW NOTES: 1. VM = 1.5 V at VCC > 2.7 V and < 3.6 V VM = 0.5 . VCC at VCC < 2.7 V and > 4.5 V. 2. VOL and VOH are the typical output voltage drop that occur with the output load. tPLH tPHL VOH Qn OUTPUT VM VOL SV00322 Figure 6. Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency. 1998 Jun 23 12 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74LV4060 TEST CIRCUIT S1 Vcc 2 < VCC Open GND Vl NEGATIVE PULSE 90% VM RT RL = 1kΩ 100pF 10% 0V D.U.T. CL VI VM 10% RL = 1kΩ VO PULSE GENERATOR tW 90% tTHL (tf) tTLH (tr) tTLH (tr) tTHL (tf) 90% POSITIVE PULSE VI 90% VM VM 10% tW Test Circuit for Outputs 10% 0V VM = 1.5V Input Pulse Definition SWITCH POSITION TEST S1 tPLH/tPHL Open DEFINITIONS VCC RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. VI < 2.7V VCC 2.7–3.6V 2.7V ≥ 4.5 V VCC SV00910 Figure 9. Load circuitry for switching times. 1998 Jun 23 13 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator DIP16: plastic dual in-line package; 16 leads (300 mil) 1998 Jun 23 14 74LV4060 SOT38-4 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator SO16: plastic small outline package; 16 leads; body width 3.9 mm 1998 Jun 23 15 74LV4060 SOT109-1 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm 1998 Jun 23 16 74LV4060 SOT338-1 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 1998 Jun 23 17 74LV4060 SOT403-1 Philips Semiconductors Product specification 14-stage bunary ripple counter with oscillator 74LV4060 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 18 Date of release: 08-98 9397-750-04658