INTEGRATED CIRCUITS 74F283 4-bit binary full adder with fast carry Product specification IC15 Data Handbook 1989 Mar 03 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 FEATURES PIN CONFIGURATION • High speed 4-bit addition • Cascadable in 4-bit increments • Fast Internal carry look-ahead DESCRIPTION The 74F283 adds two 4-bit binary words (An plus Bn) plus the incoming carry. The binary sum appears on the sum outputs (Σ0–Σ3) and the outgoing carry (COUT) according to the equation: CIN+20(A0+B0)+21(A1+B1)+22(A2+B2)+23(A3+B3) =Σ0+2Σ1+4Σ2+8Σ3+16COUT where (+)=plus Σ1 1 16 VCC B1 2 15 B2 A1 3 14 A2 Σ0 4 13 Σ2 A0 5 12 A3 B0 6 11 CIN 7 10 Σ3 GND 8 9 B3 COUT SF00852 Due to the symmetry of the binary add function, the 74F283 can be used with either all active-High operands (positive logic) or with all active-Low operands (negative logic). See Function Table. In case of all active-Low operands (negative logic) the results Σ1–Σ4 and COUT should be interpreted also as active-Low. With active-High inputs, CIN cannot be left open; it must be held Low when no “carry in” is intended. Interchanging inputs of equal weight does not affect the operation, thus A0, B0, CIN can arbitrarily be assigned to pins 5, 6, 7, etc. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F283 6.5ns 40mA ORDERING INFORMATION Due to pin limitations, the intermediate carries of the 74F283 are not brought out for use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a carry out from, an intermediate stage. DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 16-pin plastic DIP N74F283N SOT38-4 16-pin plastic SO N74F283D SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 - A3 B0 - B3 CIN COUT Σ0–Σ3 A operand inputs B operand inputs Carry input Carry output Sum outputs 1.0/2.0 1.0/2.0 1.0/1.0 50/33 50/33 20µA/1.2mA 20µA/1.2mA 20µA/0.6mA 1.0mA/20mA 1.0mA/20mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 5 5 6 3 2 14 15 12 11 3 P 14 12 A0 B0 A1 B1 A2 B2 A3 B3 7 COUT CIN Σ0 Σ1 Σ2 3 VCC=Pin 16 GND=Pin 8 1989 Mar 03 1 13 0 4 1 Σ 9 6 Σ3 13 0 2 3 10 CO 9 Q 15 4 Σ 0 11 3 7 CI 10 SF00853 SF00854 2 853-0364 95944 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 LOGIC DIAGRAM 9 COUT B3 A3 B2 A2 B1 11 12 10 15 13 14 B0 3 CIN VCC=Pin 16 GND=Pin 8 Σ1 6 4 A0 Σ2 2 1 A1 Σ3 5 Σ0 7 SF00855 FUNCTION TABLE CIN A0 A1 A2 A3 B0 B1 B2 B3 Σ0 Σ1 Σ2 Σ3 COUT Logic levels L L H L H H L L H H H L L H Active High 0 0 1 0 1 1 0 0 1 1 1 0 0 1 Active Low 1 1 0 1 0 0 1 1 0 0 0 1 1 0 PINS H = High voltage level L = Low voltage level 1989 Mar 03 3 Example: 1001 1010 10011 (10+9=19) (carry+5+6=12) Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 they do not influence Σ2. Similarly, when A2 and B2 are the same, the carry into the third stage does not influence the carry out of the third stage. Figure C shows a method of implementing a 5-input encoder where the inputs are equally weighted. The outputs Σ0, Σ1 and Σ2 present a binary number of inputs I0–I4 that are true. Figure D shows one method of implementing a 5-input majority gate. When three or more of the inputs I0–I4 are true, the output M4 is true. Figure A shows how to make a 3-bit adder. Tying the operand inputs of the fourth adder (A3, B3) Low makes Σ3 dependent only on, and equal to, the carry from the third adder. Using somewhat the same principle, Figure B shows a way of dividing the 74F283 into a 2-bit and a 1-bit adder. The third stage adder (A2, B2, Σ2) is used as means of getting a carry (C10) signal into the fourth stage adder (via A2 and B2) and bringing out the carry from the second stage on Σ2. Note that as long as A2 and B2 are the same, whether High or Low, APPLICATIONS C10 A0 B0 A1 B1 L A0 B0 A1 B1 A2 B2 A3 B3 CIN A0 B0 A1 B1 A2 B2 A3 B3 COUT Σ0 Σ1 Σ2 CIN CIN Σ3 C3 A. A10 B10 3-bit Adder COUT Σ0 Σ1 Σ2 Σ3 Σ0 Σ1 C2 Σ10 B. 2-bit and 1-bit Adder I2 I0 I1 L I2 I3 I4 I0 A0 B0 A1 B1 A2 B2 A3 B3 CIN Σ1 Σ2 20 21 22 C. I1 I3 I4 A0 B0 A1 B1 A2 B2 A3 B3 COUT Σ0 C11 CIN Σ3 COUT Σ0 5-input Encoder Σ1 Σ2 Σ3 M4 D. 5-input Majority Gate SF00856 1989 Mar 03 4 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT V VCC Supply voltage –0.5 to +7.0 VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 40 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL LIMITS PARAMETER Min Nom Max 5.0 5.5 UNIT VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA Tamb Operating free-air temperature range 70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG MAX UNIT ±10%VCC 2.5 VIH = MIN, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX ±10%VCC 0.30 0.50 VIH = MIN, IOL = MAX ±5%VCC 0.30 0.50 –0.73 –1.2 V VCC = MAX, VI = 7.0V 100 µA VCC = MAX, VI = 2.7V 20 µA –0.6 mA High level output voltage High-level VOL O Low level output voltage Low-level VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage IIH High-level input current IIL Low level input current Low-level IOS Short-circuit output currentNO TAG VCC = MAX ICC Supply current (total)4 VCC = MAX An, Bn TYP NO TAG VCC = MIN, VIL = MAX VOH O CIN only MIN V 3.4 V VCC = MAX, MAX VI = 0 0.5V 5V –60 40 –1.2 mA –150 mA 55 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 4. ICC should be measured with all outputs open and the following conditions: Condition1: all inputs grounded Condition 2: all B inputs Low, other inputs at 4.5V Condition 3: all inputs at 4.5V 1989 Mar 03 5 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL Tamb= +25°C VCC = +5 +5.V V CL = 50pF, RL = 500Ω TEST CONDITIONS PARAMETER Tamb = 0°C to +70°C VCC = +5.V +5 V ± 10% CL = 50pF, RL = 500Ω UNIT MIN TYP MAX MIN MAX Waveform 1, 2 3.5 4.0 7.0 7.0 9.5 9.5 3.0 3.5 10.5 10.5 ns ns Propagation delay Ai or Bi to Σi Waveform 1, 2 3.5 3.5 7.0 7.0 9.5 9.5 2.5 3.5 10.5 10.5 ns ns tPLH tPHL Propagation delay CIN to COUT Waveform 2 3.5 3.0 5.7 5.4 7.5 7.0 3.5 2.5 8.5 8.0 ns ns tPLH tPHL Propagation delay Ai or Bi to COUT Waveform 1, 2 3.5 2.5 5.7 5.3 7.5 7.0 3.0 2.5 8.5 8.0 ns ns tPLH tPHL Propagation delay CIN to Σi tPLH tPHL AC WAVEFORMS For all waveforms, VM=1.5V. VM Ai, Bi, CIN Ai, Bi, CIN VM tPLH VM tPHL tPHL VM Σi, COUT VM tPLH Σi, COUT VM VM VM SF00858 SF00857 Waveform 1. Propagation Delay Operands and Carry Inputs to Outputs Waveform 2. Propagation Delay Operands and Carry Inputs to Outputs TEST CIRCUIT AND WAVEFORM VCC VIN tw 90% NEGATIVE PULSE VM D.U.T. RT CL RL AMP (V) VM 10% VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% 90% POSITIVE PULSE Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. VM VM 10% 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 1989 Mar 03 6 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 DIP16: plastic dual in-line package; 16 leads (300 mil) 1989 Mar 03 7 SOT38-4 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 SO16: plastic small outline package; 16 leads; body width 3.9 mm 1989 Mar 03 8 SOT109-1 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 NOTES 1989 Mar 03 9 Philips Semiconductors Product specification 4-bit binary full adder with fast carry 74F283 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: 1989 Mar 03 10 Date of release: 04-99 9397-750-05591