PHILIPS N74F382D

INTEGRATED CIRCUITS
74F382
Arithmetic Logic Unit
Product specification
IC15 Data Handbook
1990 Jul 12
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
FEATURES
PIN CONFIGURATION
• Performs six arithmetic and logic functions
• Selectable Low (clear) and High (preset) functions
• Low-input loading minimizes drive requirements
• Carry output for ripple expansion
• Overflow output for Two’s Complement arithmetic
DESCRIPTION
The 74F382 performs three arithmetic and three logic operations on
two 4-bit words, A and B. Two additional Select (S0–S2) input codes
force the Function outputs Low or High. An overflow output is
provided for convenience in Two’s Complement arithmetic.
A1 1
20 V
CC
B1 2
19 A2
A0 3
18 B2
B0 4
17 A3
S0 5
16 B3
S1 6
15 Cn
S2 7
14 Cn+4
8
13 OVR
F0
F1 9
12 F3
GND 10
11 F2
A carry output is provided for ripple expansion. For high-speed
expansion using a carry look-ahead generator, refer to the 74F381
data sheet.
SF00935
Signals applied to the Select inputs, S0–S2, determine the mode of
operation, as indicated in the Function Select Table. An extensive
listing of input and output levels is shown in the Function Table. The
circuit performs the arithmetic functions for either active-HIgh or
active-Low operands, with output levels in the same convention. In
the subtract operating modes, it is necessary to force a carry (High
for active-HIgh operands, Low for active-Low operands) into the Cn
input of the least significant package. Ripple expansion is illustrated
in Figure 1. The overflow output OVR is the Exclusive-OR of Cn+3
and Cn+4; a High signal on OVR indicates overflow in Two’s
complement operation (See Table 2 for Two’s complement
arithmetic). Typical delays for Figure 1 are given in Table 1. When
the 74F382 is cascaded to handle word lengths longer than 4 bits,
only the most significant overflow (OVR) output is used.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT (TOTAL)
7.0ns
54mA
74F382
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
PKG DWG #
20-pin plastic DIP
N74F382N
SOT146-1
20-pin plastic SO
N74F382D
SOT163-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 – A3
A operand inputs
1.0/4.0
20µA/2.4mA
B0 – B3
B operand inputs
1.0/4.0
20µA/2.4mA
S0 – S2
Function select inputs
1.0/1.0
20µA/0.6mA
Carry input
1.0/5.0
20µA/3.0mA
Cn+4
Carry output
50/33
1.0mA/20mA
OVR
Overflow output
50/33
1.0mA/20mA
50/33
1.0mA/20mA
Cn
F0–F3
Outputs
NOTE:
One (1.0) FAST unit load is defined as 20µA in the High state and 0.6mA in the Low state.
1990 Jul 12
2
853–0419 99966
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
LOGIC SYMBOL
IEC/IEEE SYMBOL
5
3
4
1
2
19 18 17 16
Cn
5
S0
6
S1
7
S2
OVR
Cn+4
2
15
3 Cl
13
14
3
P
4
Q
1
2
19
8
9
0
7
(1/2) Bl
F0 F1 F2 F3
VCC = Pin 20
GND = Pin 10
M
7
A0 B0 A1 B1 A2 B2 A3 B3
15
ALU
0
6
11 12
18
SF00936
17
16
P
Q
P
8
[1]
9
[2]
Q
[4]
BO/CO
P
BO/CO
Q
[8]
11
=1
13
14
(1/2)BO
3CO
12
SF00937
1990 Jul 12
3
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
LOGIC DIAGRAM
Cn
A0
15
3
8
B0
A1
F0
4
1
9
B1
A2
F1
2
19
11 F2
B2
A3
18
17
12
B3
S0
16
13
OVR
5
14
S1
F3
Cn+4
6
7
S2
VCC = Pin 20
GND = Pin 10
1990 Jul 12
SF00938
4
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
FUNCTION TABLE
INPUTS
OUTPUTS
S0
S1
S2
Cn
An
Bn
F0
F1
F2
F3
OVR
Cn+4
L
L
L
L
X
X
L
L
L
L
H
H
L
L
L
H
X
X
L
L
L
L
H
H
H
L
L
L
L
L
H
H
H
H
L
L
H
L
L
L
L
H
L
H
H
H
L
H
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
H
H
H
H
H
L
L
H
L
L
H
L
L
L
L
L
L
L
H
H
L
L
H
L
H
H
H
H
H
L
H
H
L
L
H
H
L
H
L
L
L
L
L
H
L
L
H
H
H
L
L
L
L
L
H
L
H
L
L
L
L
H
H
H
H
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
H
L
L
H
H
H
L
H
L
H
L
L
H
H
H
H
H
H
L
L
L
H
L
H
L
L
L
L
L
L
L
H
L
H
L
H
L
H
H
L
L
L
L
L
L
H
L
H
H
L
H
H
H
H
L
H
L
H
L
H
H
H
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
H
H
L
H
H
H
L
H
L
L
H
L
L
L
L
L
H
H
L
H
L
H
L
L
L
L
L
H
H
H
L
H
H
L
L
L
L
L
L
H
H
H
L
H
H
H
H
H
H
H
L
H
L
L
H
X
L
L
L
L
L
L
L
L
L
L
H
X
L
H
H
H
H
H
L
L
L
L
H
L
H
L
H
H
H
H
L
L
L
L
H
X
H
H
L
L
L
L
H
H
L
L
H
H
H
L
H
H
H
H
H
H
H
L
H
X
L
L
L
L
L
L
L
L
H
L
H
X
L
H
H
H
H
H
L
L
H
L
H
X
H
L
H
H
H
H
L
L
H
L
H
L
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
X
L
L
L
L
L
L
H
H
L
H
H
X
L
H
L
L
L
L
L
L
L
H
H
X
H
L
L
L
L
L
H
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
L
L
H
H
H
H
L
L
H
H
H
X
L
H
H
H
H
H
L
L
H
H
H
X
H
L
H
H
H
H
L
L
H
H
H
L
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H = High voltage level
L = Low voltage level
X = Don’t care
1990 Jul 12
5
OPERANDS
OPERATING
MODE
Clear
Active Low
Active-Low
B minus A
Active High
Active-High
Active Low
Active-Low
A minus B
Active High
Active-High
A Plus B
AB
A+B
AB
Preset
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
FUNCTION SELECT TABLE
Table 2. Two’s Complement Arithmetic
SELECT
S1
S2
OPERATING
MODE
MSB
S0
LSB
Numerical Values
L
L
L
L
L
Clear
L
L
L
L
0
L
H
H
L
L
B minus A
L
1
L
H
L
L
H
L
A minus B
2
L
L
H
H
H
H
L
3
A Plus B
L
L
L
H
L
L
4
H
AB
L
H
L
H
H
5
L
H
A+B
L
H
H
L
L
6
H
H
AB
L
H
H
H
7
H
Preset
H
L
L
L
–8
H
L
L
H
–7
H
L
H
L
–6
H
L
H
H
–5
H
H
L
L
–4
H
H
H = High voltage level
L = Low voltage level
Table 1. 16-Bit Delay Tabulation
PATH SEGMENT
TOWARD
F
OUTPUT
Cn+4, OVR
H
H
L
H
–3
Ai or Bi to Cn+4
6.5ns
6.5ns
H
H
H
L
–2
Cn to Cn+4
6.3ns
6.3ns
H
H
H
–1
Cn to Cn+4
6.3ns
6.3ns
Cn to F
8.1ns
–
Cn to Cn+4, OVR
–
8.0ns
Total Delay
27.2ns
27.1ns
H
H = High voltage level
L = Low voltage level
APPLICATION
A0–A3
B0–B3
4
4
A
CIN
B
A
S
F
SELECT
A8–A11
4
B8–B11
4
B
S
F
B
A
74F382
3
4
B
Cn+4
Cn
S
F
3
B12–B15
4
Cn+4
Cn
74F382
A12–A15
4
A
Cn+4
Cn
74F382
3
B4–B7
4
Cn+4
Cn
S
A4–A7
COUT
74F382
F
OVR
OVERFLOW
3
3
F0–F3
F4–F7
F8–F11
F12–F15
SF00939
Figure 1. 16-bit Look-ahead Carry ALU Expansion
1990 Jul 12
6
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
VCC
Supply voltage
–0.5 to +7.0
V
VIN
Input voltage
–0.5 to +7.0
V
IIN
Input current
–30 to +1
mA
VOUT
Voltage applied to output in High output state
–0.5 to +VCC
V
IOUT
Current applied to output in Low output state
40
mA
Tamb
Operating free-air temperature range
0 to +70
°C
Tstg
Storage temperature range
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARMETER
SYMBOL
MIN
NOM
MAX
5.0
5.5
UNIT
VCC
Supply voltage
4.5
VIH
High-level input voltage
2.0
V
VIL
Low-level input voltage
0.8
V
IIK
Input clamp current
–18
mA
IOH
High-level output current
–1
mA
IOL
Low-level output current
20
mA
Tamb
Operating free-air temperature range
70
°C
V
0
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
VOH
TEST
PARAMETER
LIMITS
CONDITIONS1
MIN
±10%VCC
2.5
VIH = MIN, IOH = MAX
±5%VCC
2.7
VCC = MIN, VIL = MAX,
±10%VCC
0.30
0.50
V
VIH = MIN, IOL = MAX
±5%VCC
0.30
0.50
V
–0.73
–1.2
V
100
µA
Low level output voltage
Low-level
VIK
Input clamp voltage
VCC = MIN, II = IIK
II
Input current at maximum input voltage
VCC = MAX, VI = 7.0V
IIH
High-level input current
VCC = MAX, VI = 2.7V
Cn
Low-level input current
A0–A3, B0–B3
VCC = MAX, VI = 0.5V
S0, S1, S2
IOS
Short-circuit output
current3
UNIT
MAX
VCC = MIN, VIL = MAX,
High level output voltage
High-level
VOL
O
IIL
TYP2
VCC = MAX
–60
V
3.4
V
20
µA
–3.0
mA
–2.4
mA
–0.6
mA
–150
mA
ICC
Supply current (total)
VCC = MAX
54
81
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
1990 Jul 12
7
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation delay
Cn to Fn
Waveform 1
3.0
2.5
7.0
4.5
12.0
6.5
2.5
2.5
13.5
7.5
ns
tPLH
tPHL
Propagation delay
An or Bn to Fn
Waveform 1
3.5
3.0
8.0
6.0
13.5
10.0
3.5
2.5
17.0
11.0
ns
tPLH
tPHL
Propagation delay
Si to Fi
Waveform 1
5.5
5.5
9.0
7.5
15.0
10.5
5.5
5.5
16.0
12.0
ns
tPLH
tPHL
Propagation delay
Ai to Bi to Cn+4
Waveform 1
3.5
3.5
7.0
6.5
10.5
9.5
3.5
3.5
11.5
10.5
ns
tPLH
tPHL
Propagation delay
Si to OVR or Cn+4
Waveform 1
7.0
5.0
10.5
8.0
14.5
11.0
6.5
5.0
17.0
12.0
ns
tPLH
tPHL
Propagation delay
Cn to Cn+4
Waveform 1
3.0
3.5
4.5
5.0
6.0
6.5
2.5
3.5
6.5
7.0
ns
tPLH
tPHL
Propagation delay
Cn to OVR
Waveform 1
4.5
3.0
9.0
5.0
13.5
6.5
4.0
3.0
15.0
7.0
ns
tPLH
tPHL
Propagation delay
Ai or Bi to OVR
Waveform 1
6.0
3.5
9.0
6.5
12.5
9.0
5.5
3.5
16.5
10.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
VIN
VM
VM
tPLH
VOUT
tPHL
VM
VM
SF00940
Waveform 1. Propagation Delay for Non-Inverting
or Inverting paths
1990 Jul 12
8
Philips Semiconductors
Product specification
Arithmetic logic unit
74F382
TEST CIRCUIT AND WAVEFORM
VCC
NEGATIVE
PULSE
VIN
tw
90%
VM
D.U.T.
RT
CL
RL
AMP (V)
VM
10%
VOUT
PULSE
GENERATOR
90%
10%
tTHL (tf )
tTLH (tr )
tTLH (tr )
tTHL (tf )
0V
AMP (V)
90%
90%
POSITIVE
PULSE
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
VM
VM
10%
Test Circuit for Totem-Pole Outputs
10%
tw
0V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude VM
74F
3.0V
1.5V
rep. rate
tw
tTLH
tTHL
1MHz
500ns
2.5ns
2.5ns
SF00006
1990 Jul 12
9
Philips Semiconductors
Product specification
Arithmetic Logic Unit
74F382
DIP20: plastic dual in-line package; 20 leads (300 mil)
1990 Jul 12
10
SOT146-1
Philips Semiconductors
Product specification
Arithmetic Logic Unit
74F382
SO20: plastic small outline package; 20 leads; body width 7.5 mm
1990 Jul 12
11
SOT163-1
Philips Semiconductors
Product specification
Arithmetic Logic Unit
74F382
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Document order number:
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12
Date of release: 10-98
9397-750-05124