PHILIPS 74AVCH16245

INTEGRATED CIRCUITS
DATA SHEET
74AVCH16245
16-bit transceiver with direction pin;
3.6 V tolerant; 3-state
Product Specification
File under Integrated Circuits, IC24
2000 Mar 07
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.2 to 3.6 V
The 74AVCH16245 is a 16-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The device features two output
enable inputs (nOE) for easy cascading and two
send/receive inputs (nDIR) for direction control.
Inputs nOE control the outputs so that the buses are
effectively isolated. This device can be used as two 8-bit
transceivers or one 16-bit transceiver.
• Complies with JEDEC standard no. 8-1A/5/7
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• Dynamic Controlled Output (DCO) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
• Low inductance multiple VCC and GND pins to minimize
noise and ground bounce
The 74AVCH16245 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
• Supports Live Insertion
• All inputs have bus-hold.
To ensure the high-impedance output state during
power-up or power-down, pins nOE should be tied to VCC
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
The 74AVCH16245 has active bus-hold circuitry to hold
unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or
pull-down resistors.
MNA507
MNA506
300
0
handbook, halfpage
handbook, halfpage
I OL
(mA)
I OH
(mA)
3.3 V
1.8 V
−100
200
2.5 V
2.5 V
−200
100
1.8 V
3.3 V
−300
Fig.1
0
0
1
2
3
VOH (V)
0
4
Output voltage as a function of the
HIGH-level output current.
2000 Mar 07
Fig.2
2
1
2
3
VOL (V)
Output voltage as a function of the
LOW-level output current.
4
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns.
SYMBOL
tPHL/tPLH
PARAMETER
CONDITIONS
propagation delay nAn to nBn;
nBn to nAn
CI
input capacitance
CPD
power dissipation capacitance per
buffer
TYP.
UNIT
VCC = 1.2 V
5.4
ns
VCC = 1.5 V
3.1
ns
VCC = 1.8 V
2.3
ns
VCC = 2.5 V
1.6
ns
VCC = 3.3 V
1.4
ns
5.0
pF
outputs enabled
42
pF
outputs disabled
2
pF
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
∑ (CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC.
FUNCTION TABLE
See note 1.
INPUTS
nOE
INPUTS/OUTPUTS
nDIR
nBn
L
L
A=B
inputs
L
H
inputs
B=A
H
X
Z
Z
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high impedance OFF-state.
2000 Mar 07
nAn
3
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
ORDERING AND PACKAGE INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
−40 to +85 °C
48
TSSOP
plastic
SOT362-1
74AVC16245DGG
PINNING
PIN
SYMBOL
DESCRIPTION
1
1DIR
direction control
2, 3, 5, 6, 8, 9, 11 and 12
1B0 to 1B7
data inputs/outputs
4, 10, 15, 21, 28, 34, 39 and 45
GND
ground (0 V)
7, 18, 31 and 42
VCC
DC supply voltage
13, 14, 16, 17, 19, 20, 22 and 23
2B0 to 2B7
data inputs/outputs
24
2DIR
direction control
25
2OE
output enable input (active LOW)
26, 27, 29, 30, 32, 33, 35 and 36
2A7 to 2A0
data inputs/outputs
37, 38, 40, 41, 43, 44, 46 and 47
1A7 to 1A0
data inputs/outputs
48
1OE
output enable input (active LOW)
2000 Mar 07
4
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
handbook, halfpage
1DIR
1
48 1OE
1B0
2
47 1A0
1B1
3
46 1A1
GND
4
45 GND
1B2
5
44 1A2
1B3
6
43 1A3
VCC
7
42 VCC
1B4
8
41 1A4
1B5
9
40 1A5
48
1OE
1
1DIR
25
2OE
24
2DIR
1A0
47
G3
3EN1[BA]
3EN2[AB]
G6
6EN1[BA]
6EN2[AB]
1A1
1B6 11
38 1A6
1B7 12
37 1A7
1A3
36 2A0
1A4
16245
2B0 13
2B1 14
35 2A1
GND 15
34 GND
2B2 16
33 2A2
2B3 17
32 2A3
1A2
1A5
1A6
1A7
2A0
2A1
2A2
2B4 19
30 2A4
2B5 20
29 2A5
2A4
GND 21
28 GND
2A5
2A3
2A6
2B6 22
27 2A6
2B7 23
26 2A7
2DIR 24
25 2OE
46
3
44
5
43
6
41
8
40
9
38
11
37
12
36
13
4
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
5
31 VCC
VCC 18
1B0
2
39 GND
GND 10
2
1
2A7
35
14
33
16
32
17
30
19
29
20
27
22
26
23
2B1
2B2
2B3
2B4
2B5
2B6
2B7
MNA003
MNA508
Fig.3 Pin configuration.
2000 Mar 07
Fig.4 IEEE/IEC logic symbol.
5
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
handbook, full pagewidth
1
1DIR
24
1OE
47
46
44
2B4
29
2B5
27
2B6
26
1B7
20
2A6
11
1A7
19
2A5
9
1A6
17
2A4
8
1A5
1B6
37
2B3
30
16
2A3
6
1A4
1B5
38
2B2
32
14
2A2
5
1A3
1B4
40
2B1
33
13
2A1
3
1A2
1B3
41
2B0
35
25
2A0
2
1A1
1B2
43
2OE
36
1B1
2DIR
48
1A0
1B0
74AVCH16245
22
2A7
2B7
12
23
MNA509
Fig.5 Logic symbol.
2000 Mar 07
6
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
DC supply voltage
CONDITIONS
according to JEDEC Low Voltage
Standards
DC input voltage
VO
DC output voltage
MAX.
UNIT
1.4
1.6
V
1.65
1.95
V
2.3
2.7
V
3.0
3.6
V
1.2
3.6
V
0
3.6
V
output 3-state
0
3.6
V
output HIGH or LOW state
0
VCC
V
−40
+85
°C
for low-voltage applications
VI
MIN.
Tamb
operating ambient temperature
in free air
tr, tf
input rise and fall ratios
VCC = 1.4 to 1.6 V
0
40
ns/V
VCC = 1.65 to 2.3 V
0
30
ns/V
VCC = 2.3 to 3.0 V
0
20
ns/V
VCC = 3.0 to 3.6 V
0
10
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
VCC
DC supply voltage
CONDITIONS
MIN.
MAX.
UNIT
−0.5
+4.6
V
IIK
DC input diode current
VI < 0
−
−50
mA
VI
DC input voltage
for inputs; note 1
−0.5
+4.6
V
IOK
DC output clamping diode
current
VO < 0
−
−50
mA
VO
DC output voltage
IO
DC output sink current
ICC, IGND
DC VCC or GND current
Tstg
storage temperature
Ptot
power dissipation per package
output HIGH or LOW state; note 1
−0.5
VCC + 0.5 V
output 3-state; note 1
−0.5
+4.6
V
VO = 0 to VCC
−
50
mA
−
±100
mA
−65
+150
°C
−
500
mW
for temperature range:
−40 to +85 °C; note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of PD derates linearly with 5.5 mW/K.
2000 Mar 07
7
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
DC CHARACTERISTICS
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb = −40 to +85 °C
TEST CONDITIONS
SYMBOL
PARAMETER
OTHER
VIH
VIL
VOH
VOL
HIGH-level input
voltage
LOW-level output
voltage
TYP.(1)
MIN.
UNIT
MAX.
VCC
−
−
V
1.4 to 1.6
0.65 × VCC
0.9
−
V
1.65 to 1.95
0.65 × VCC
0.9
−
V
2.3 to 2.7
1.7
1.2
−
V
1.2
3.0 to 3.6
2.0
1.5
−
V
1.2
−
−
GND
V
1.4 to 1.6
−
0.9
0.35 × VCC
V
1.65 to 1.95
−
0.9
0.35 × VCC
V
2.3 to 2.7
−
1.2
0.7
V
3.0 to 3.6
−
1.5
0.8
V
IO = −100 µA
1.65 to 3.6
VCC − 0.20
VCC
−
V
IO = −3 mA
1.4
VCC − 0.35
VCC − 0.21 −
V
IO = −4 mA
1.65
VCC − 0.45
VCC − 0.25 −
V
IO = −8 mA
2.3
VCC − 0.55
VCC − 0.37 −
V
IO = −12 mA
3.0
VCC − 0.70
VCC − 0.47 −
V
LOW-level input
voltage
HIGH-level output
voltage
VCC (V)
VI = VIH or VIL
VI = VIH or VIL
IO = 100 µA
1.65 to 3.6
−
GND
0.20
V
IO = 3 mA
1.4
−
0.22
0.35
V
IO = 4 mA
1.65
−
0.24
0.45
V
IO = 8 mA
2.3
−
0.38
0.55
V
IO = 12 mA
3.0
−
0.53
0.70
V
II
input leakage
current
VI = VCC or GND
1.4 to 3.6
−
0.1
2.5
µA
Ioff
power-off leakage
current
VI or VO = 3.6 V
0
−
0.1
±10
µA
IIHZ/IILZ
input current for
common I/O pins
VI = VCC or GND
1.4 to 3.6
−
0.1
12.5
µA
IOZ
3-state output
OFF-state current
VI = VIH or VIL;
VO = VCC or GND
1.4 to 2.7
−
0.1
5
µA
3.0 to 3.6
−
0.1
10
µA
ICC
quiescent supply
current
VI = VCC or GND;
IO = 0
1.4 to 2.7
−
0.1
20
µA
3.0 to 3.6
−
0.2
40
µA
bus-hold LOW
sustaining current
VI = 0.35 × VCC
1.65
25
−
−
µA
VI = 0.7 V
2.3
45
−
−
µA
VI = 0.8 V
3.0
75
−
−
µA
VI = 0.65 × VCC
1.65
−25
−
−
µA
2.3
−45
−
−
µA
3.0
−75
−
−
µA
IBHL
IBHH
2000 Mar 07
bus-hold HIGH
sustaining current
8
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
Tamb = −40 to +85 °C
TEST CONDITIONS
SYMBOL
PARAMETER
OTHER
IBHLO
IBHHO
bus-hold LOW
overdrive current
bus-hold HIGH
overdrive current
VCC (V)
TYP.(1)
MIN.
UNIT
MAX.
1.95
200
−
−
µA
2.7
300
−
−
µA
3.6
450
−
−
µA
1.95
−200
−
−
µA
2.7
−300
−
−
µA
3.6
−450
−
−
µA
Note
1. All typical values are measured at Tamb = 25 °C.
2000 Mar 07
74AVCH16245
9
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns.
Tamb = −40 to +85 °C
TEST CONDITIONS
SYMBOL
PARAMETER
WAVEFORMS
tPHL/tPLH
tPZH/tPZL
tPHZ/tPLZ
propagation delay; nAn to nBn;
nBn to nAn
3-state output enable time;
nOE to nAn; nOE to nBn
see Figs 6 and 8
see Figs 7 and 8
3-state output disable time;
nOE to nAn; nOE to nBn
see Figs 7 and 8
VCC (V)
MIN.
TYP.(1)
1.2
−
5.4
−
ns
1.40 to 1.60
−
3.1
−
ns
1.65 to 1.95
1.4
2.3
3.3
ns
2.3 to 2.7
0.5
1.6
2.2
ns
3.0 to 3.6
0.7
1.4
2.0
ns
1.2
−
7.4
−
ns
1.40 to 1.60
−
6.4
−
ns
1.65 to 1.95
1.4
4.4
7.0
ns
2.3 to 2.7
1.0
2.8
4.3
ns
3.0 to 3.6
0.7
2.3
3.7
ns
1.2
−
7.3
−
ns
1.40 to 1.60
−
5.7
−
ns
1.65 to 1.95
2.2
4.2
7.0
ns
2.3 to 2.7
1.1
2.3
5.4
ns
3.0 to 3.6
1.2
2.5
3.9
ns
Note
1. All typical values are measured at Tamb = 25 °C and at VCC respectively 1.2, 1.5, 1.8, 2.5 and 3.3 V.
AC WAVEFORMS
handbook, halfpage VI
nAn, nBn
VM
input
GND
t PHL
t PLH
VOH
nBn, nAn
VM
output
VOL
VCC
VM
VCC
0.5 × VCC
VCC
3.0 to 3.6 V
MNA511
VI
≤2.3 to 2.7 V 0.5 × VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input (nAn, nBn) to output (nBn, nAn) propagation delay.
2000 Mar 07
10
UNIT
MAX.
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
VI
handbook, full pagewidth
nOE input
VM
GND
t PLZ
t PZL
VCC
output
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
t PZH
t PHZ
VOH
VY
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
outputs
enabled
outputs
enabled
outputs
disabled
MNA478
VM
VCC
VX
≤2.3 to 2.7 V 0.5 × VCC
0.5 × VCC
3.0 to 3.6 V
VY
VI
VOL + 0.15 V VOH − 0.15 V VCC
VOL + 0.3 V
VOH − 0.3 V
VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 The 3-state enable and disable times.
S1
handbook, full pagewidth
VCC
VI
PULSE
GENERATOR
2 × VCC
open
GND
R load
VO
D.U.T.
CL
RT
R load
MNA505
VCC (V)
TEST
S1
VI
Rload
CL
1.2
VCC
2000 Ω
15 pF
1.4 to 1.6
VCC
2000 Ω
15 pF
tPLH/tPHL
open
1.65 to 1.95
VCC
1000 Ω
30 pF
tPLZ/tPZL
2 × VCC
2.3 to 2.7
VCC
500 Ω
30 pF
tPHZ/tPZH
GND
3.0 to 3.6
VCC
500 Ω
30 pF
Fig.8 Load circuitry for switching times.
2000 Mar 07
11
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
PACKAGE OUTLINE
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
E
D
A
X
c
HE
y
v M A
Z
48
25
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
detail X
24
w M
bp
e
2.5
0
5 mm
scale
DIMENSIONS (mm are the original dimensions).
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z
θ
mm
1.2
0.15
0.05
1.05
0.85
0.25
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
0.5
8.3
7.9
1
0.8
0.4
0.50
0.35
0.25
0.08
0.1
0.8
0.4
8
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT362-1
2000 Mar 07
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-02-10
99-12-27
MO-153
12
o
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
SOLDERING
74AVCH16245
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Mar 07
13
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
74AVCH16245
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
REFLOW(1)
WAVE
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable(2)
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not
PLCC(3), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
2000 Mar 07
14
Philips Semiconductors
Product Specification
16-bit transceiver with direction pin; 3.6 V tolerant;
3-state
NOTES
2000 Mar 07
15
74AVCH16245
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SCA 69
© Philips Electronics N.V. 2000
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Printed in The Netherlands
245004/01/pp16
Date of release: 2000
Mar 07
Document order number:
9397 750 06761