DISCRETE SEMICONDUCTORS DATA SHEET M3D427 BLF2048 UHF push-pull power LDMOS transistor Preliminary specification Supersedes data of 1999 Dec 01 2000 Feb 17 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor FEATURES BLF2048 PINNING - SOT539A • High power gain PIN DESCRIPTION • Easy power control 1 drain 1 • Excellent ruggedness 2 drain 2 • Source on underside eliminates DC isolators, reducing common mode inductance 3 gate 1 4 gate 2 5 source connected to flange • Designed for broadband operation (HF to 2.2 GHz). APPLICATIONS • Common source class-AB operation for PCN and PCS applications in the 1800 to 2200 MHz frequency range. 1 2 DESCRIPTION 3 4 5 Push-pull silicon N-channel enhancement mode lateral D-MOS transistor encapsulated in a 4-lead flange package (SOT539A) with a ceramic cap. The common source is connected to the mounting flange. Top view MBK880 Fig.1 Simplified outline. QUICK REFERENCE DATA RF performance at Th = 25 °C in a common source test circuit. f (MHz) MODE OF OPERATION 2-tone, class-AB f1 = 2200; f2 = 2200.1 VDS (V) PL (W) Gp (dB) ηD (%) dim (dBc) 26 120 (PEP) >10 >30 ≤−26 28 140 (PEP) typ. 11.2 typ. 31 typ. −25 MIN. MAX. UNIT LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER VDS drain-source voltage − 65 V VGS gate-source voltage − ±15 V ID drain current (DC) − 18 A Tstg storage temperature −65 +150 °C Tj junction temperature − 200 °C CAUTION This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B. 2000 Feb 17 2 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor BLF2048 THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth j-mb thermal resistance from junction to mounting-base PL = 120 W; Tmb = 50 °C, note 1 0.35 K/W Rth mb-h thermal resistance from mounting-base to heatsink 0.15 K/W MAX. UNIT Note 1. Thermal resistance is determined under nominal 2-tone RF operating conditions. CHARACTERISTICS Tj = 25 °C; per section unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. V(BR)DSS drain-source breakdown voltage VGS = 0; ID = 1.4 mA 65 − − V VGSth gate-source threshold voltage VDS = 10 V; ID = 140 mA 1.5 − 3.5 V IDSS drain-source leakage current VGS = 0; VDS = 26 V − − 10 µA IDSX drain cut-off current VGS = VGSth + 9 V; VDS = 10 V 18 − − A IGSS gate leakage current VGS = ±15 V; VDS = 0 − − 250 nA gfs forward transconductance VDS = 10 V; ID = 5 A − 4 − S RDSon drain-source on-state resistance VGS = VGSth + 9 V; ID = 5 A − 0.17 − Ω Crs feedback capacitance VGS = 0; VDS = 26 V; f = 1 MHz; note 1 − 3.4 − pF Note 1. Capacitance of die only. APPLICATION INFORMATION RF performance in a common source class-AB circuit. Th = 25 °C; Rth j-h = 0.5 K/W; unless otherwise specified. MODE OF OPERATION 2-tone, class-AB f (MHz) VDS (V) IDQ (mA) PL (W) Gp (dB) ηD (%) dim (dBc) f1 = 2200; f2 = 2200.1 26 2 x 400 120 (PEP) >10 >30 ≤−26 28 2 x 400 140 (PEP) typ. 11.2 typ. 31 typ. −25 Ruggedness in class-AB operation The BLF2048 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: VDS = 26 V; f = 2200 MHz, PL = 120 W (CW). 2000 Feb 17 3 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor MGT007 20 handbook, halfpage 50 Gp VDS = 26 V (dB) 16 BLF2048 MGT008 20 ηD handbook, halfpage (%) (dB) 50 ηD (%) Gp 40 16 30 12 VDS = 26 V 40 28 V 28 V Gp Gp 12 30 28 V 28 V ηD 26 V 26 V 8 4 0 0 40 80 120 20 8 10 4 0 160 200 PL (PEP) (W) 0 Fig.3 MGT009 −10 dim (dBc) 0 160 200 PL (PEP) (W) Power gain and drain efficiency as functions of peak envelope load power; typical values. MGT010 VDS = 26 V −20 28 V −30 d3 d3 28 V −40 d5 80 120 26 V −40 26 V 40 28 V d5 −50 −60 160 200 PL (PEP) (W) 0 40 80 f1 = 2000 MHz; f2 = 2000.1 MHz; IDQ = 2 x 400 mA; Th ≤ 25 °C. f1 = 2200 MHz; f2 = 2200.1 MHz; IDQ = 2 x 400 mA; Th ≤ 25 °C. Fig.4 Fig.5 Intermodulation distortion as a function of peak envelope load power; typical values. 2000 Feb 17 120 dim (dBc) 28 V 0 80 −10 VDS = 26 V −20 −60 40 handbook, halfpage handbook, halfpage −50 10 f1 = 2200 MHz; f2 = 2200.1 MHz; IDQ = 2 x 400 mA; Th ≤ 25 °C. Power gain and drain efficiency as functions of peak envelope load power; typical values. −30 ηD 0 f1 = 2000 MHz; f2 = 2000.1 MHz; IDQ = 2 x 400 mA; Th ≤ 25 °C. Fig.2 20 4 120 160 200 PL (PEP) (W) Intermodulation distortion as a function of peak envelope load power; typical values. Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor MGT011 8 BLF2048 MGT012 8 handbook, halfpage handbook, halfpage Zi ZL (Ω) (Ω) 4 ri 4 RL 0 xi 0 XL −4 −4 1.6 1.8 2 2.2 2.4 −8 1.6 2.6 f (GHz) 1.8 2 2.2 2.4 2.6 f (GHz) VDS = 26 V; IDQ = 2 x 400 mA; PL = 160 W (total device); Th ≤ 25 °C. VDS = 26 V; IDQ = 2 x 400 mA; PL = 160 W (total device); Th ≤ 25 °C. Fig.6 Fig.7 Input impedance per section as a function of frequency (series components); typical values. 2000 Feb 17 5 Load impedance per section as a function of frequency (series components); typical values. Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor BLF2048 VBIAS handbook, full pagewidth R1 P1 R5 C9 C8 C20 C21 C22 L23 L12 C7 C6 R2 C19 L10 L14 L8 C23 C24 VDS L24 L20 L2 L6 input 50 Ω L16 L18 L4 C1 C17 L1 B3 B1 C3 C4 C5 C14 C15 C16 L22 output 50 Ω B4 B2 L5 C2 L19 L17 L7 L21 L3 L9 L15 L11 C25 R4 P2 C13 C12 C18 C11 C10 L13 L25 L26 C26 C27 C28 C29 C30 R6 R3 VDS MGT013 VBIAS Fig.8 2.2 GHz class-AB test circuit. List of components (see Figs 8 and 9) COMPONENT DESCRIPTION VALUE C1, C2 multilayer ceramic chip capacitor; note 1 5.1 pF C3, C5 Tekelec variable capacitor 0.6 to 4.5 pF C4 Tekelec variable capacitor + multilayer ceramic chip capacitor; note 1 0.6 to 4.5 pF + 2.4 pF C6, C10 multilayer ceramic chip capacitor; note 2 100 pF C7, C11 multilayer ceramic chip capacitor; note 2 18 pF C8, C12, C23, C29 tantalum SMD capacitor 4.7 µF; 35 V C9, C13, C24, C30 tantalum SMD capacitor 10 µF; 35 V C14 multilayer ceramic chip capacitor; note 3 0.5 pF C15 multilayer ceramic chip capacitor; note 3 1 pF C16 multilayer ceramic chip capacitor; note 1 1.5 pF C17, C18 multilayer ceramic chip capacitor; note 1 10 pF C19, C25 MKT ceramic chip capacitor 33 nF C20, C26 multilayer ceramic chip capacitor; note 2 6.2 pF C21, C27 multilayer ceramic chip capacitor 100 nF 2000 Feb 17 6 DIMENSIONS CATALOGUE NO. 2222 370 11333 2222 581 16641 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor COMPONENT DESCRIPTION BLF2048 VALUE DIMENSIONS C22, C28 multilayer ceramic chip capacitor; note 1 8.2 pF L1 stripline; note 4 47 Ω L2, L3, L20, L21 stripline; note 4 15 × 2 mm L4, L5 stripline; note 4 5.6 × 2.6 mm L6, L7 stripline; note 4 2.6 × 5.8 mm L8, L9 stripline; note 4 11.5 × 12 mm L10, L11 stripline; note 4 2.2 × 16 mm L12, L13 stripline; note 4 L14, L15 stripline; note 4 10.4 × 13.7 mm L16, L17 stripline; note 4 6.6 × 5.5 mm L18, L19 stripline; note 4 7 × 2.6 mm L22 stripline; note 4 47 Ω 4 x 1 mm L23, L25 stripline; note 4 47 Ω 1/4 λ at 2.2 GHz L24, L26 1 turn enamelled 0.7 mm copper wire B1, B4 balun of semi-rigid cable 50 Ω B2, B3 semi-rigid cable; note 5 50 Ω R1, R3, R5, R6 metal film resistor 5.6 Ω, 0.6 W R2, R4 metal film resistor 10 Ω, 0.6 W P1, P2 variable resistor (multiturn) 5 kΩ 57 Ω CATALOGUE NO. 4.5 × 1 mm 1/4 λ at 2.2 GHz int.dia. 7 mm; length: tbf Notes 1. American Technical Ceramics type 100B or capacitor of same quality. 2. American Technical Ceramics type 100A or capacitor of same quality. 3. American Technical Ceramics type 180R or capacitor of same quality. 4. Semi-rigid cable soldered along the stub to establish balance. 5. The striplines are on a double copper-clad printed-circuit board with Teflon dielectric (εr = 6.15); thickness 0.64 mm. 2000 Feb 17 7 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor handbook, full pagewidth BLF2048 40 40 60 P1 R1 VBIAS VDS R5 C8 C9 C20 R2 C6 C7 L12 L14 PHILIPS L4 L1 C2 C3 L5 C4 B2,L3 C5 L7 BLF2048 C19 L6 L6 B1,L2 C13 R4 L22 C14 C14 L17 C15 L19 C18 B4,L21 L13 L25 C27 L11 C28 C26 R6 R3 L18 C17 C16 L15 C12 P2 B3,L20 L16 C25 L9 C11 C10 C22 C23 C24 L23 C21 L10 L8 C1 L24 C29 C30 L26 VDS VBIAS MGT014 Dimensions in mm. The components are situated on one side of the copper-clad printed-circuit board with Teflon dielectric (εr = 6.15), thickness 0.64 mm. The other side is unetched and serves as a ground plane. Fig.9 Component layout for 2.2 GHz class-AB test circuit. 2000 Feb 17 8 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor BLF2048 PACKAGE OUTLINE Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A Package under development Philips Semiconductors reserves the right to make changes without notice. D A F D1 U1 B q C w2 M C M H1 1 c 2 E1 p H U2 5 L 3 A E w1 M A M B M 4 w3 M b Q e 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c D D1 e E E1 9.50 5.33 11.81 0.15 31.55 31.52 13.72 9.30 3.96 11.56 0.08 30.94 30.96 mm inches 9.53 9.27 F H H1 L 1.75 17.12 25.53 3.73 1.50 16.10 25.27 2.72 p Q q 3.30 3.05 2.31 2.01 35.56 U1 U2 w1 41.28 10.29 0.25 41.02 10.03 w2 w3 0.51 0.25 0.210 0.465 0.006 1.242 1.241 0.374 0.375 0.069 0.674 1.005 0.147 0.130 0.091 1.625 0.405 1.400 0.010 0.020 0.010 0.540 0.156 0.455 0.003 1.218 1.219 0.366 0.365 0.059 0.634 0.995 0.107 0.120 0.079 1.615 0.395 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 99-12-08 99-12-28 SOT539A 2000 Feb 17 EUROPEAN PROJECTION 9 Philips Semiconductors Preliminary specification UHF push-pull power LDMOS transistor BLF2048 DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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