欢迎来电咨询，翟（ｚｈａｉ）先生：１３７６０４７９３１５ SN3188 Audio Modulate LED Drivers Description Features The SN3188 is a LED driver with an audio synchronization mode that eliminates the need for real time software processing to generate LED lighting effects. Outputs OUT0~OUT2 of the SN3188 can be operated in PWM control mode with 256 steps control for RGB intensity control. Outputs OUT3~OUT9 can be operated in 4 modes: audio synchronization mode, LED Backlighting mode, top-down scan mode and a combination of audio synchronization and top-down scan mode. When PWM Control mode is disabled, OUT0~OUT2 operates with OUT3~OUT9 together in the 4 modes described above. The SN3188 includes ten individual color LED drivers that provide up to 40mA of current drive for each LED output. The output current is programmed using an external resistor. z z z z z z PWM control RGB LEDs lighting effects Programmable operating modes: ¾ Audio synchronization mode ¾ LED Backlighting mode ¾ Top-down scan mode ¾ PWM Control mode VDD Range: 3.0V to 5.5V 10 outputs each with 40mA capability at 0.34V headroom. For anode-common LEDs Package: QFN-20 Application z z z Cellular phones MP3/MP4/CD/minidiskplayers White LED Backlighting Typical application VDD VDD RGB LED 2 VDD 0.1uF Audio signal IN SN3188 18 220nF 16 Master 2K 8 17 OUT1 4 OUT2 5 IN 1uF 0.1uF OUT3 6 CLOCK 15 DATA 14 LATCH 1 SDB 19 20 100K 0.1uF OUT0 3 OUT4 7 OUT5 9 OUT6 10 C-FILT R-EXT OUT7 11 OUT8 12 GND GND OUT9 13 Figure 1 Nov. 2008 ver1.11 1 SI-EN Technology SN3188 Pin Configurations 16 CLOCK 17 GND 13 OUT9 OUT1 4 12 OUT8 OUT2 5 11 OUT7 OUT6 10 3 9 OUT0 OUT5 14 LATCH 8 2 GND VDD 7 15 DATA OUT4 1 6 SDB OUT3 QFN-20 18 IN Configurations (Top View) 19 C-FILT Pin 20 R-EXT Package Pin Description Pin Name NO. Description SDB 1 Shutdown, pull to GND for shutdown mode VDD 2 Power supply OUT0 to OUT9 3~7, 9~13 LED outputs GND 8,17 Ground ———————— LATCH 14 Hold LATCH low for normal operation and serial communications. ———————— Pulse LATCH high to latch the serial data in the shift registers. DATA 15 Input serial data for data shift resister CLOCK 16 Input Clock for data shift on rising edge IN 18 Audio signal input C-FILT 19 Low pass filter input R-EXT 20 External resistor connection pin to regulate the output current ———————— Nov. 2008 ver1.11 2 SI-EN Technology SN3188 Ordering Information SN3188 Order Number Package Type Operating Temperature range SN3188JIR1 QFN-20 -40 °C to 85°C □ □ □ □ Lead Free Code 1: Lead Free Packing R: Tape& Reel Operating temperature range I: Industry Standard Package Type J: QFN-20 Nov. 2008 ver1.11 3 SI-EN Technology SN3188 Absolute Maximum Ratings ¾ ¾ ¾ ¾ Supply Voltage... ... ... ... ... ... ... ... ... ... ... ... ... 6.0V Storage Temperature... ... ... ... ... −65°C to +150°C Input Voltage ... ... ... ... ... ... ... −0.3V to VDD+0.3V Junction Temperature... ... ... ... ... ... ... ... ... ...150°C Thermal Resistance ¾ θJA (typ) ... ... ... ... ... ... ... ... ... ... ... ... ... ... ..23°C/W Operating Ratings ¾ TMIN≤TA≤TMAX... ... ... ... ... ... .−40°C≤TA≤85°C ¾ Supply Voltage... ... ... ... ... ... ... ... 3V≤VDD≤5.5V Soldering Information ¾ Vapor Phase (60 sec) ... ... ... ... ... ... ... ... ... ...215°C ¾ Infrared (15 sec.) ... ... ... ... ... ... ... ... ... ... ..... 220°C Electrical Characteristics The following specifications apply for VDD=5V unless otherwise noted. Limits apply for TA=25°C Symbol Parameter Condition Min Typ. Max VDD IDD ISD Quiescent power supply current Shutdown current Average Output current IOUT VHR 3 Supply Voltage Current Sink headroom voltage Units V 5.5 V SDB=VDD 0.72 1.2 mA SDB=GND Audio synchronization mode, VDS=0.4V, gain =0db, REXT=1KΩ,Vin=0.6V Top-down scan mode, VDS=0.4V, REXT=1kΩ When OUTX turned on PWM Control mode, PWM bytes=0xff,VDS=0.4V OUT0~OUT2 0.56 1 μA ILED=25mA 12.8 mA 10.3 mA 43 mA 230 mV ———————— CLOCK, DATA, LATCH , SDB logic electrical characteristics VIN(0) VIN(1) Logic “0” input voltage Logic “1” input voltage VDD = 3V 0.4 VDD = 5.5V 1.4 V V IIN(0) Logic “0” input current VIN= 0V 5 IIN(1) Logic “1” input current VIN= VDD 5 nA (note) nA (note) Note: Guaranteed by design. Nov. 2008 ver1.11 4 SI-EN Technology SN3188 Digital input switching characteristics Typ. Max Units 400 kHz Parameter FCLOCK CLOCK Frequency TLOW CLOCK Low Time 1.3 μs THIGH CLOCK High Time 0.6 μs TR,CLOCK CLOCK Rise Time 0.3 μs TF,CLOCK CLOCK Fall Time 0.3 μs TSU,DATA Data In Setup Time 250 THD,DATA Data In Hold Time 250 ———————— THIGH, L A T C H Condition Min Symbol ———————— ns (note) ns (note) ns (note) 200 LATCH High Time Note: Guaranteed by design. Timing Waveform t LOW t HIGH 50% 10% CLOCK t SU DATA 50% 90% tR 90% 50% t F 10% 50% t HD 50% t HIGH 50% LATCH 50% Figure 2 Nov. 2008 ver1.11 5 SI-EN Technology SN3188 Timing Diagram 8 9 1 16 17 32 24 25 CLOCK DATA D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Configuration Byte OUT0 PWM Control Byte OUT2 PWM Control Byte OUT1 PWM Control Byte LATCH Figure 3 Truth Table Data information: Configuration byte(1) D7 D6 D5 D4 D3 D2 D1 D0 000 Gain(6)=0dB 00: Mode 1(2) enable (3) 01: Mode 2 (4) 10: Mode 3 enable enable 0: Mode 4(5) disable 1: Mode 4 enable 001 Gain=+6dB 0:Normal operation 1:Software shutdown mode x 010 Gain=+12dB 101 Gain=-6dB 110 Gain=-12dB PWM Control bytes D7~D0 of OUT0 (7) 256 steps of PWM control D7~D0 of OUT1 D7~D0 of OUT2 256 steps of PWM control 256 steps of PWM control Note: (1) Default: values of D7~D0 are 00 0 0 0 000, that is mode 1 enable, mode 4 disable, normal operation, gain=0dB (2) Mode 1: Audio synchronization plus top-down scan mode (3) Mode 2: Audio synchronization mode or LED backlighting mode (4) Mode 3: Top-down scan mode only (5) Mode 4: PWM Control mode. If disable, output current of OUT0~OUT2 are determined by REXT like OUT3~ OUT9. While enable, OUT0~OUT2 are controlled by PWM Control data & OUT3~OUT9 control by mode 1~3 (6) Input Signal Level Gain Control, this three bits amplify the audio signal, for better LED light modulation (7) Output of each channel, please see PWM control mode in application information Nov. 2008 ver1.11 6 SI-EN Technology SN3188 Application Information Audio synchronization mode The SN3188 features an audio synchronization mode where each LED driver’s output current is dependent on the audio input signal. The intensity of any given LED output is dependent upon the amplitude of the audio signal. An increase in the amplitude of the audio signal will increase the output current of LED driver. The audio synchronization mode allows each LED output to react to the amplitude of the audio input signal. Audio synchronization mode is activated by programming the configuration byte bit D7 low and bit D6 high. The SN3188 has one single-ended analog audio input designated IN, where voice data, MP3, or FM radio data is routed to IN. The gain of the audio input summing amplifier is programmed by the D2~D0 bits of the configuration byte. Increasing the gain of the audio input summing amplifier will increase the intensity of the LEDs in audio synchronization mode. When the SN3188 is configured to operate in Audio Synchronization mode only, if the voltage of the output pin, VDS≥ headroom voltage, the maximum output current of each channel is dependent upon the value of the external programming resistor, REXT, If the voltage at the output pin is below the minimum headroom voltage, VDS< headroom voltage, the output current will behave as shown below in figure 4. The maximum output current of each channel is set by an external resistor REXT, as show in figure 5. Careful selection of REXT and Gain Setting is required so as not to exceed output current of 40mA for extended periods of time. 45 40 Voltage supply VLED 40 30 30 SN3188 Iout(mA) Iout (mA) 35 R EXT =510Ω VDS 35 25 R EXT =1kΩ 20 25 20 15 15 10 10 R EXT =2kΩ 5 5 0 0 0 0.1 0.2 0.3 0.4 0.5 Vds(V) 0.6 0.7 0.8 0.9 1 0 500 1000 1500 2000 Figure 4 Note: test condition: VDD=4.0V, VDS=0.4V, Gain=0dB, IN connected to GND. 2500 Rext(Ω) 3000 3500 4000 4500 5000 Figure 5 LED backlighting mode With some external circuit modifications, the audio synchronization mode of the SN3188 operates as a LED backlight control mode. Each driver’s output current can be controlled using a PWM input at the IN pin which has a VINLOW of 0V, and VINHIGH of greater than 1.4V When using a PWM waveform to drive the IN pin, it is important that VINLOW be as close to GND as possible, and that VINHIGH is greater than 1.4V. This is to ensure that the output current is accurately controlled by the external resistance connected to the REXT pin. A PWM waveform which has a VINLOW value of 100mV will cause an approximate decrease from the programmed current of 10%. VDD RGB LED 2 OUT0 3 VDD 0.1uF SN3188 OUT2 5 18 16 IN CLOCK 15 DATA 14 LATCH 1 SDB Master 19 20 100K 1K 8 17 VDD OUT1 4 1uF 0.1uF OUT3 6 OUT4 7 OUT5 9 OUT6 10 C-FILT R-EXT OUT7 11 OUT8 12 GND GND OUT9 13 Figure 6 Note: No C-FILT and no Cin used Nov. 2008 ver1.11 7 SI-EN Technology SN3188 Top-down scan mode When the SN3188 is configured to operate in Top-down Scan mode, the constant current output is programmed by the external resistor connected to the REXT pin. The value of the output current may be calculated as IOUT = 10V/REXT. The SN3188 offers a special lighting effect that controls the duty cycle and timing of each channel. When PWM Control mode is enabled, OUT0~OUT2 are controlled by PWM bytes, and OUT3~OUT9 will operate as shown below in figure 7. OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 t=0 Δt 2Δt 3Δt 4Δt 5Δt 6Δt 7Δt 8Δt 9Δt 10Δt 11Δt 12Δt 13Δt 14Δt 15Δt T Figure 7 This waveform describes the output voltage of OUT3~OUT9. The output is on when it is low. 0~Δt, all channels turn off, where Δt is 22ms； Δt~2Δt, OUT3 turns on, OUT4~OUT9 turn off; 2Δt~3Δt, OUT3, OUT4 turn on, OUT5~OUT9 turn off; …… 7Δt~8Δt, OUT3~OUT9 turn on; 8Δt~9Δt, OUT3~OUT8 turn on, OUT9 turns off; 9Δt~10Δt, OUT3~OUT7 turn on, OUT8, OUT9 turn off; …… 13Δt~14Δt, OUT3 turns on, OUT4~OUT9 turn off; Then next cycle starts again. When PWM control mode is disabled, OUT0~OUT2 function the same as OUT3~OUT9, operating as described by the waveforms below in figure 8. OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 t=0 Δt 2Δt 3Δt 4Δt 5Δt 6Δt 7Δt 8Δt 9Δt 10Δt 11Δt 12Δt 13Δt 14Δt 15Δt 16Δt 17Δt 18Δt 19Δt 20Δt T Figure 8 Nov. 2008 ver1.11 8 SI-EN Technology SN3188 Audio synchronization plus Top-down scan mode When initially powering the IC or if the SN3188 is configured to operate in Audio synchronization plus Top-down Scan mode, the output current is programmed as described in Audio synchronization mode section, and the Top-down scan timing is as described in Top-down Scan mode section. PWM Control mode When PWM control mode is enabled, the maximum current of OUT0~OUT2 is internally fixed, and independent of the value of the programming resistor, REXT. Each output is independently programmable to control the output current with 256 steps of PWM control. During the time that the output is on, and while the voltage at the output pin is above the minimum required headroom voltage, VDS>headroom voltage, the output current will be kept constant regardless of the variations of LED forward voltages (VF). Should the voltage at the output pin drop below the minimum required headroom voltage, then the output current will behave as shown below in figure 9. 45 40 35 Iout(mA) 30 25 20 15 10 5 0 0 0.1 0.2 0.3 0.4 0.5 Vds(V) 0.6 0.7 0.8 0.9 1 Figure 9 Note: test condition: VDD=4.0V, PWM bytes of OUT0~OUT2 are 0xff. The SN3188’s PWM LED outputs can be used to drive individual color LEDs or RGB LED modules. When driving RGB LED, the intensity of each LED in the module is programmable allowing the RGB LED module to be set to many different colors, based on the status of the PWM bytes settings. When PWM Control mode is enabled, the average output current of OUT0~OUT2 is dependent upon the PWM duty cycle. LEDs driven with a higher duty cycle results in a higher luminous intensity. The maximum output current is 40.6mA (typ.), the table below gives some average IOUT values controlled by PWM bytes. PMW byte IOUT (mA) 0x00 0x01 0x02 0x03 …… 0xff 0 0.16 0.32 0.48 …… 40.6 When PWM Control mode is disabled, the maximum output current of OUT0~ OUT2 will be programmed by REXT in the same way as OUT3~ OUT9. Default operating mode When initially powering the IC, PWM control mode is disabled and OUT0~OUT9 are configured to function in audio synchronization plus top-down scan mode at the same time. Nov. 2008 ver1.11 9 SI-EN Technology SN3188 Package Information: QFN-20 Dimension (mm) Symbol Nov. 2008 ver1.11 MIN NOM MAX A 0.70 0.75 0.80 A1 0.00 0.02 0.05 b 0.15 0.20 0.25 b1 —— 0.125 REF. —— c —— 0.20 REF. —— D 2.90 3.00 3.10 D2 1.45 1.50 1.55 E 2.90 3.00 3.10 E2 1.45 1.50 1.55 e —— 0.40 —— L 0.35 0.40 0.45 y 0.00 —— 0.075 10 SI-EN Technology