74HC40103
8-bit synchronous binary down counter
Rev. 5 — 21 April 2016
Product data sheet
1. General description
The 74HC40103 is an 8-bit synchronous down counter. It has control inputs for enabling
or disabling the clock (CP), for clearing the counter to its maximum count and for
presetting the counter either synchronously or asynchronously. In normal operation, the
counter is decremented by one count on each positive-going transition of the clock (CP).
Counting is inhibited when the terminal enable input (TE) is HIGH. The terminal count
output (TC) goes LOW when the count reaches zero if TE is LOW, and remains LOW for
one full clock period. When the synchronous preset enable input (PE) is LOW, data at the
jam input (P0 to P7) is clocked into the counter on the next positive-going clock transition
regardless of the state of TE. When the asynchronous preset enable input (PL) is LOW,
data at the jam input (P0 to P7) is asynchronously forced into the counter regardless of
the state of PE, TE, or CP. The jam inputs (P0 to P7) represent a single 8-bit binary word.
When the master reset input (MR) is LOW, the counter is asynchronously cleared to its
maximum count (decimal 255) regardless of the state of any other input. If all control
inputs except TE are HIGH at the time of zero count, the counters will jump to the
maximum count, giving a counting sequence of 256 clock pulses long. Device may be
cascaded using the TE input and the TC output, in either a synchronous or ripple mode.
Inputs include clamp diodes. This enables the use of current limiting resistors to interface
inputs to voltages in excess of VCC.
2. Features and benefits
Cascadable
Synchronous or asynchronous preset
Low-power dissipation
Complies with JEDEC standard no. 7A
CMOS input levels
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C
3. Applications
Divide-by-n counters
Programmable timers
Interrupt timers
Cycle/program counters.
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC40103D
40 C to +125 C
SO16
plastic small outline package; 16 leads; body
width 3.9 mm
SOT109-1
74HC40103PW
40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
5. Functional diagram
7&
3 3 3 3 3 3 &3
3 3 3( 3/ 7( 05
Functional diagram
74HC40103
Product data sheet
3
3
3
3
7&
3
3
3
3
3(
05
DDE
DDE
Fig 1.
&3 3/ 7(
Fig 2.
Logic symbol
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
&75
&7 &*
*
(1
&
&7
&7 DDE
Fig 3.
IEC logic symbol
&3
05
7(
3(
3/
3
3
3
3
3
3
3
3
7&
FRXQW
DDE
Fig 4.
Timing diagram
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 23
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xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
3/
&3
7&
05
3
3
-
-
3
-
Rev. 5 — 21 April 2016
-
3/
-
05
))
3(
3/
))
-
-
3/
))
-
-
3/
))
-
-
3/
))
-
-
3/
))
4
4
&3
3/
))
3(
7(
-
05
4
&3
3(
7(
3
05
4
&3
3(
7(
3
05
4
&3
3(
7(
3
05
4
&3
3(
7(
3
05
4
&3
3(
7(
-
05
4
&3
3
&3
3/
))
3(
7(
7(
WRRWKHU
IOLSIORSV
7(
Fig 5.
Logic diagram
DDE
74HC40103
4 of 23
© NXP Semiconductors N.V. 2016. All rights reserved.
8-bit synchronous binary down counter
All information provided in this document is subject to legal disclaimers.
05
NXP Semiconductors
74HC40103
Product data sheet
3(
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
6. Pinning information
6.1 Pinning
&3
9&&
05
3(
7(
7&
3
3
3
3
3
3
3
3
*1'
3/
DDE
Fig 6.
Pin configuration
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
CP
1
clock input (LOW-to-HIGH, edge-triggered)
MR
2
asynchronous master reset input (active LOW)
TE
3
terminal enable input (active LOW)
P0
4
jam input 0
P1
5
jam input 1
P2
6
jam input 2
P3
7
jam input 3
GND
8
ground (0 V)
PL
9
asynchronous preset enable input (active LOW)
P4
10
jam input 4
P5
11
jam input 5
P5
12
jam input 6
P7
13
jam input 7
TC
14
terminal count output (active LOW)
PE
15
synchronous preset enable input (active LOW)
VCC
16
positive supply voltage
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
7. Functional description
7.1 Function table
Function table[1]
Table 3.
Control inputs
PE
Preset mode
Action[2]
MR
PL
TE
L
X
X
X
asynchronous
clear to maximum count
H
L
X
X
asynchronous
preset asynchronously
H
L
X
synchronous
preset on next LOW-to HIGH clock transition
H
L
synchronous
count down
H
synchronous
inhibit counter
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
[2]
Clock connected to CP.
Synchronous operation: changes occur on the LOW-to-HIGH CP transition.
Jam inputs: MSD = P7, LSD = P0.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
VO = 0.5 V to VCC + 0.5 V
ICC
IIK
Min
Max
Unit
0.5
+7
V
-
20
mA
-
20
mA
-
25
mA
supply current
-
+50
mA
IGND
ground current
50
-
mA
Tstg
storage temperature
Ptot
total power dissipation
65
+150
C
SO16 package
[2]
-
500
mW
TSSOP16 packages
[3]
-
500
mW
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SO16 package: above 70 C, Ptot derates linearly with 8 mW/K.
[3]
For TSSOP16 package: above 60 C, Ptot derates linearly with 5.5 mW/K.
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
t/V
input transition rise and
fall rates
Tamb
Conditions
Min
Typ
Max
Unit
2.0
5.0
6.0
V
0
-
VCC
V
0
-
VCC
V
VCC = 2.0 V
-
-
625
ns
VCC = 4.5 V
-
1.67
139
ns
VCC = 6.0 V
-
-
83
ns
40
-
+125
C
ambient temperature
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
HIGH-level input voltage
VCC = 2.0 V
1.5
1.2
-
V
Tamb = 25 C
VIH
VIL
VOH
VOL
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VCC = 4.5 V
3.15
2.4
-
V
VCC = 6.0 V
4.2
3.2
-
V
VCC = 2.0 V
-
0.8
0.5
V
VCC = 4.5 V
-
2.1
1.35
V
VCC = 6.0 V
-
2.8
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
V
VI = VIH or VIL
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
V
IO = 4 mA; VCC = 4.5 V
3.98
4.32
-
V
IO = 5.2 mA; VCC = 6.0 V
5.48
5.81
-
V
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
0
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
V
IO = 4 mA; VCC = 4.5 V
-
0.15
0.26
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.26
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
0.1
A
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
8.0
A
CI
input capacitance
-
3.5
-
pF
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
1.5
-
-
VCC = 4.5 V
3.15
-
-
V
VCC = 6.0 V
4.2
-
-
V
VCC = 2.0 V
-
-
0.5
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
-
-
V
IO = 20 A; VCC = 4.5 V
4.4
-
-
V
Tamb = 40 C to +85 C
VIH
VIL
VOH
VOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
V
VI = VIH or VIL
IO = 20 A; VCC = 6.0 V
5.9
-
-
V
IO = 4 mA; VCC = 4.5 V
3.84
-
-
V
IO = 5.2 mA; VCC = 6.0 V
5.34
-
-
V
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
-
0.1
V
IO = 4 mA; VCC = 4.5 V
-
-
0.33
V
IO = 5.2 mA; VCC = 6.0 V
-
-
0.33
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
80
A
Tamb = 40 C to +125 C
VIH
VIL
VOH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
74HC40103
Product data sheet
VCC = 2.0 V
1.5
-
-
V
VCC = 4.5 V
3.15
-
-
V
VCC = 6.0 V
4.2
-
-
V
VCC = 2.0 V
-
-
0.5
V
VCC = 4.5 V
-
-
1.35
V
VCC = 6.0 V
-
-
1.8
V
IO = 20 A; VCC = 2.0 V
1.9
-
-
V
IO = 20 A; VCC = 4.5 V
4.4
-
-
V
IO = 20 A; VCC = 6.0 V
5.9
-
-
V
IO = 4 mA; VCC = 4.5 V
3.7
-
-
V
IO = 5.2 mA; VCC = 6.0 V
5.2
-
-
V
VI = VIH or VIL
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Rev. 5 — 21 April 2016
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
-
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
-
0.1
V
IO = 4 mA; VCC = 4.5 V
-
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
-
0.4
V
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
1.0
A
ICC
supply current
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
160
A
11. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC = 2.0 V
-
96
300
ns
VCC = 4.5 V
-
35
60
ns
VCC = 6.0 V
-
28
51
ns
VCC = 5.0 V; CL = 15 pF
-
30
-
ns
VCC = 2.0 V
-
50
175
ns
VCC = 4.5 V
-
18
35
ns
VCC = 6.0 V
-
14
30
ns
VCC = 2.0 V
-
102
315
ns
VCC = 4.5 V
-
37
63
ns
VCC = 6.0 V
-
30
53
ns
VCC = 2.0 V
-
83
275
ns
VCC = 4.5 V
-
30
55
ns
-
24
47
ns
VCC = 2.0 V
-
19
75
ns
VCC = 4.5 V
-
7
15
ns
VCC = 6.0 V
-
6
13
ns
Tamb = 25 C
tpd
propagation delay
CP to TC; see Figure 7
[1]
TE to TC; see Figure 8
PL to TC; see Figure 9
tPHL
HIGH to LOW
propagation delay
MR to TC; see Figure 9
VCC = 6.0 V
tt
transition time
74HC40103
Product data sheet
[2]
see Figure 8
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Rev. 5 — 21 April 2016
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
Min
Typ
Max
tW
pulse width
CP HIGH or LOW; see Figure 7
Unit
VCC = 2.0 V
165
22
-
ns
VCC = 4.5 V
33
8
-
ns
VCC = 6.0 V
28
6
-
ns
VCC = 2.0 V
125
39
-
ns
VCC = 4.5 V
25
14
-
ns
VCC = 6.0 V
21
11
-
ns
VCC = 2.0 V
125
33
-
ns
VCC = 4.5 V
25
12
-
ns
VCC = 6.0 V
21
10
-
ns
VCC = 2.0 V
50
14
-
ns
VCC = 4.5 V
10
5
-
ns
VCC = 6.0 V
9
4
-
ns
VCC = 2.0 V
75
22
-
ns
VCC = 4.5 V
15
8
-
ns
VCC = 6.0 V
13
6
-
ns
VCC = 2.0 V
150
44
-
ns
VCC = 4.5 V
30
16
-
ns
VCC = 6.0 V
26
13
-
ns
VCC = 2.0 V
75
22
-
ns
VCC = 4.5 V
15
8
-
ns
VCC = 6.0 V
13
6
-
ns
VCC = 2.0 V
0
14
-
ns
VCC = 4.5 V
0
5
-
ns
VCC = 6.0 V
0
4
-
ns
VCC = 2.0 V
0
30
-
ns
VCC = 4.5 V
0
11
-
ns
VCC = 6.0 V
0
9
-
ns
VCC = 2.0 V
0
17
-
ns
VCC = 4.5 V
0
6
-
ns
VCC = 6.0 V
0
5
-
ns
MR LOW; see Figure 9
PL LOW; see Figure 9
trec
tsu
recovery time
set-up time
MR to CP, PL to CP; see Figure 10
PE to CP; see Figure 11
TE to CP; see Figure 12
Pn to CP; see Figure 11
th
hold time
PE to CP; see Figure 11
TE to CP; see Figure 12
Pn to CP; see Figure 11
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fmax
maximum frequency
see Figure 7
VCC = 2.0 V
3.0
10
-
MHz
VCC = 4.5 V
15
29
-
MHz
VCC = 6.0 V
18
35
-
MHz
-
32
-
MHz
-
24
-
pF
VCC = 2.0 V
-
-
375
ns
VCC = 4.5 V
-
-
75
ns
VCC = 6.0 V
-
-
64
ns
VCC = 2.0 V
-
-
220
ns
VCC = 4.5 V
-
-
44
ns
VCC = 6.0 V
-
-
37
ns
VCC = 2.0 V
-
-
395
ns
VCC = 4.5 V
-
-
79
ns
VCC = 6.0 V
-
-
40
ns
VCC = 2.0 V
-
-
345
ns
VCC = 4.5 V
-
-
69
ns
VCC = 6.0 V
-
-
59
ns
VCC = 2.0 V
-
-
95
ns
VCC = 4.5 V
-
-
19
ns
VCC = 6.0 V
-
-
16
ns
VCC = 2.0 V
205
-
-
ns
VCC = 4.5 V
41
-
-
ns
VCC = 6.0 V
35
-
-
ns
VCC = 2.0 V
155
-
-
ns
VCC = 4.5 V
31
-
-
ns
VCC = 6.0 V
26
-
-
ns
VCC = 2.0 V
155
-
-
ns
VCC = 4.5 V
31
-
-
ns
VCC = 6.0 V
26
-
-
ns
VCC = 5.0 V; CL = 15 pF
CPD
power dissipation
capacitance
VI = GND to VCC
[3]
CP to TC; see Figure 7
[1]
Tamb = 40 C to +85 C
tpd
propagation delay
TE to TC; see Figure 8
PL to TC; see Figure 9
tPHL
tt
tW
HIGH to LOW
propagation delay
transition time
pulse width
MR to TC; see Figure 9
[2]
see Figure 8
CP HIGH or LOW; see Figure 7
MR LOW; see Figure 9
PL LOW; see Figure 9
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
trec
recovery time
MR to CP, PL to CP; see Figure 10
tsu
set-up time
Min
Typ
Max
Unit
VCC = 2.0 V
65
-
-
VCC = 4.5 V
13
-
-
ns
VCC = 6.0 V
11
-
-
ns
VCC = 2.0 V
95
-
-
ns
VCC = 4.5 V
19
-
-
ns
VCC = 6.0 V
16
-
-
ns
VCC = 2.0 V
190
-
-
ns
VCC = 4.5 V
38
-
-
ns
VCC = 6.0 V
33
-
-
ns
VCC = 2.0 V
95
-
-
ns
VCC = 4.5 V
19
-
-
ns
VCC = 6.0 V
16
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
2.4
-
-
MHz
VCC = 4.5 V
12
-
-
MHz
VCC = 6.0 V
14
-
-
MHz
ns
PE to CP; see Figure 11
TE to CP; see Figure 12
Pn to CP; see Figure 11
th
hold time
PE to CP; see Figure 11
TE to CP; see Figure 12
Pn to CP; see Figure 11
fmax
maximum frequency
74HC40103
Product data sheet
see Figure 7
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
12 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 40 C to +125 C
tpd
propagation delay
CP to TC; see Figure 7
[1]
VCC = 2.0 V
-
-
450
ns
VCC = 4.5 V
-
-
90
ns
VCC = 6.0 V
-
-
77
ns
TE to TC; see Figure 8
VCC = 2.0 V
-
-
265
ns
VCC = 4.5 V
-
-
53
ns
VCC = 6.0 V
-
-
45
ns
PL to TC; see Figure 9
tPHL
HIGH to LOW
propagation delay
VCC = 2.0 V
-
-
475
ns
VCC = 4.5 V
-
-
95
ns
VCC = 6.0 V
-
-
81
ns
VCC = 2.0 V
-
-
415
ns
VCC = 4.5 V
-
-
83
ns
-
-
71
ns
MR to TC; see Figure 9
VCC = 6.0 V
tt
tW
transition time
pulse width
[2]
see Figure 8
VCC = 2.0 V
-
-
110
ns
VCC = 4.5 V
-
-
22
ns
VCC = 6.0 V
-
-
19
ns
VCC = 2.0 V
250
-
-
ns
VCC = 4.5 V
50
-
-
ns
VCC = 6.0 V
43
-
-
ns
VCC = 2.0 V
190
-
-
ns
VCC = 4.5 V
38
-
-
ns
VCC = 6.0 V
32
-
-
ns
VCC = 2.0 V
190
-
-
ns
VCC = 4.5 V
38
-
-
ns
VCC = 6.0 V
32
-
-
ns
VCC = 2.0 V
75
-
-
ns
VCC = 4.5 V
15
-
-
ns
VCC = 6.0 V
13
-
-
ns
CP HIGH or LOW; see Figure 7
MR LOW; see Figure 9
PL LOW; see Figure 9
trec
recovery time
74HC40103
Product data sheet
MR to CP, PL to CP; see Figure 10
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Table 7.
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 13.
Symbol
Parameter
Conditions
Min
Typ
Max
tsu
set-up time
PE to CP; see Figure 11
Unit
VCC = 2.0 V
110
-
-
ns
VCC = 4.5 V
22
-
-
ns
VCC = 6.0 V
19
-
-
ns
VCC = 2.0 V
225
-
-
ns
VCC = 4.5 V
45
-
-
ns
VCC = 6.0 V
38
-
-
ns
VCC = 2.0 V
110
-
-
ns
VCC = 4.5 V
22
-
-
ns
VCC = 6.0 V
19
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
0
-
-
ns
VCC = 4.5 V
0
-
-
ns
VCC = 6.0 V
0
-
-
ns
VCC = 2.0 V
2.0
-
-
MHz
VCC = 4.5 V
10
-
-
MHz
VCC = 6.0 V
12
-
-
MHz
TE to CP; see Figure 12
Pn to CP; see Figure 11
hold time
th
PE to CP; see Figure 11
TE to CP; see Figure 12
Pn to CP; see Figure 11
maximum frequency
fmax
[1]
tpd is the same as tPHL, tPLH.
[2]
tt is the same as tTHL, tTLH.
[3]
see Figure 7
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC40103
Product data sheet
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
12. Waveforms
IPD[
&3LQSXW
7(LQSXW
90
W:
W3+/
W3/+
7&RXWSXW
90
W3+/
7&RXWSXW
90
W7+/
W7/+
W3/+
90
W7+/
W7/+
DDE
DDE
VM = 0.5 VI
Fig 7.
VM = 0.5 VI
Waveforms showing the clock input (CP) to
TC propagation delays, the clock pulse width,
the output transition times and the maximum
clock pulse frequency
3Q3/05
LQSXW
Fig 8.
Waveforms showing the TE to TC propagation
delays
3/05
LQSXW
90
90
W:
W:
W3+/
7&RXWSXW
W3/+
WUHF
&3LQSXW
90
DDE
DDE
VM = 0.5 VI
Fig 9.
VM = 0.5 VI
Waveforms showing PL, MR, Pn to TC
propagation delays
74HC40103
Product data sheet
90
Fig 10. Waveforms showing removal time for MR and
PL
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15 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
3WR3
LQSXW
3(LQSXW
90
VWDEOH
WVX
WK
WVX
WK
7(RU3(
LQSXW
90
90
WVX
&3LQSXW
&3LQSXW
90
WK
90
DDE
DDE
VM = 0.5 VI
The shaded areas indicate when the input is permitted to
change for predictable output performance.
VM = 0.5 VI
Fig 11. Waveforms showing hold and set-up times for
Pn, PE to CP
Fig 12. Waveforms showing hold and set-up times for
MR or PE to CP
9&&
38/6(
*(1(5$725
9,
92
'87
57
&/
PQD
Test data is given in Table 8.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Fig 13. Test circuit for measuring switching times
Table 8.
Test data
Supply
Input
Load
VCC
VI
tr, tf
CL
2.0 V
VCC
6 ns
50 pF
4.5 V
VCC
6 ns
50 pF
6.0 V
VCC
6 ns
50 pF
5.0 V
VCC
6 ns
15 pF
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
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16 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
13. Application information
9&&
9&&
3
7&
Nȍ
7(
WLPHRXW
3(
1
3/
W
05
3
VWDUW
&3
*1'
I,1
DDE
Fig 14. Programmable timer
9&&
3
7&
I287
I,1
1
7(
3(
1
3/
05
3
&3
I,1
*1'
DDE
Fig 15. Divide-by-N counter
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
14. Package outline
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Fig 16. Package outline SOT109-1 (SO16)
74HC40103
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
18 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP
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Fig 17. Package outline SOT403-1 (TSSOP16)
74HC40103
Product data sheet
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Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
19 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
15. Abbreviations
Table 9.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
16. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC40103 v.5
20160421
Product data sheet
-
74HC40103 v.4
Modifications:
74HC40103 v.4
Modifications:
74HC40103 v.3
Modifications:
•
Type number 74HC40103DB (SOT338-1) removed.
20160127
•
Product data sheet
-
74HC40103 v.3
Type number 74HC40103N (SOT38-4) removed.
20041112
Product data sheet
-
74HC_HCT40103_CNV v.2
•
The format of this data sheet has been redesigned to comply with the current
presentation and information standard of Philips Semiconductors.
•
•
Removed type number 74HCT40103.
Inserted family specification.
74HC_HCT40103_CNV v.2
19970918
Product specification
-
74HC_HCT40103 v.1
74HC_HCT40103 v.1
19901201
Product specification
-
-
74HC40103
Product data sheet
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© NXP Semiconductors N.V. 2016. All rights reserved.
20 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC40103
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 21 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
21 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC40103
Product data sheet
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© NXP Semiconductors N.V. 2016. All rights reserved.
22 of 23
74HC40103
NXP Semiconductors
8-bit synchronous binary down counter
19. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 6
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application information. . . . . . . . . . . . . . . . . . 17
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 21 April 2016
Document identifier: 74HC40103